Patents Assigned to Tokyo Electron Limited
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Patent number: 11837487Abstract: A transfer device, configured to hold a substrate to be thinned and configured to be moved along a transfer path through which the substrate is transferred, includes a grip member configured to hold a frame to which the substrate is mounted with a tape therebetween; a guide member configured to be moved along the transfer path together with the grip member and configured to place thereon the frame held by the grip member; and a moving mechanism configured to move the grip member with respect to the guide member to move the frame held by the grip member along the guide member.Type: GrantFiled: June 29, 2018Date of Patent: December 5, 2023Assignee: Tokyo Electron LimitedInventors: Takeshi Tamura, Masatoshi Kaneda, Seiji Nakano
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Publication number: 20230386800Abstract: A substrate processing method includes: providing a substrate processing apparatus including a chamber, a substrate support that supports a substrate in the chamber, an upper electrode facing a center of the substrate, and a plurality of electromagnets arranged radially around the center of the upper electrode; selecting a polarity modification pattern to be used for the plurality of electromagnets during an etching; and generating plasma from a processing gas supplied into the chamber, and etching the substrate based on the polarity modification pattern.Type: ApplicationFiled: May 23, 2023Publication date: November 30, 2023Applicant: Tokyo Electron LimitedInventors: Tomohiko NIIZEKI, Maju TOMURA, Yoshihide KIHARA
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Publication number: 20230386794Abstract: A substrate processing method is a substrate processing method for a substrate processing apparatus. The method includes: a) supplying a process gas containing fluorocarbon and a rare gas to a processing container in which a placing pedestal for placing a processing target object including a first region made of silicon oxide is arranged; b) plasma-processing the processing target object by a first plasma of the process gas generated under a first plasma generation condition; c) plasma-processing the processing target object in which a bias potential is generated on the processing target object by a second plasma of the process gas generated under a second plasma generation condition different from the first plasma generation condition; and d) repeating the b) and the c).Type: ApplicationFiled: August 8, 2023Publication date: November 30, 2023Applicant: Tokyo Electron LimitedInventors: Satoru NAKAMURA, Shinya MORIKITA, Fumiya TANIFUJI
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Publication number: 20230386787Abstract: A substrate processing method for a substrate processing device includes (a) supplying a process gas with specific conditions to a processing container having therein a stage on which a workpiece having an etching target film and a mask on the etching target film is placed, (b) performing a plasma processing on the workpiece with first plasma generated from the process gas under a first plasma generation condition, (c) performing a plasma processing on the workpiece with second plasma generated from the process gas under a second plasma generation condition that is different from the first plasma generation condition in a radio-frequency power condition and a processing time, and is the same as the first plasma generation condition in other conditions, and (d) repeating (b) and (c).Type: ApplicationFiled: October 5, 2021Publication date: November 30, 2023Applicant: Tokyo Electron LimitedInventors: Atsutoshi INOKUCHI, Yasuhiko SAITO, Kiyoshi MAEDA
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Publication number: 20230386804Abstract: A plasma processing apparatus includes: a processing container in which a mounting stage mounted with a substrate is provided and a plasma process is performed on the substrate; an exhaust passage which is provided around the mounting stage and through which a gas containing a by-product released by the plasma process flows; and a first adsorption member which is arranged along an inner wall surface of the exhaust passage and of which a surface is roughened to adsorb the by-product.Type: ApplicationFiled: August 11, 2023Publication date: November 30, 2023Applicant: Tokyo Electron LimitedInventors: Toshimasa KOBAYASHI, Kazuki TAKAHASHI
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Publication number: 20230386798Abstract: There is provided a substrate processing apparatus comprising: a plasma processing chamber; a support accommodated in the plasma processing chamber; an inner edge ring provided around a substrate; an outer edge ring provided around the inner edge ring, the outer edge ring having an inner peripheral portion overlapping an outer peripheral portion of the inner edge ring when viewed from above and having a first alignment portion; an outer edge ring electrostatic chuck disposed at a position of the support, the position facing the outer edge ring; and a lifter configured to move the inner edge ring and/or the outer edge ring up and down. The inner edge ring is configured to be aligned with the outer edge ring by the first alignment portion in a state in which the outer edge ring electrostatic chuck is driven and the outer edge ring is attracted.Type: ApplicationFiled: May 19, 2023Publication date: November 30, 2023Applicant: Tokyo Electron LimitedInventors: Mohd Fairuz BIN BUDIMAN, Shinya MORIKITA, Masafumi URAKAWA
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Patent number: 11832524Abstract: A method of processing a substrate includes a first step, a second step and a third step. The substrate includes an etching layer and a mask. The mask is formed on a first surface of the etching layer. The first step forms a first film on a second surface of the mask. The second step forms a second film having a material of the etching layer on the first film by etching the first surface of the etching layer. The third step removes the first film and the second film by exposing the substrate after the second step to plasma of a processing gas. The first film has an electrode material. The processing gas includes oxygen.Type: GrantFiled: July 30, 2019Date of Patent: November 28, 2023Assignee: Tokyo Electron LimitedInventors: Takuya Kubo, Song yun Kang
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Patent number: 11828794Abstract: There is provided a placement table having an upper surface on which a device to be processed is placed. The placement table comprises: a top plate having a placement surface for the device; a heating unit configured to heat the top plate; a plurality of temperature sensors configured to acquire temperature of the top plate at desired measurement positions in a plan view; and a positioning unit electrically connected to the temperature sensors and configured to position the temperature sensors at the measurement positions in a plan view. The positioning unit is formed of a flexible substrate having flexibility.Type: GrantFiled: October 22, 2021Date of Patent: November 28, 2023Assignee: Tokyo Electron LimitedInventors: Shigeru Kasai, Tomohiro Ota
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Patent number: 11826794Abstract: A substrate cleaning apparatus includes: a support part configured to support a substrate by bring into contact with a rear surface of the substrate; an annular member disposed to surround a periphery of the substrate supported on the support part and including an inclined surface that is inclined with respect to a horizontal plane in a diametrical direction of the annular member; a rotation part configured to rotate the support part and the annular member; a first supply part configured to supply a cleaning liquid toward the rear surface of the substrate supported on the support part; and a second supply part configured to supply the cleaning liquid toward the inclined surface.Type: GrantFiled: October 7, 2021Date of Patent: November 28, 2023Assignee: Tokyo Electron LimitedInventors: Yuki Ito, Norihiro Itoh
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Patent number: 11832026Abstract: In one embodiment, a substrate imaging apparatus includes: a rotary holding unit that holds and rotates a substrate; a mirror member having a reflecting surface that opposes an end face of the substrate and a peripheral portion of a back surface of the substrate held by the rotary holding unit, the reflecting surface being inclined with respect to a rotation axis of the rotary holding unit; and a camera having an imaging device that receives both first light and second light through a lens, the first light coming from a peripheral portion of a front surface of the substrate held by the rotary holding unit, and the second light being a reflected light of second light which comes from the end face of the substrate held by the rotary holding unit and is reflected by the reflecting surface.Type: GrantFiled: March 2, 2021Date of Patent: November 28, 2023Assignee: Tokyo Electron LimitedInventors: Norihisa Koga, Tadashi Nishiyama, Yasuaki Noda
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Patent number: 11830852Abstract: Aspects of the present disclosure provide a multi-tier semiconductor structure. For example, the multi-tier semiconductor structure can include a first power delivery network (PDN) structure, and a first semiconductor device tier disposed over and electrically connected to the first PDN structure. The multi-tier semiconductor structure can further include a signal wiring tier disposed over and electrically connected to the first semiconductor device tier, a second semiconductor device tier disposed over and electrically connected to the signal wiring tier, and a second PDN structure disposed over and electrically connected to the second semiconductor device tier. The multi-tier semiconductor structure can further include a through-silicon via (TSV) structure electrically connected to the signal wiring tier, wherein the TSV structure penetrates the second PDN structure.Type: GrantFiled: December 3, 2021Date of Patent: November 28, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Lars Liebmann, Jeffrey Smith, Daniel Chanemougame, Paul Gutwin, Brian Cline, Xiaoqing Xu, David Pietromonaco
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Patent number: 11830704Abstract: A plasma processing apparatus includes: a processing container; an electrode that places a workpiece thereon; a plasma generation source that supplies plasma into the processing container; a bias power supply that supplies a bias power to the electrode; an edge ring disposed at a periphery of the workpiece; a DC power supply that supplies a DC voltage to the edge ring; a controller that executes a first control procedure in which the DC voltage periodically repeats a first state having a first voltage value and a second state having a second voltage value, the first voltage value is supplied in a partial time period within each period of a potential of the electrode, and the second voltage value is supplied such that the first and second states are continuous.Type: GrantFiled: January 25, 2023Date of Patent: November 28, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Chishio Koshimizu, Shin Hirotsu
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Patent number: 11830709Abstract: An exemplary plasma processing system includes a plasma processing chamber, an electrode for powering plasma in the plasma processing chamber, a tunable radio frequency (RF) signal generator configured to output a first signal at a first frequency and a second signal at a second frequency. The second frequency is at least 1.1 times the first frequency. The system includes a broadband power amplifier coupled to the tunable RF signal generator, the first frequency and the second frequency being within an operating frequency range of the broadband power amplifier. The output of the broadband power amplifier is coupled to the electrode. The broadband power amplifier is configured to supply, at the output, first power at the first frequency and second power at the second frequency.Type: GrantFiled: October 11, 2021Date of Patent: November 28, 2023Assignee: Tokyo Electron LimitedInventors: Jianping Zhao, Peter Ventzek
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Patent number: 11832373Abstract: A plasma processing apparatus includes an antenna configured to generate plasma of a processing gas in a chamber. The antenna includes: an inner coil provided around the gas supply unit to surround a gas supply unit; and an outer coil provided around the gas supply unit and the inner coil to surround them. The outer coil is configured such that both ends of a wire forming the outer coil are opened; power is supplied from a power supply unit to a central point of the wire; the vicinity of the central point of the wire is grounded; and the outer coil resonates at a wavelength that is a half of a wavelength of the high frequency power. The inner coil is configured such that both ends of a wire forming the inner coil are connected through a capacitor and the inner coil is inductively coupled with the inner coil.Type: GrantFiled: September 21, 2022Date of Patent: November 28, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Yohei Yamazawa, Takehisa Saito, Mayo Uda, Keigo Toyoda, Alok Ranjan, Toshiki Nakajima
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Patent number: 11830751Abstract: A plasma processing apparatus includes a base, an electrostatic chuck provided on the base, and a dielectric layer. A bias power, whose magnitude is changed during plasma processing on a target substrate, is applied to the base. The electrostatic chuck has a central portion on which the target substrate is mounted and an outer peripheral portion on which a focus ring is mounted to surround the target substrate. The dielectric layer is provided between the outer peripheral portion of the electrostatic and the base or the focus ring and has an electrostatic capacitance that reduces a difference between an electrostatic capacitance of the central portion of the electrostatic chuck and an electrostatic capacitance of the outer peripheral portion of the electrostatic chuck.Type: GrantFiled: April 16, 2021Date of Patent: November 28, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Shoichiro Matsuyama, Daiki Satoh, Yasuharu Sasaki, Takashi Nishijima, Jinyoung Park
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Patent number: 11830876Abstract: According to an aspect of the disclosure, a semiconductor device is provided. The semiconductor device includes a stack of insulating layers and interconnect layers that are positioned alternatingly over a substrate. The semiconductor device includes a channel structure extending from the substrate and further through the insulating layers and the interconnect layers. The channel structure includes a first channel section positioned over the substrate and coupled to a first group of the interconnect layers, and a second channel section positioned over the first channel section and coupled to a second group of the interconnect layers. The semiconductor device also includes a plurality of contact structures extending from and coupled to the interconnect layers in a staircase configuration such that each of the plurality of contact structures extends from a respective interconnect layer.Type: GrantFiled: October 19, 2021Date of Patent: November 28, 2023Assignee: Tokyo Electron LimitedInventors: H. Jim Fulford, Mark I. Gardner, Partha Mukhopadhyay
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Patent number: 11830741Abstract: A method of selectively forming a film on a substrate includes: a preparation process of preparing a substrate having a surface to which a metal film and an insulating film are exposed; a first removal process of removing a natural oxide film on the metal film; a first film forming process of forming a self-assembled monolayer, which suppresses formation of a titanium nitride film, on the insulating film by providing the substrate with a compound for forming the self-assembled monolayer, the compound having a functional group containing fluorine and carbon; a second film forming process of forming a titanium nitride film on the metal film; an oxidation process of oxidizing the surface of the substrate; and a second removal process of removing a titanium oxide film, which is formed on the metal film and the self-assembled monolayer, by providing the surface of the substrate with the compound.Type: GrantFiled: February 28, 2020Date of Patent: November 28, 2023Assignee: Tokyo Electron LimitedInventors: Shinichi Ike, Shuji Azumo, Yumiko Kawano, Hiroki Murakami
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Publication number: 20230377844Abstract: A plasma processing apparatus disclosed includes a chamber, a substrate support, a radio-frequency power supply, and a bias power supply. The substrate support includes an electrode and is provided in the chamber. The radio-frequency power supply supplies radio-frequency power for generating plasma from a gas in the chamber. The bias power supply is electrically coupled to the electrode of the substrate support. The radio-frequency power supply is configured to supply the radio-frequency power in an ignition period in which the plasma is ignited in the chamber. The bias power supply is configured to sequentially apply a plurality of bias pulses, each of which has a negative voltage, to the electrode of the substrate support, and stepwisely or gradually increase absolute values of voltage levels of the plurality of bias pulses in the ignition period.Type: ApplicationFiled: August 3, 2023Publication date: November 23, 2023Applicant: Tokyo Electron LimitedInventors: Shingo TAKAHASHI, Jenhung HUANG
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Publication number: 20230377985Abstract: A method of manufacturing a semiconductor device includes forming a stack of epitaxially grown layers alternating between a first semiconductor material and a second semiconductor material that is etch selective to the first semiconductor material. Fin structures are formed from the stack. The fin structures include channel structures formed of the first semiconductor material. Source/drain (S/D) structures are formed on opposing ends of the channel structures by epitaxially growing a third semiconductor material. A silicide is formed around the S/D structures.Type: ApplicationFiled: May 18, 2023Publication date: November 23, 2023Applicant: Tokyo Electron LimitedInventor: Jeffrey SMITH
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Publication number: 20230378366Abstract: A semiconductor device may include a transistor structure. The transistor structure may include a metal structure extending along a vertical direction; a gate dielectric layer around the metal structure; a channel layer around the gate dielectric layer; a first metal electrode disposed below the metal structure and in electrical contact with a first end of the channel layer; a second metal electrode disposed above the metal structure and in electrical contact with a second end of the channel layer; and a third metal electrode disposed above and in electrical contact with the metal structure.Type: ApplicationFiled: May 20, 2022Publication date: November 23, 2023Applicant: Tokyo Electron LimitedInventors: H. Jim Fulford, Mark I. Gardner, Partha Mukhopadhyay
