Patents Assigned to Tokyo Electron Limited
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Patent number: 11848189Abstract: A substrate processing method includes supplying a developing liquid configured to form a resist pattern onto a surface of a substrate on which a resist film is formed; performing multiple cycles of a cleaning processing of supplying a modifying liquid containing a modifying agent having a hydrophilic group onto the surface of the substrate on which the resist pattern is formed and supplying a rinse liquid configured to remove the modifying liquid onto the surface of the substrate; and drying the surface of the substrate after performing the multiple cycles of the cleaning processing.Type: GrantFiled: September 2, 2020Date of Patent: December 19, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Takahiro Shiozawa, Hiroki Tadatomo, Akiko Kai, Hiroshi Ichinomiya
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Patent number: 11848236Abstract: Process flows and methods are provided for recessing a fill material within openings formed within a patterned substrate. The openings are formed within a multilayer stack comprising a target material layer and one or more additional material layers, which overly and differ from the target material layer. After the openings are formed within the multilayer stack, a grafting material comprising a solubility-shifting agent is selectively deposited within the openings, such that the grafting material adheres to the target material layer without adhering to the additional material layer(s) overlying the target material layer. Next, a fill material is deposited within the openings and the solubility-shifting agent is activated to change the solubility of a portion of the fill material adjacent to and surrounding the grafting material. Then, a wet development process is used to remove the soluble/insoluble portions of fill material to the recess the fill material within the openings.Type: GrantFiled: September 20, 2021Date of Patent: December 19, 2023Assignee: Tokyo Electron LimitedInventors: Anton deVilliers, Michael Murphy
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Publication number: 20230402263Abstract: A plasma processing apparatus includes: a processing chamber, and an electrode mechanism used for plasma processing. The electrode mechanism includes: an electrode portion configured to be applied with radio-frequency power, a dielectric portion disposed to laminate with the electrode portion, an electric circuit at least partially disposed in the dielectric portion, and a shield member disposed in the dielectric portion to overlap at least a part of the electric circuit in at least one of a plan view or a side view.Type: ApplicationFiled: August 28, 2023Publication date: December 14, 2023Applicant: Tokyo Electron LimitedInventor: Naoki MATSUMOTO
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Publication number: 20230402269Abstract: A plasma processing apparatus includes: a plasma processing chamber; a substrate support disposed in the plasma processing chamber; an edge ring disposed on the substrate support to surround a substrate on the substrate support; an actuator configured to vertically move the edge ring; a gas supply configured to supply a cleaning gas into the plasma processing chamber; a power source configured to supply a power to the substrate support; and a controller configured to: (a) maintain the edge ring at a first position spaced apart from the substrate support; and (b) supply a power to the substrate support while supplying the cleaning gas into the plasma processing chamber to generate a local plasma in a gap between the edge ring maintained at the first position and the substrate support, thereby cleaning the edge ring and the substrate support.Type: ApplicationFiled: August 28, 2023Publication date: December 14, 2023Applicant: Tokyo Electron LimitedInventor: Chishio KOSHIMIZU
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Publication number: 20230402289Abstract: An etching method is implementable with a plasma processing apparatus including a chamber. The method includes (a) providing, in the chamber, a substrate including an etching target film and a mask on the etching target film, and (b) etching the etching target film using plasma generated from a process gas including a hydrogen fluoride gas. The mask contains at least one metal selected from the group consisting of tungsten, molybdenum, ruthenium, titanium, indium, gallium, and zinc.Type: ApplicationFiled: June 9, 2023Publication date: December 14, 2023Applicant: Tokyo Electron LimitedInventors: Kae TAKAHASHI, Maju TOMURA, Yoshihide KIHARA, Noriyoshi ARIMA
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Publication number: 20230402505Abstract: A semiconductor device may include a transistor structure. The transistor structure can include a first source/drain structure. The transistor structure can include a first channel structure disposed above the first source/drain structure. The transistor structure can include a second source/drain structure disposed above the first channel structure. A sidewall of a first portion of the first source/drain structure, a sidewall of the first channel structure, and a sidewall of the second source/drain structure can be vertically aligned with one another. The transistor structure can include a first metal electrode disposed around the sidewall of the first channel structure and the sidewall of the second source/drain structure.Type: ApplicationFiled: June 9, 2022Publication date: December 14, 2023Applicant: Tokyo Electron LimitedInventors: Mark I. Gardner, H. Jim Fulford
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Patent number: 11841617Abstract: A method of forming a pattern on a substrate is provided. The method includes forming a first layer on an underlying layer of the substrate, where the first layer is patterned to have a first structure. The method also includes depositing a grafting material on side surfaces of the first structure, where the grafting material includes a solubility-shifting material. The method further includes diffusing the solubility-shifting material by a predetermined distance into a neighboring structure that abuts the solubility-shifting material, where the solubility-shifting material changes solubility of the neighboring structure in a developer, and removing soluble portions of the neighboring structure using the developer to form a second structure.Type: GrantFiled: September 17, 2020Date of Patent: December 12, 2023Assignee: Tokyo Electron LimitedInventors: Anton J. Devilliers, Jodi Grzeskowiak, Daniel Fulford, Richard A. Farrell, Jeffrey Smith
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Patent number: 11844290Abstract: Embodiments of process flows and methods are provided for forming a resistive switching random access memory (ReRAM). More specifically, process flows and methods are provided for reducing the forming voltage needed to form a conductive path in the ReRAM cells. A wide variety of plasma doping processes are used to introduce a plurality of different dopants into a metal-oxide dielectric film. By utilizing at least two different dopants, the plasma doping processes described herein reduce the forming voltage of the subsequently formed ReRAM cell compared to conventional processes that use only one dopant. In some embodiments, the forming voltage may be further reduced by applying a bias power during the plasma doping process, wherein the bias power is preselected to increase the number of ions introduced into the metal-oxide dielectric film during the plasma doping process.Type: GrantFiled: June 3, 2021Date of Patent: December 12, 2023Assignees: Tokyo Electron Limited, International Business Machines CorporationInventors: Devi Koty, Qingyun Yang, Hongwen Yan, Hiroyuki Miyazoe, Takashi Ando, Marinus Johannes Petrus Hopstaken
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Patent number: 11842886Abstract: A plasma processing method includes: supplying a gas into a processing container; and intermittently supplying microwave powers output from a plurality of microwave introducing modules into the processing container. In the intermittently supplying the microwave powers, the supply of all the microwave powers from the plurality of microwave introducing modules is periodically in an OFF state for a given time.Type: GrantFiled: October 5, 2020Date of Patent: December 12, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Taro Ikeda, Hirokazu Ueda, Eiki Kamata, Mitsutoshi Ashida, Isao Gunji
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Patent number: 11842919Abstract: A method of microfabrication is provided. An initial stack of layers is formed over a semiconductor layer. The initial stack of layers can include a plurality of substacks separated from each other by one or more transition layers. One or more of the substacks include a sacrificial gate layer sandwiched between two first dielectric layers. Openings can be formed in the initial stack of layers so that the semiconductor layer is uncovered. The openings can be filled with vertical channel structures, where each vertical channel structure extends through a respective substack. The initial stack can be divided into separate stacks that include the vertical channel structures surrounded by the substacks and the transition layers. The one or more transition layers can be removed from the separate stacks to uncover transition points between neighboring vertical channel structures. Isolation structures can be formed at the transition points.Type: GrantFiled: November 11, 2020Date of Patent: December 12, 2023Assignee: Tokyo Electron LimitedInventors: Mark I. Gardner, H. Jim Fulford
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Patent number: 11842900Abstract: A disclosed etching method includes (a) etching a titanium nitride film with a first plasma, and (b) etching the titanium nitride film with a second plasma. The first plasma is generated from a first processing gas, and the second plasma is generated from a second processing gas. One of the first processing gas and the second processing gas contains a chlorine-containing gas and a fluorocarbon gas, and the other of the first processing gas and the second processing gas contains a chlorine-containing gas and does not contain a fluorocarbon gas. A repetition of a cycle including the operations (a) and (b) is performed. The repetition of the cycle is stopped in a state where the titanium nitride film is partially etched in a film thickness direction thereof.Type: GrantFiled: May 12, 2021Date of Patent: December 12, 2023Assignee: Tokyo Electron LimitedInventor: Ryuichi Asako
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Patent number: 11840759Abstract: A method includes: forming a titanium nitride base film containing silicon by alternately repeating: precipitation of titanium nitride by alternately and repeatedly supplying a titanium-containing gas, and supplying a nitriding gas to a substrate on which a recess is formed; and precipitation of silicon nitride by alternately and repeatedly supplying a silicon-containing gas, and supplying a nitriding gas to the substrate; and subsequently, forming a tungsten film so as to bury tungsten in the recess in which the titanium nitride base film is formed, by alternately and repeatedly supplying a raw material gas containing a tungsten raw material and a reaction gas reacting with the raw material gas, to the substrate. A supply flow rate of the silicon-containing gas is adjusted so that a content of the silicon in the titanium nitride base film is high on an opening side rather than on an inner side of the recess.Type: GrantFiled: March 7, 2022Date of Patent: December 12, 2023Assignee: Tokyo Electron LimitedInventors: Masafumi Takahashi, Kenji Suzuki, Tsuyoshi Takahashi, Masaki Sano
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Patent number: 11842904Abstract: A control device for a substrate processing apparatus stores a plurality of records each including a recipe for a substrate etching processing and a control value for a control target, the control value being an actual output value for the control target in the substrate etching processing; acquires a recipe at a start of the substrate etching processing when an abnormality occurs in the temperature sensor or in the concentration sensor; reads a record from among the plurality of records having a recipe identical to the recipe acquired at the start of the substrate etching processing; and executes the substrate etching processing based on the control value of the record read by the processor.Type: GrantFiled: February 21, 2022Date of Patent: December 12, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Hiroshi Yoshida, Takahiro Kawazu
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Patent number: 11841278Abstract: A temperature measurement sensor according to an exemplary embodiment includes a substrate and an optical fiber provided on an upper surface of the substrate and extending along the upper surface. The temperature measurement sensor further includes a light introduction path of a space that allows a space above the upper surface and a space below a lower surface of the substrate to communicate with each other and an optical coupling portion provided on the upper surface and disposed in the light introduction path. The optical coupling portion is optically connected to the end surface of the optical fiber. The optical fiber forms the first pattern shape and the second pattern shape. The first pattern shape includes the optical fiber more densely than the second pattern shape. Light incident on the optical coupling portion from a side of the lower surface through the light introduction path reaches the end surface through the optical coupling portion.Type: GrantFiled: July 11, 2019Date of Patent: December 12, 2023Assignee: Tokyo Electron LimitedInventors: Tong Wu, Tomohide Minami, Masaaki Miyagawa
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Patent number: 11843027Abstract: A method of manufacturing a semiconductor device is disclosed. The method includes laminating a thermally decomposable organic material on a substrate by supplying a material gas into a container in which the substrate having a first recess and a second recess, which has a wider width than a width of the first recess, are formed, fluidizing the organic material laminated on the substrate by heating the substrate to a first temperature, and removing the organic material laminated in the second recess.Type: GrantFiled: April 22, 2021Date of Patent: December 12, 2023Assignee: Tokyo Electron LimitedInventors: Tatsuya Yamaguchi, Syuji Nozawa
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Patent number: 11842906Abstract: A side surface unit of a heat treatment space S is formed by a shutter member 250 including an outer shutter 260 and an inner shutter 270. Supply air A is supplied as a horizontal laminar flow toward a wafer W from a lower end side of the shutter member 250, that is, from a gap d1 located on the level with the wafer W placed on a heat plate 211 of a mounting table 210. Supply air B is supplied into the heat treatment space S from an upper end side of the shutter member 250, that is, from a gap d2 positioned higher than the wafer W. A ratio between a flow rate of the supply air A and a flow rate of the supply air B is 4:1.Type: GrantFiled: February 25, 2021Date of Patent: December 12, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Hideaki Iwasaka, Kouichi Mizunaga, Takahiro Hayashida
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Publication number: 20230395407Abstract: A substrate processing apparatus includes a processing container that houses a substrate in an internal space thereof, a heating mechanism that heats the internal space from an outside of the internal space, a temperature measurement instrument that measures a temperature of the internal space, and a controller, wherein the controller has a measurement unit that measures a first temperature that is a temperature of the internal space in a case where the heating mechanism is heated at a first setting temperature and a second temperature that is a temperature of the internal space in a case where the heating mechanism is heated at a second setting temperature, and an estimation unit that estimates a setting temperature of the heating mechanism to set a temperature of the internal space at a desired temperature, based on the first setting temperature, the second setting temperature, the first temperature, and the second temperature.Type: ApplicationFiled: May 30, 2023Publication date: December 7, 2023Applicant: Tokyo Electron LimitedInventors: Tomofumi EMURA, Tomotaka OMAGARI, Tomoo HAYAMA
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Publication number: 20230395408Abstract: Aspects of the present disclosure provide a sensor for remote temperature measurement. For example, the sensor can include a light source configured to form an illumination beam, focusing optics configured to direct the illumination beam from the light source onto a semiconductor sample at an illuminated spot thereof, for exciting bandgap photoluminescence (PL) light in the semiconductor sample, collection optics configured to collect the bandgap PL light excited from the semiconductor sample, at least one optical detector configured to measure spectral intensities of the bandgap PL light in a vicinity of a semiconductor bandgap wavelength of the semiconductor sample, and transmission optics configured to transmit the bandgap PL light from the collection optics to the at least one optical detector.Type: ApplicationFiled: May 22, 2023Publication date: December 7, 2023Applicant: Tokyo Electron LimitedInventors: Ivan MALEEV, Yan SUN, Zheng YAN
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Publication number: 20230395380Abstract: A processing method in one embodiment includes: a step that takes an image of the end face of a reference substrate, whose warp amount is known, over the whole periphery thereof using a camera to obtain shape data of the end face of the reference substrate; a step that takes an image of the end face of a substrate over the whole periphery thereof using a camera to obtain shape data of the end face of the substrate; a step that calculates warp amount of the substrate based on the obtained shape data; a step that forms a resist film on a surface of the substrate; a step that determines the supply position from which an organic solvent is to be supplied to a peripheral portion of the resist film and dissolves the peripheral portion by the solvent supplied from the supply position to remove the same from the substrate.Type: ApplicationFiled: August 22, 2023Publication date: December 7, 2023Applicant: TOKYO ELECTRON LIMITEDInventors: Yasuaki NODA, Tadashi NISHIYAMA
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Publication number: 20230395390Abstract: A method including providing a substrate in a process chamber of a substrate processing apparatus, the substrate having a first region containing a silicon oxide film and a second region containing a film other than the silicon oxide film; adsorbing hydrogen fluoride on the substrate; and exposing the substrate with the absorbed hydrogen fluoride to plasma generated from an inert gas to selectively etch the first region with respect to the second region.Type: ApplicationFiled: August 24, 2023Publication date: December 7, 2023Applicant: Tokyo Electron LimitedInventors: Maju TOMURA, Satoshi OHUCHIDA, Yoshihide KIHARA