Patents Assigned to Tokyo Electron Limited
  • Patent number: 11842919
    Abstract: A method of microfabrication is provided. An initial stack of layers is formed over a semiconductor layer. The initial stack of layers can include a plurality of substacks separated from each other by one or more transition layers. One or more of the substacks include a sacrificial gate layer sandwiched between two first dielectric layers. Openings can be formed in the initial stack of layers so that the semiconductor layer is uncovered. The openings can be filled with vertical channel structures, where each vertical channel structure extends through a respective substack. The initial stack can be divided into separate stacks that include the vertical channel structures surrounded by the substacks and the transition layers. The one or more transition layers can be removed from the separate stacks to uncover transition points between neighboring vertical channel structures. Isolation structures can be formed at the transition points.
    Type: Grant
    Filed: November 11, 2020
    Date of Patent: December 12, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Mark I. Gardner, H. Jim Fulford
  • Patent number: 11842900
    Abstract: A disclosed etching method includes (a) etching a titanium nitride film with a first plasma, and (b) etching the titanium nitride film with a second plasma. The first plasma is generated from a first processing gas, and the second plasma is generated from a second processing gas. One of the first processing gas and the second processing gas contains a chlorine-containing gas and a fluorocarbon gas, and the other of the first processing gas and the second processing gas contains a chlorine-containing gas and does not contain a fluorocarbon gas. A repetition of a cycle including the operations (a) and (b) is performed. The repetition of the cycle is stopped in a state where the titanium nitride film is partially etched in a film thickness direction thereof.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: December 12, 2023
    Assignee: Tokyo Electron Limited
    Inventor: Ryuichi Asako
  • Patent number: 11840759
    Abstract: A method includes: forming a titanium nitride base film containing silicon by alternately repeating: precipitation of titanium nitride by alternately and repeatedly supplying a titanium-containing gas, and supplying a nitriding gas to a substrate on which a recess is formed; and precipitation of silicon nitride by alternately and repeatedly supplying a silicon-containing gas, and supplying a nitriding gas to the substrate; and subsequently, forming a tungsten film so as to bury tungsten in the recess in which the titanium nitride base film is formed, by alternately and repeatedly supplying a raw material gas containing a tungsten raw material and a reaction gas reacting with the raw material gas, to the substrate. A supply flow rate of the silicon-containing gas is adjusted so that a content of the silicon in the titanium nitride base film is high on an opening side rather than on an inner side of the recess.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: December 12, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Masafumi Takahashi, Kenji Suzuki, Tsuyoshi Takahashi, Masaki Sano
  • Patent number: 11842904
    Abstract: A control device for a substrate processing apparatus stores a plurality of records each including a recipe for a substrate etching processing and a control value for a control target, the control value being an actual output value for the control target in the substrate etching processing; acquires a recipe at a start of the substrate etching processing when an abnormality occurs in the temperature sensor or in the concentration sensor; reads a record from among the plurality of records having a recipe identical to the recipe acquired at the start of the substrate etching processing; and executes the substrate etching processing based on the control value of the record read by the processor.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: December 12, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Yoshida, Takahiro Kawazu
  • Patent number: 11841278
    Abstract: A temperature measurement sensor according to an exemplary embodiment includes a substrate and an optical fiber provided on an upper surface of the substrate and extending along the upper surface. The temperature measurement sensor further includes a light introduction path of a space that allows a space above the upper surface and a space below a lower surface of the substrate to communicate with each other and an optical coupling portion provided on the upper surface and disposed in the light introduction path. The optical coupling portion is optically connected to the end surface of the optical fiber. The optical fiber forms the first pattern shape and the second pattern shape. The first pattern shape includes the optical fiber more densely than the second pattern shape. Light incident on the optical coupling portion from a side of the lower surface through the light introduction path reaches the end surface through the optical coupling portion.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: December 12, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Tong Wu, Tomohide Minami, Masaaki Miyagawa
  • Patent number: 11843027
    Abstract: A method of manufacturing a semiconductor device is disclosed. The method includes laminating a thermally decomposable organic material on a substrate by supplying a material gas into a container in which the substrate having a first recess and a second recess, which has a wider width than a width of the first recess, are formed, fluidizing the organic material laminated on the substrate by heating the substrate to a first temperature, and removing the organic material laminated in the second recess.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: December 12, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Tatsuya Yamaguchi, Syuji Nozawa
  • Patent number: 11842906
    Abstract: A side surface unit of a heat treatment space S is formed by a shutter member 250 including an outer shutter 260 and an inner shutter 270. Supply air A is supplied as a horizontal laminar flow toward a wafer W from a lower end side of the shutter member 250, that is, from a gap d1 located on the level with the wafer W placed on a heat plate 211 of a mounting table 210. Supply air B is supplied into the heat treatment space S from an upper end side of the shutter member 250, that is, from a gap d2 positioned higher than the wafer W. A ratio between a flow rate of the supply air A and a flow rate of the supply air B is 4:1.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: December 12, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hideaki Iwasaka, Kouichi Mizunaga, Takahiro Hayashida
  • Publication number: 20230395407
    Abstract: A substrate processing apparatus includes a processing container that houses a substrate in an internal space thereof, a heating mechanism that heats the internal space from an outside of the internal space, a temperature measurement instrument that measures a temperature of the internal space, and a controller, wherein the controller has a measurement unit that measures a first temperature that is a temperature of the internal space in a case where the heating mechanism is heated at a first setting temperature and a second temperature that is a temperature of the internal space in a case where the heating mechanism is heated at a second setting temperature, and an estimation unit that estimates a setting temperature of the heating mechanism to set a temperature of the internal space at a desired temperature, based on the first setting temperature, the second setting temperature, the first temperature, and the second temperature.
    Type: Application
    Filed: May 30, 2023
    Publication date: December 7, 2023
    Applicant: Tokyo Electron Limited
    Inventors: Tomofumi EMURA, Tomotaka OMAGARI, Tomoo HAYAMA
  • Publication number: 20230395408
    Abstract: Aspects of the present disclosure provide a sensor for remote temperature measurement. For example, the sensor can include a light source configured to form an illumination beam, focusing optics configured to direct the illumination beam from the light source onto a semiconductor sample at an illuminated spot thereof, for exciting bandgap photoluminescence (PL) light in the semiconductor sample, collection optics configured to collect the bandgap PL light excited from the semiconductor sample, at least one optical detector configured to measure spectral intensities of the bandgap PL light in a vicinity of a semiconductor bandgap wavelength of the semiconductor sample, and transmission optics configured to transmit the bandgap PL light from the collection optics to the at least one optical detector.
    Type: Application
    Filed: May 22, 2023
    Publication date: December 7, 2023
    Applicant: Tokyo Electron Limited
    Inventors: Ivan MALEEV, Yan SUN, Zheng YAN
  • Publication number: 20230395380
    Abstract: A processing method in one embodiment includes: a step that takes an image of the end face of a reference substrate, whose warp amount is known, over the whole periphery thereof using a camera to obtain shape data of the end face of the reference substrate; a step that takes an image of the end face of a substrate over the whole periphery thereof using a camera to obtain shape data of the end face of the substrate; a step that calculates warp amount of the substrate based on the obtained shape data; a step that forms a resist film on a surface of the substrate; a step that determines the supply position from which an organic solvent is to be supplied to a peripheral portion of the resist film and dissolves the peripheral portion by the solvent supplied from the supply position to remove the same from the substrate.
    Type: Application
    Filed: August 22, 2023
    Publication date: December 7, 2023
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yasuaki NODA, Tadashi NISHIYAMA
  • Publication number: 20230395390
    Abstract: A method including providing a substrate in a process chamber of a substrate processing apparatus, the substrate having a first region containing a silicon oxide film and a second region containing a film other than the silicon oxide film; adsorbing hydrogen fluoride on the substrate; and exposing the substrate with the absorbed hydrogen fluoride to plasma generated from an inert gas to selectively etch the first region with respect to the second region.
    Type: Application
    Filed: August 24, 2023
    Publication date: December 7, 2023
    Applicant: Tokyo Electron Limited
    Inventors: Maju TOMURA, Satoshi OHUCHIDA, Yoshihide KIHARA
  • Publication number: 20230395421
    Abstract: There is a mounting pad for placing an object, comprising: a base; and an annular outer edge portion that is provided on one surface of the base, projects in a direction intersecting a surface direction of said one surface to surround an outer edge of said one surface, and is to be in contact with the object, wherein a thickness of the outer edge portion in at least one portion of the outer edge portion is different from a thickness of the outer edge portion in the other portions of outer edge portion.
    Type: Application
    Filed: June 6, 2023
    Publication date: December 7, 2023
    Applicant: Tokyo Electron Limited
    Inventors: Masato OBARA, Gakuto TAKADA, Hideyuki OSADA, Genichi NANASAKI, Kento TOKAIRIN, Shuhei MATSUMOTO
  • Patent number: 11837652
    Abstract: A method of fabricating a semiconductor device includes placing a semiconductor wafer into a processing chamber, the semiconductor wafer including a first conductive layer and a second conductive layer separated by an intermediate layer; applying an electrical bias voltage across the intermediate layer by coupling the first conductive layer to a first potential and coupling the second conductive layer to a second potential; and annealing the semiconductor wafer while applying the electrical bias voltage.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: December 5, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: David Hurley, Ioan Domsa, Ian Colgan, Gerhardus Van Der Linde, Patrick Hughes, Maciej Burel, Barry Clarke, Mihaela Ioana Popovici, Lars-Ake Ragnarsson
  • Patent number: 11837480
    Abstract: Provided is a temperature controlling apparatus in which the accuracy of the temperature control of a processing target substrate is maintained high even when heaters are disconnected. The temperature controlling apparatus includes an electronic chuck, a plurality of heaters, and a controller. The heaters are embedded inside the electrostatic chuck in each divided region and connected to each other in parallel. The controller determines, for each divided region, whether a part of the heaters embedded in the divided region is disconnected, based on a total value of currents flowing through the heaters embedded in the divided region. When it is determined that a part of the heaters embedded in the divided region is disconnected, the controller controls a current flowing through each heater embedded in the divided region where a part of the heaters is disconnected to become larger than a current flowing through each heater when none of the heaters is disconnected.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: December 5, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Katsuyuki Koizumi, Kengo Kaneko
  • Patent number: 11834745
    Abstract: Systems and methods are provided herein to improve the efficiency of an atomic layer deposition (ALD) cycle by providing an improved purge block design. The improved purge block prevents gas mixing, regardless of the rotational speed of the platen, by providing a lower cavity on an underside of the purge block, and in some embodiments, by providing an upper cavity on a topside of the purge block. The lower/upper cavity provides a gas conduction path that distributes purge gas evenly beneath/above the purge block and provides uniform gas flow conductance within the lower/upper cavity. Compared to conventional purge block designs, the improved purge block design described herein provides a narrower, yet more effective isolation barrier, which prevents gas mixing even at high rotational speeds of the platen.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: December 5, 2023
    Assignee: Tokyo Electron Limited
    Inventor: Anthony Dip
  • Patent number: 11837465
    Abstract: A deposition method for embedding a SiN film in a recessed pattern formed on a surface of a substrate includes: (a) activating and supplying a first process gas containing NH3 to the surface of the substrate and causing NHx groups to adsorb on the surface of the substrate, where x is 1 or 2; (b) supplying a silicon-containing gas to the surface of the substrate on which the NHx groups are adsorbed and causing the silicon-containing gas to adsorb on the NHx groups; and (c) activating and supplying a second process gas containing N2 to the surface of the substrate on which the NHx groups are adsorbed and partly replacing the NHx groups with N groups, wherein (a) and (b) are repeated, and (c) is performed every time (a) and (b) are repeated a predetermined number of times.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: December 5, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Jun Ogawa, Takayuki Karakawa
  • Patent number: 11837574
    Abstract: A bonding apparatus includes a holder; a pressing member; and a curvature adjuster. The holder is configured to attract and hold a substrate to be bonded. The pressing member is configured to come into contact with a central portion of the substrate attracted to and held by the holder and press the substrate to allow the central portion of the substrate to be protruded. The curvature adjuster is configured to adjust a curvature of the substrate pressed by the pressing member.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: December 5, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kenji Sugakawa, Yosuke Omori
  • Patent number: 11837442
    Abstract: A plasma processing apparatus includes a process container, an electrode arranged inside the process container and applied with desired high frequency power, a member having the electrode, and an embedded member arranged in the member. The embedded member is composed of a first member formed with one or more outer flow paths on an outer periphery of the embedded member, and a second member formed with one or more inner flow paths connected to the one or more outer flow paths by joining with the first member. The one or more outer flow paths and the one or more inner flow paths communicate with each other.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: December 5, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Eitaro Kataoka
  • Patent number: 11835278
    Abstract: A temperature control medium processing apparatus configured to collect a temperature control medium from a module using the temperature control medium or refill the module with the temperature control medium includes a tank configured to store the temperature control medium therein; a first inlet path which is connected to a first inlet opening of the tank, and through which the temperature control medium is introduced; an inlet connector configured to connect the first inlet path and a path from the module; an outlet path which is connected to an outlet opening of the tank, and through which the temperature control medium is flown out; an outlet connector configured to connect the outlet path and a path to the module; and a pump provided at the outlet path, and configured to force the temperature control medium stored in the tank to be flown out.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: December 5, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hayato Sakai, Takehiko Arita, Haruka Kaneko, Satoshi Suzuki
  • Patent number: 11837471
    Abstract: A method of forming a semiconductor device includes depositing a first layer over a substrate and patterning the first layer using an extreme ultraviolet (EUV) lithography process to form a patterned layer and expose portions of the substrate. The method includes, in a plasma processing chamber, generating a first plasma from a gas mixture including SiCl4 and one or more of argon, helium, nitrogen, and hydrogen. The method includes exposing the substrate to the first plasma to deposit a second layer including silicon over the patterned layer.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: December 5, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Katie Lutker-Lee, Jake Kaminsky, Yu-Hao Tsai, Angelique Raley, Mingmei Wang