Patents Assigned to Translucent Inc.
  • Patent number: 7645517
    Abstract: Atomic layer epitaxy (ALE) is applied to the fabrication of new forms of rare-earth oxides, rare-earth nitrides and rare-earth phosphides. Further, ternary compounds composed of binary (rare-earth oxides, rare-earth nitrides and rare-earth phosphides) mixed with silicon and or germanium to form compound semiconductors of the formula RE—(O, N, P)—(Si,Ge) are also disclosed, where RE=at least one selection from group of rare-earth metals, O=oxygen, N=nitrogen, P=phosphorus, Si=silicon and Ge=germanium. The presented ALE growth technique and material system can be applied to silicon electronics, opto-electronic, magneto-electronics and magneto-optics devices.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: January 12, 2010
    Assignee: Translucent, Inc.
    Inventor: Petar B. Atanackovic
  • Patent number: 7646066
    Abstract: A method of fabricating a double gate FET on a silicon substrate includes the steps of sequentially epitaxially growing a lower gate layer of crystalline rare earth silicide material on the substrate, a lower gate insulating layer of crystalline rare earth insulating material, an active layer of crystalline semiconductor material, an upper gate insulating layer of crystalline rare earth insulating material, and an upper gate layer of crystalline rare earth conductive material. The upper gate layer and the upper gate electrically insulating layer are etched and a contact is deposited on the upper gate layer to define an upper gate structure. An impurity is implanted into the lower gate layer to define a lower gate area aligned with the upper gate structure. A source and drain are formed in the active layer and contacts are deposited on the source and drain, respectively.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: January 12, 2010
    Assignee: Translucent, Inc.
    Inventor: Petar B. Atanakovic
  • Patent number: 7605531
    Abstract: A full color display comprising a red, a green, and a blue light emitting diode, each light emitting diode including a light emitting region having at least one layer of single crystal rare earth material, the rare earth material in each of the light emitting diodes having at least one radiative transition, and the rare earth material producing a radiation wavelength of approximately 640 nm in the red light emitting diode, 540 nm in the green light emitting diode, and 460 nm in the blue light emitting diode. Generally, the color of each LED is determined by selecting a rare earth with a radiative transition producing a radiation wavelength at the selected color. In cases where the rare earth has more than one radiative transition, tuned mirrors can be used to select the desired color.
    Type: Grant
    Filed: October 25, 2005
    Date of Patent: October 20, 2009
    Assignee: Translucent, Inc.
    Inventors: Michael Lebby, Vijit Sabnis, Petar B. Atanackovic
  • Patent number: 7586177
    Abstract: A method of fabricating a semiconductor-on-insulator semiconductor wafer is described that includes providing first and second semiconductor substrates. A first insulating layer is formed on the first substrate with a first predetermined stress and a second insulating layer is formed on the second substrate with a second predetermined stress different than the first predetermined stress. The first insulating layer is bonded to the second insulating layer to form a composite insulating layer bonding the first substrate to the second substrate and a portion of the one substrate is removed to form a thin crystalline active layer on the composite insulating layer. The first and second insulating layers are formed with different stresses to provide a desired composite stress, which can be any stress from compressive to unstressed to tensile, depending upon the desired application.
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: September 8, 2009
    Assignee: Translucent, Inc.
    Inventor: Petar B. Atanakovic
  • Patent number: 7579623
    Abstract: A method of horizontally stacking transistors on a common semiconductor substrate is initiated by providing a single crystal, generally silicon, semiconductor substrate. A plurality of transistors are formed on the single crystal semiconductor substrate and encapsulated in an insulating layer, such as silicon dioxide. One or more openings are formed through the insulating layer between the plurality of transistors so as to expose a surface of the single crystal semiconductor substrate. A layer of single crystal rare earth insulator material is epitaxially grown on the exposed surface of the single crystal semiconductor substrate. A layer of single crystal semiconductor material, generally silicon, is epitaxially grown on the layer of single crystal rare earth insulator material. An intermixed transistor is formed on the layer of single crystal semiconductor material.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: August 25, 2009
    Assignee: Translucent, Inc.
    Inventors: Petar B. Atanackovic, Michael Lebby
  • Publication number: 20090183774
    Abstract: The present invention relates to semiconductor devices suitable for electronic, optoelectronic and energy conversion applications. In a particular form, the present invention relates to the fabrication of a thin film solar energy conversion device and wafer scale module through the combination of single crystal semiconductors, insulators, rare-earth based compounds and sapphire substrates. The use of thin film silicon allows large change in optical absorption co-efficient as a function of wavelength to be optimized for solar cell operation. New types of solar cell devices are disclosed for use as selective solar radiation wavelength absorbing sections to form multi-junction device and exceed single junction limit, without the use of different band gap semiconductors.
    Type: Application
    Filed: July 10, 2008
    Publication date: July 23, 2009
    Applicant: Translucent, Inc.
    Inventor: Petar B. Atanackovic
  • Patent number: 7538016
    Abstract: The present invention describes a method including the steps of providing a single crystal semiconductor substrate, forming a layer of rare earth silicide on a surface of the semiconductor substrate, forming a first layer of insulating material on the layer of rare earth silicide, forming a layer of electrically conductive material on the first layer of insulating material, and forming a second layer of insulating material on the layer of electrically conductive material. In one embodiment the step of forming the layer of rare earth silicide includes depositing a layer of rare earth metal on a surface of the semiconductor substrate depositing a layer of insulating material on the layer of rare earth metal, and annealing the structure to form a layer of rare earth silicide in conjunction with the surface of the semiconductor substrate and a rare earth doped insulating layer in conjunction with the layer of insulating material.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: May 26, 2009
    Assignee: Translucent, Inc.
    Inventors: Petar B. Atanakovic, Michael Lebby
  • Publication number: 20090085115
    Abstract: A method of fabricating semiconductor components in-situ and in a continuous integrated sequence includes the steps of providing a single crystal semiconductor substrate, epitaxially growing a first layer of rare earth insulator material on the semiconductor substrate, epitaxially growing a first layer of semiconductor material on the first layer of rare earth insulator material, epitaxially growing a second layer of rare earth insulator material on the first layer of semiconductor material, and epitaxially growing a second layer of semiconductor material on the second layer of rare earth insulator material. The first layer of rare earth insulator material, the first layer of semiconductor material, the second layer of rare earth insulator material, and the second layer of semiconductor material form an in-situ grown structure of overlying layers. The in-situ grown structure is etched to define a semiconductor component and electrical contacts are deposited on the semiconductor component.
    Type: Application
    Filed: December 9, 2008
    Publication date: April 2, 2009
    Applicant: TRANSLUCENT INC.
    Inventor: Petar B. Atanackovic
  • Patent number: 7498229
    Abstract: A method of fabricating semiconductor components in-situ and in a continuous integrated sequence includes the steps of providing a single crystal semiconductor substrate, epitaxially growing a first layer of rare earth insulator material on the semiconductor substrate, epitaxially growing a first layer of semiconductor material on the first layer of rare earth insulator material, epitaxially growing a second layer of rare earth insulator material on the first layer of semiconductor material, and epitaxially growing a second layer of semiconductor material on the second layer of rare earth insulator material. The first layer of rare earth insulator material, the first layer of semiconductor material, the second layer of rare earth insulator material, and the second layer of semiconductor material form an in-situ grown structure of overlying layers. The in-situ grown structure is etched to define a semiconductor component and electrical contacts are deposited on the semiconductor component.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: March 3, 2009
    Assignee: Translucent, Inc.
    Inventor: Petar B. Atanackovic
  • Patent number: 7476600
    Abstract: The invention includes a method of fabricating a gate structure for a field effect transistor and the gate structure. The method includes providing a crystalline silicon substrate and epitaxially growing a gate insulating layer of crystalline rare earth insulating material on the crystalline silicon substrate. A gate stack of crystalline silicon is then epitaxially grown on the layer of crystalline rare earth insulating material and doped to provide a desired type of conductivity. The gate insulating layer and the gate stack are etched and a metal electrical contact is deposited on the epitaxially grown gate stack of crystalline silicon to define a gate structure.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: January 13, 2009
    Assignee: Translucent, Inc.
    Inventor: Petar B. Atanackovic
  • Patent number: 7416959
    Abstract: A method of fabricating a semiconductor-on-insulator semiconductor substrate is disclosed that includes providing first and second semiconductor substrates. Either oxygen or nitrogen is introduced into a region adjacent the surface of the first semiconductor substrate and a rare earth and hydrogen are implanted at different energy levels into the second semiconductor substrate to produce a rare earth rich region adjacent the surface and a hydrogen layer spaced from the surface. The surface of the first semiconductor substrate is bonded to the surface of the second semiconductor substrate in a process that includes annealing to react either the oxygen or the nitrogen with the rare earth to form an interfacial insulating layer of either rare earth oxide or rare earth nitride. During the anneal the hydrogen layer is blistered and a portion of the second semiconductor substrate is removed and the surface polished to form a thin crystalline active layer on the interfacial insulating layer.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: August 26, 2008
    Assignee: Translucent Inc.
    Inventor: Petar B. Atanakovic
  • Publication number: 20080150031
    Abstract: A method of fabricating a double gate FET on a silicon substrate includes the steps of sequentially epitaxially growing a lower gate layer of crystalline rare earth silicide material on the substrate, a lower gate insulating layer of crystalline rare earth insulating material, an active layer of crystalline semiconductor material, an upper gate insulating layer of crystalline rare earth insulating material, and an upper gate layer of crystalline rare earth conductive material. The upper gate layer and the upper gate electrically insulating layer are etched and a contact is deposited on the upper gate layer to define an upper gate structure. An impurity is implanted into the lower gate layer to define a lower gate area aligned with the upper gate structure. A source and drain are formed in the active layer and contacts are deposited on the source and drain, respectively.
    Type: Application
    Filed: March 11, 2008
    Publication date: June 26, 2008
    Applicant: TRANSLUCENT INC.
    Inventor: Petar B. Atanackovic
  • Patent number: 7365357
    Abstract: A strained transistor includes a silicon transistor, an encapsulating layer of silicon insulating material with an outer surface, and a stress inducing multilayer cap deposited on the outer surface of the encapsulating layer with at least two layers including a layer of rare earth oxide and a layer including silicon. The stress inducing cap can be designed to provide either compressive strain or tensile strain and virtually any desired amount of strain without producing dislocations, defects, and fractures in the structure.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: April 29, 2008
    Assignee: Translucent Inc.
    Inventors: Petar B. Atanackovic, Michael Lebby
  • Patent number: 7364974
    Abstract: A method of fabricating a double gate FET on a silicon substrate includes the steps of sequentially epitaxially growing a lower gate layer of crystalline rare earth silicide material on the substrate, a lower gate insulating layer of crystalline rare earth insulating material, an active layer of crystalline semiconductor material, an upper gate insulating layer of crystalline rare earth insulating material, and an upper gate layer of crystalline rare earth conductive material. The upper gate layer and the upper gate electrically insulating layer are etched and a contact is deposited on the upper gate layer to define an upper gate structure. An impurity is implanted into the lower gate layer to define a lower gate area aligned with the upper gate structure. A source and drain are formed in the active layer and contacts are deposited on the source and drain, respectively.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: April 29, 2008
    Assignee: Translucent Inc.
    Inventor: Petar B. Atanackovic
  • Publication number: 20080093670
    Abstract: The present invention describes a method including the steps of providing a single crystal semiconductor substrate, forming a layer of rare earth silicide on a surface of the semiconductor substrate, forming a first layer of insulating material on the layer of rare earth silicide, forming a layer of electrically conductive material on the first layer of insulating material, and forming a second layer of insulating material on the layer of electrically conductive material. In one embodiment the step of forming the layer of rare earth silicide includes depositing a layer of rare earth metal on a surface of the semiconductor substrate depositing a layer of insulating material on the layer of rare earth metal, and annealing the structure to form a layer of rare earth silicide in conjunction with the surface of the semiconductor substrate and a rare earth doped insulating layer in conjunction with the layer of insulating material.
    Type: Application
    Filed: December 20, 2007
    Publication date: April 24, 2008
    Applicant: TRANSLUCENT INC.
    Inventors: Petar Atanakovic, MICHAEL LEBBY
  • Patent number: 7323396
    Abstract: The present invention describes a method including the steps of providing a single crystal semiconductor substrate, forming a layer of rare earth silicide on a surface of the semiconductor substrate, forming a first layer of insulating material on the layer of rare earth silicide, forming a layer of electrically conductive material on the first layer of insulating material, and forming a second layer of insulating material on the layer of electrically conductive material. In one embodiment the step of forming the layer of rare earth silicide includes depositing a layer of rare earth metal on a surface of the semiconductor substrate depositing a layer of insulating material on the layer of rare earth metal, and annealing the structure to form a layer of rare earth silicide in conjunction with the surface of the semiconductor substrate and a rare earth doped insulating layer in conjunction with the layer of insulating material.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: January 29, 2008
    Assignee: Translucent Inc.
    Inventors: Petar B. Atanackovic, Michael Lebby
  • Publication number: 20080020545
    Abstract: A method of fabricating a semiconductor-on-insulator semiconductor substrate is disclosed that includes providing first and second semiconductor substrates. Either oxygen or nitrogen is introduced into a region adjacent the surface of the first semiconductor substrate and a rare earth and hydrogen are implanted at different energy levels into the second semiconductor substrate to produce a rare earth rich region adjacent the surface and a hydrogen layer spaced from the surface. The surface of the first semiconductor substrate is bonded to the surface of the second semiconductor substrate in a process that includes annealing to react either the oxygen or the nitrogen with the rare earth to form an interfacial insulating layer of either rare earth oxide or rare earth nitride. During the anneal the hydrogen layer is blistered and a portion of the second semiconductor substrate is removed and the surface polished to form a thin crystalline active layer on the interfacial insulating layer.
    Type: Application
    Filed: July 25, 2007
    Publication date: January 24, 2008
    Applicant: TRANSLUCENT INC.
    Inventor: Petar Atanackovic
  • Patent number: 7253080
    Abstract: A method of fabricating a semiconductor-on-insulator semiconductor substrate is disclosed that includes providing first and second semiconductor substrates. Either oxygen or nitrogen is introduced into a region adjacent the surface of the first semiconductor substrate and a rare earth and hydrogen are implanted at different energy levels into the second semiconductor substrate to produce a rare earth rich region adjacent the surface and a hydrogen layer spaced from the surface. The surface of the first semiconductor substrate is bonded to the surface of the second semiconductor substrate in a process that includes annealing to react either the oxygen or the nitrogen with the rare earth to form an interfacial insulating layer of either rare earth oxide or rare earth nitride. During the anneal the hydrogen layer is blistered and a portion of the second semiconductor substrate is removed and the surface polished to form a thin crystalline active layer on the interfacial insulating layer.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: August 7, 2007
    Assignee: Translucent Inc.
    Inventor: Petar B. Atanackovic
  • Patent number: 7217636
    Abstract: A method of fabricating a semiconductor-on-insulator semiconductor wafer is described that includes providing first and second semiconductor substrates. A first insulating layer is formed on the first substrate with a first predetermined stress and a second insulating layer is formed on the second substrate with a second predetermined stress different than the first predetermined stress. The first insulating layer is bonded to the second insulating layer to form a composite insulating layer bonding the first substrate to the second substrate and a portion of the one substrate is removed to form a thin crystalline active layer on the composite insulating layer. The first and second insulating layers are formed with different stresses to provide a desired composite stress, which can be any stress from compressive to unstressed to tensile, depending upon the desired application.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: May 15, 2007
    Assignee: Translucent Inc.
    Inventor: Petar B. Atanackovic
  • Patent number: 7037806
    Abstract: A method of fabricating a semiconductor-on-insulator semiconductor substrate is disclosed that includes providing first and second semiconductor substrates. Either oxygen or nitrogen is introduced into a region adjacent the surface of the first semiconductor substrate and a rare earth is introduced into a region adjacent the surface of the second semiconductor substrate. The surface of the first semiconductor substrate is bonded to the surface of the second semiconductor substrate in a process that includes annealing to react either the oxygen or the nitrogen with the rare earth to form an interfacial insulating layer of either rare earth oxide or rare earth nitride. A portion of either the first semiconductor substrate or the second semiconductor substrate is removed and the surface polished to form a thin crystalline active layer on the insulating layer.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: May 2, 2006
    Assignee: Translucent Inc.
    Inventor: Petar B. Atanackovic