Abstract: A wafer level package includes an epoxy layer formed on an adhesive covered substrate during manufacturing for securing electrical components in place prior to being embedded in a molded material. An electrically conductive block is fixed in the epoxy layer. Vias are formed for accessing face up component contacts using a metalized layer on the surface of the molded material. After stripping the adhesive and substrate, the epoxy layer is penetrated to expose electrical contacts for face down components. An electrical connection is made between the face up and face down components using the block. Optionally, a dielectric layer covers the molded material and a second metalized layer placed on the dielectric layer to carry another electrical component embedded in a second dielectric layer covering the first dielectric layer. Thus a stacked component arrangement including multiple die and passive components is effectively fabricated into the wafer level package.

Abstract: Embodiments of apparatuses, systems and methods relating to a mixer having high second- and third-order intercept points are disclosed. Other embodiments may be described and claimed.

Abstract: Embodiments provide a multi-stage radio frequency (RF) power amplifier (PA) having a low dynamic error vector magnitude (EVM). A first stage of the RF PA may include a first active device configured to receive an enable signal and to turn on in response to the enable signal, thereby activating the first stage. The RF PA may further include a second active device coupled in series with the first active device and configured to receive a main supply voltage. The second active device may provide a first supply voltage across the first active device that is less than and independent of the main supply voltage. One of the first active device or the second active device may be configured to receive an RF input signal and to pass an amplified RF output signal to a second stage of the RF PA circuit.

Abstract: Embodiments provide a switching device including one or more field-effect transistors (FETs) and bias circuitry. The one or more FETs may transition between an off state and an on state to facilitate switching of a transmission signal. The one or more FETs may include a drain terminal, a source terminal, a gate terminal, and a body. The biasing circuitry may bias the drain terminal and the source terminal to a first DC voltage in the on state and a second DC voltage in the off state. The first and second DC voltages may be non-negative. The biasing circuitry may be further configured to bias the gate terminal to the first DC voltage in the off state and the second DC voltage in the on state.

Abstract: Embodiments of circuits, methods and systems for a voltage-controlled current source are disclosed. In some embodiments, the voltage-controlled current source may be a three-terminal device having separated gate structures. Other embodiments may also be described and claimed.

Abstract: Embodiments include an apparatus, system, and method related to a body-contacted partially depleted silicon on insulator (PDSOI) transistor that may be used in a switch circuit. In some embodiments, the switch circuit may include a discharge transistor to provide a discharge path for a body of a switch transistor. Other embodiments may be described and claimed.

Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems of an integrated circuit (IC) device. The IC device may include a buffer layer disposed on a substrate, the buffer layer including gallium (Ga) and nitrogen (N), a barrier layer disposed on the buffer layer, the barrier layer including aluminum (Al) and nitrogen (N), a regrown structure disposed in and epitaxially coupled with the barrier layer, the regrown structure including nitrogen (N) and at least one of aluminum (Al) or gallium (Ga) and being epitaxially deposited at a temperature less than or equal to 600° C., and a gate terminal disposed in the barrier layer, wherein the regrown structure is disposed between the gate terminal and the buffer layer. Other embodiments may be described and/or claimed.

Abstract: A bulk acoustic wave (BAW) resonator is constructed to reduce phase and amplitude ripples in a frequency response. The BAW resonator is fabricated on a substrate 400 ?m thick or less, preferably approximately 325 ?m, having a first side and a polished second side with a peak-to-peak roughness of approximately 1000 A. A Bragg mirror having alternate layers of a high acoustic impedance material, such as tungsten, and a low acoustic impedance material is fabricated on the first side of the substrate. A BAW resonator is fabricated on the Bragg mirror. A lossy material, such as epoxy, coats the second side of the substrate opposite the first side. The lossy material has an acoustic impedance in the range of 0.01× to 1.0× the acoustic impedance of the layers of high acoustic impedance material.

Abstract: An elastic guided acoustic wave coupling resonator filter includes a dielectric layer interposed between piezoelectric substrates, with interdigital transducers on each substrate generally positioned at an interface between the substrates and the dielectric layer. The interdigital transducers on one substrate are aligned with the transducers on the opposing substrate and include cascaded filter tracks. The cascaded orientation between the two filter tracks includes either a differential connection or a balanced connection. As a result, the interdigital transducers are electrically isolated yet acoustically coupled to each other.

Abstract: Various embodiments may provide a circuit including a radio frequency (RF) power amplifier (PA) and a coupler (e.g., a directional coupler). The coupler may be coupled between a first impedance matching section and a second impedance matching section. The first matching section may transform a first impedance at the RF PA to a second impedance at an RF input port of the coupler. The second matching section may transform the second impedance at an RF output port of the coupler to a third impedance at an output terminal. The second impedance may be a real impedance and the third impedance may be a complex impedance. A real part of the third impedance may be greater than a real part of the second impedance. Additionally, the second impedance may be greater than the first impedance.

Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems of an integrated circuit (IC) device. The IC device may include a buffer layer disposed on a substrate, the buffer layer including gallium (Ga) and nitrogen (N), a barrier layer disposed on the buffer layer, the barrier layer including aluminum (Al) and nitrogen (N), wherein the barrier layer includes an oxidized portion of the barrier layer, a gate dielectric disposed on the oxidized portion of the barrier layer, and a gate electrode disposed on the gate dielectric, wherein the oxidized portion of the barrier layer is disposed in a gate region between the gate electrode and the buffer layer.

Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems of a device such as a transistor. The device includes a buffer layer disposed on a substrate, the buffer layer being configured to serve as a channel of a transistor and including gallium (Ga) and nitrogen (N), a barrier layer disposed on the buffer layer, the barrier layer being configured to supply mobile charge carriers to the channel and including aluminum (Al), gallium (Ga), and nitrogen (N), a charge-inducing layer disposed on the barrier layer, the charge-inducing layer being configured to induce charge in the channel and including aluminum (Al) and nitrogen (N), and a gate terminal disposed in the charge-inducing layer and coupled with the barrier layer to control the channel. Other embodiments may also be described and/or claimed.

Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems of an integrated circuit (IC) device. The IC device may include a thermal spreader having graduated thermal expansion parameters. In some embodiments, the thermal spreader may have a first layer with a first coefficient of thermal expansion (CTE) and a second layer with a second CTE that is greater than the first CTE. Other embodiments may be described and/or claimed.

Abstract: Embodiments of apparatuses, methods, and systems for a radio frequency amplification circuit providing for fast loadline modulation are generally described herein. Other embodiments may be described and claimed.

Abstract: Embodiments include but are not limited to apparatuses and systems including a die package including a substrate, a die coupled with a top surface of the substrate, a package wall disposed on the top surface of the substrate and bounding the die, and a package lid coupled with the package wall, and including at least one protrusion facilitating a coupling of the package lid with the package wall. At least one edge of the top surface of the die pad may include an etched portion such that a width of the top surface is narrower than a width of the bottom surface. At least one edge of a top surface of at least one of the leads may include an etched portion such that a width of the top surface is narrower than a width of the bottom surface. Other embodiments may be described and claimed.

Abstract: Disclosed embodiments include a surface acoustic wave device having electrode period, electrode width, and/or ratio of electrode width to electrode period varied in a prescribed manner.

Abstract: Embodiments provide a multi-stage radio frequency (RF) power amplifier (PA) having a low dynamic error vector magnitude (EVM). A first stage of the RF PA may include a first active device configured to receive an enable signal and to turn on in response to the enable signal, thereby activating the first stage. The RF PA may further include a second active device coupled in series with the first active device and configured to receive a main supply voltage. The second active device may provide a first supply voltage across the first active device that is less than and independent of the main supply voltage. One of the first active device or the second active device may be configured to receive an RF input signal and to pass an amplified RF output signal to a second stage of the RF PA circuit.

Abstract: Embodiments provide a radio frequency (RF) switching apparatus including an RF switching device configured to receive an RF input signal and to pass an RF output signal if the RF switching device is activated. The RF switching apparatus may include a control terminal to receive a control signal to activate the RF switching device. A gate resistor may be coupled between the control terminal and a gate terminal of the RF switching device. A helper circuit may be coupled in parallel with the gate resistor. The helper circuit may be configured to provide a temporary conductive path between the control terminal and the gate terminal in response to a state transition of the control signal. The helper circuit may provide an open circuit between the control terminal and the gate terminal during a steady state of the control signal between state transitions.

Abstract: Apparatus and methods for limiting a radio frequency (RF) signal are disclosed. An example apparatus includes a detector configured to generate a detection signal based on a power of a RF signal on a signal path. A bias circuit may bias a switch circuit to dynamically limit the RF signal based on the detection signal.

Abstract: Embodiments of the present disclosure flip-chip packaging techniques and configurations. An apparatus may include a package substrate having a plurality of pads formed on the package substrate, the plurality of pads being configured to receive a corresponding plurality of interconnect structures formed on a die and a fluxing underfill material disposed on the package substrate, the fluxing underfill material comprising a fluxing agent configured to facilitate formation of solder bonds between individual interconnect structures of the plurality of interconnect structures and individual pads of the plurality of pads and an epoxy material configured to harden during formation of the solder bonds to mechanically strengthen the solder bonds. Other embodiments may also be described and/or claimed.