Patents Assigned to Ultratech, Inc.
  • Patent number: 10351950
    Abstract: An improved Plasma Enhanced Atomic Layer Deposition (PEALD) system and related operating methods are disclosed. A vacuum reaction chamber includes a vacuum system that separates a first outflow from the reaction chamber, comprising unreacted first precursor, from a second outflow from the reaction chamber, comprising second precursor and any reaction by products from the reaction of the second precursor with the coating surfaces. A trap, including trap material surfaces, is provided to remove first precursor from the first outflow when the first precursor reacts with the trap material surfaces. When the second precursor includes a plasma generated material, the second precursor is not passed through the trap. An alternate second precursor source injects a suitable second precursor into the trap to complete a material deposition layer onto the trap surfaces thereby preparing the trap material surfaces to react with the first precursor on the next material deposition cycle.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: July 16, 2019
    Assignee: Ultratech, Inc.
    Inventors: Mark Sowa, Robert Kane, Michael Sershen
  • Patent number: 10353208
    Abstract: High-efficiency line-forming optical systems and methods that employ a serrated aperture are disclosed. The line-forming optical system includes a laser source, a beam conditioning optical system, a first aperture device, and a relay optical system that includes a second aperture device having the serrated aperture. The serrated aperture is defined by opposing serrated blades configured to reduce intensity variations in a line image formed at an image plane as compared to using an aperture having straight-edged blades.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: July 16, 2019
    Assignee: Ultratech, Inc.
    Inventor: Serguei Anikitchev
  • Patent number: 10316406
    Abstract: Methods of forming an ALD-inhibiting layer using a layer of SAM molecules include providing a metalized substrate having a metal M and an oxide layer of the metal M. A reduction gas that includes a metal Q is used to reduce the oxide layer of the metal M, leaving a layer of form of M+MQyOx atop the metal M. The SAM molecules are provided as a vapor and form an ALD-inhibiting SAM layer on the M+MQyOx layer. Methods of performing S-ALD using the ALD-inhibiting SAM layer are also disclosed.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: June 11, 2019
    Assignee: Ultratech, Inc.
    Inventor: Laurent Lecordier
  • Patent number: 10269662
    Abstract: A method of processing a reconstituted wafer that supports IC chips includes operably disposing the reconstituted wafer in a lithography tool that has a depth of focus and a focus plane and that defines exposure fields on the reconstituted wafer, wherein each exposure field includes at least one of the IC chips. The method also includes scanning the reconstituted wafer with a line scanner to measure a surface topography of the reconstituted wafer as defined by the IC chips. The method also includes, for each exposure field: i) adjusting a position and/or an orientation of the reconstituted wafer so that a photoresist layers of the IC chips within the given exposure field fall within the depth of focus; and ii) performing an exposure with the lithography tool to pattern the photoresist layers of the IC chips in the given exposure field.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: April 23, 2019
    Assignee: Ultratech, Inc.
    Inventors: Paul M. Bischoff, Emily M. True, Raymond Ellis, A. J. Crespin
  • Patent number: 10249491
    Abstract: Atomic Layer Deposition (ALD) is used for heteroepitaxial film growth at reaction temperatures ranging from 80-400° C. The substrate and film materials are preferably matched to take advantage of Domain Matched Epitaxy (DME). A laser annealing system is used to thermally anneal deposition layer after deposition by ALD. In preferred embodiments, a silicon substrate is overlaid with an AlN nucleation layer and laser annealed. Thereafter a GaN device layer is applied over the AlN layer by an ALD process and then laser annealed. In a further example embodiment, a transition layer is applied between the GaN device layer and the AlN nucleation layer. The transition layer comprises one or more different transition material layers each comprising a AlxGa1-xN compound wherein the composition of the transition layer is continuously varied from AlN to GaN.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: April 2, 2019
    Assignee: Ultratech, Inc.
    Inventors: Ganesh Sundaram, Andrew M. Hawryluk, Daniel Stearns
  • Patent number: 10090153
    Abstract: Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer Deposition (ALD) followed by rapid thermal annealing. Gallium nitride is grown directly on silicon or on a barrier layer of aluminum nitride grown on the silicon substrate. One or both layers are thermally processed by rapid thermal annealing. Preferably the ALD process use a reaction temperature below 550° C. and preferable below 350° C. The rapid thermal annealing step raises the temperature of the coating surface to a temperature ranging from 550 to 1500° C. for less than 12 msec.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: October 2, 2018
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Ganesh Sundaram, Ritwik Bhatia
  • Patent number: 10083843
    Abstract: Laser annealing systems and methods with ultra-short dwell times are disclosed. The method includes locally pre-heating the wafer with a pre-heat line image and then rapidly scanning an annealing image relative to the pre-heat line image to define a scanning overlap region that has a dwell time is in the range from 10 ns to 500 ns. These ultra-short dwell times are useful for performing surface or subsurface melt annealing of product wafers because they prevent the device structures from reflowing.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: September 25, 2018
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Serguei Anikitchev
  • Patent number: 10032883
    Abstract: Disclosed is an improved semiconductor structure (e.g., a silicon germanium (SiGe) hetero-junction bipolar transistor) having a narrow essentially interstitial-free SIC pedestal with minimal overlap of the extrinsic base. Also, disclosed is a method of forming the transistor which uses laser annealing, as opposed to rapid thermal annealing, of the SIC pedestal to produce both a narrow SIC pedestal and an essentially interstitial-free collector. Thus, the resulting SiGe HBT transistor can be produced with narrower base and collector space-charge regions than can be achieved with conventional technology.
    Type: Grant
    Filed: August 13, 2016
    Date of Patent: July 24, 2018
    Assignee: Ultratech, Inc.
    Inventors: Oleg Gluschenkov, Rajendran Krishnasamy, Kathryn T. Schonenberg
  • Patent number: 10016843
    Abstract: Systems and methods for reducing pulsed laser beam profile non-uniformities for laser annealing are disclosed. The methods include directing an initial pulsed laser beam along an optical axis, and imparting to each light pulse a time-varying angular deflection relative to the optical axis. This forms a new laser beam wherein each light pulse is smeared out over an amount of spatial deflection ? sufficient to reduce the micro-scale intensity variations in the laser beam. The new laser beam is then used to form the line image, which has better intensity uniformity as compared using the initial laser beam to form the line image.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: July 10, 2018
    Assignee: Ultratech, Inc.
    Inventor: Yun Wang
  • Patent number: 9960036
    Abstract: Atomic Layer Deposition (ALD) is used for heteroepitaxial film growth at reaction temperatures ranging from 80-400° C. The substrate and film materials are preferably matched to take advantage of Domain Matched Epitaxy (DME). A laser annealing system is used to thermally anneal deposition layer after deposition by ALD. In preferred embodiments, a silicon substrate is overlaid with an AlN nucleation layer and laser annealed. Thereafter a GaN device layer is applied over the AlN layer by an ALD process and then laser annealed. In a further example embodiment, a transition layer is applied between the GaN device layer and the AlN nucleation layer. The transition layer comprises one or more different transition material layers each comprising a AlxGa1-xN compound wherein the composition of the transition layer is continuously varied from AlN to GaN.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: May 1, 2018
    Assignee: Ultratech, Inc.
    Inventors: Ganesh Sundaram, Andrew M. Hawryluk, Daniel Stearns
  • Patent number: 9935022
    Abstract: Systems and methods of characterizing wafer shape using coherent gradient sensing (CGS) interferometry are disclosed. The method includes measuring at least 3×106 data points on a wafer surface using a CGS system to obtain a topography map of the wafer surface. The data are collected on a wafer for pre-processing and post-processing of the wafer, and the difference calculated to obtain a measurement of the effect of the process on wafer surface shape. The process steps for processing the same wafer or subsequent wafers are controlled based on measured process-induced change in the wafer surface shape in order to improve the quality of the wafer processing.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: April 3, 2018
    Assignee: Ultratech, Inc.
    Inventor: David M. Owen
  • Patent number: 9929011
    Abstract: Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer Deposition (ALD) followed by rapid thermal annealing. Gallium nitride is grown directly on silicon or on a barrier layer of aluminum nitride grown on the silicon substrate. One or both layers are thermally processed by rapid thermal annealing. Preferably the ALD process use a reaction temperature below 550° C. and preferable below 350° C. The rapid thermal annealing step raises the temperature of the coating surface to a temperature ranging from 550 to 1500° C. for less than 12 msec.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: March 27, 2018
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Ganesh Sundaram, Ritwik Bhatia
  • Patent number: 9783888
    Abstract: An ALD coating method to provide a coating surface on a substrate is provided. The ALD coating method comprises: providing a deposition heading including a unit cell having a first precursor nozzle assembly and a second precursor nozzle assembly; emitting a first precursor from the first precursor nozzle assembly into chamber under atmospheric conditions in a direction substantially normal to the coating surface; emitting a second precursor from the first precursor nozzle assembly into chamber under atmospheric conditions in a direction substantially normal to the coating surface; removing moving the substrate under the deposition head such that the first precursor is directed onto a first area of the coating surface prior to the second precursor being directed onto the first area of the coating surface.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: October 10, 2017
    Assignee: Ultratech, Inc.
    Inventors: Michael J. Sershen, Ganesh M. Sundaram, Roger R. Coutu, Jill Svenja Becker, Mark J. Dalberth
  • Patent number: 9784570
    Abstract: Polarization-based coherent gradient-sensing systems and methods for measuring at least one surface-shape property of a specularly reflective surface are disclosed. The method includes: reflecting a first circularly polarized laser beam from a sample surface to form a second circularly polarized laser beam that contains surface-shape information; converting the second circularly polarized laser beam to a linearly polarized reflected laser beam; directing respective first and second portions of the linearly polarized reflected laser beam to first and second relay assemblies that constitute first and second interferometer arms. The first and second relay assemblies each use a pair of axially spaced-apart gratings to generate respective first and second interference patterns at respective first and second image sensors. Respective first and second signals from the first and second image sensors are processed to determine the at least one surface-shape property.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: October 10, 2017
    Assignee: Ultratech, Inc.
    Inventor: David G. Stites
  • Patent number: 9777371
    Abstract: A gas deposition system (1000) configured as a dual-chamber “tower” includes a frame (1140) for supporting two reaction chamber assemblies (3000), one vertically above the other. Each chamber assembly (3000) includes an outer wall assembly surrounding a hollow chamber (3070) sized to receive a single generation 4.5 (GEN 4.5) glass plate substrate through a load port. The substrate is disposed horizontally inside the hollow chamber (3070) and the chamber assembly (3000) includes removable and cleanable triangular shaped input (3150) and output (3250) plenums disposed external to the hollow chamber (3070) and configured to produce substantially horizontally directed laminar gas flow over a top surface of the substrate. Each chamber includes a cleanable and removable chamber liner assembly (6000) disposed inside the hollow chamber (3070) to contain precursor gases therein thereby preventing contamination of chamber outer walls (3010, 3020, 3030, 3040).
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: October 3, 2017
    Assignee: Ultratech, Inc.
    Inventors: Roger R. Coutu, Jill Svenja Becker, Ganesh M. Sundaram, Eric W. Deguns
  • Patent number: 9768016
    Abstract: Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer Deposition (ALD) followed by rapid thermal annealing. Gallium nitride is grown directly on silicon or on a barrier layer of aluminum nitride grown on the silicon substrate. One or both layers are thermally processed by rapid thermal annealing. Preferably the ALD process use a reaction temperature below 550° C. and preferable below 350° C. The rapid thermal annealing step raises the temperature of the coating surface to a temperature ranging from 550 to 1500° C. for less than 12 msec.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: September 19, 2017
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Ganesh Sundaram, Ritwik Bhatia
  • Publication number: 20170260629
    Abstract: A quartz crystal microbalance assembly includes a lid of a reactor chamber of an ALD system. A QCM crystal is disposed in a bottom section of a central cavity formed in the lid. A central portion of a front surface of the QCM crystal is exposed to an interior of the reactor chamber. A retainer arranged within the central cavity and above the QCM crystal presses the QCM crystal against a ledge in the lid to form a seal between the front surface of the QCM crystal and the ledge while also establishing electrical contact with the QCM crystal. A flange resides immediately adjacent a top surface of the lid and seals the central cavity while supporting electrical contact with the QCM crystal through the retainer. A transducer external to the reactor chamber and in electrical contact with the QCM crystal through a connector in the flange drives the QCM crystal.
    Type: Application
    Filed: February 17, 2017
    Publication date: September 14, 2017
    Applicant: Ultratech, Inc.
    Inventors: Laurent Lecordier, Michael Ruffo
  • Publication number: 20170241019
    Abstract: Methods of performing PE-ALD on a substrate with reduced quartz-based contamination are disclosed. The methods include inductively forming in a quartz plasma tube a hydrogen-based plasma from a feed gas that consists essentially of either hydrogen and nitrogen or hydrogen, argon and nitrogen. The nitrogen constitutes 2 vol % or less of the feed gas. The hydrogen-based plasma includes one or more reactive species. The one or more reactive species in the hydrogen-based plasma are directed to the substrate to cause the one or more reactive species to react with a initial film on the substrate. The trace amounts of nitrogen serve to reduce the amount of quartz-based contamination in the initial film as compared to using no nitrogen in the feed gas.
    Type: Application
    Filed: January 27, 2017
    Publication date: August 24, 2017
    Applicant: Ultratech, Inc.
    Inventors: Mark J. Sowa, Adam Bertuch, Ritwik Bhatia
  • Patent number: 9711361
    Abstract: High-efficiency line-forming optical systems and methods for defect annealing and dopant activation are disclosed. The system includes a CO2-based line-forming system configured to form at a wafer surface a first line image having between 2000 W and 3000 W of optical power. The line image is scanned over the wafer surface to locally raise the temperature up to a defect anneal temperature. The system can include a visible-wavelength diode-based line-forming system that forms a second line image that can scan with the first line image to locally raise the wafer surface temperature from the defect anneal temperature to a spike anneal temperature. Use of the visible wavelength for the spike annealing reduces adverse pattern effects and improves temperature uniformity and thus annealing uniformity.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: July 18, 2017
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Serguei Anikitchev
  • Publication number: 20170194204
    Abstract: Through via holes are prepared for metallization using ALD and PEALD processing. Each via is coated with a titanium nitride barrier layer having a thickness ranging from 20 to 200 ?. A ruthenium sealing layer is formed over the titanium nitride barrier layer wherein the sealing layer is formed without oxygen to prevent oxidation of the titanium nitride barrier layer. A ruthenium nucleation layer is formed over the sealing layer wherein the nucleation layer is formed with oxygen in order to oxidize carbon during the application of the Ru nucleation layer. The sealing layer is formed by a PEALD method using plasma excited nitrogen radicals instead of oxygen.
    Type: Application
    Filed: August 27, 2014
    Publication date: July 6, 2017
    Applicant: Ultratech, Inc.
    Inventor: Mark Sowa