Abstract: The present invention is a circuit for producing an output voltage as a function of a first input voltage and a second input voltage. The circuit includes a first emitter-coupled transistor pair for receiving the first and second input voltages. The circuit further includes a compensation circuit coupled to receive the first and the second input voltage signals. The compensation circuit generates a compensation current that is at least partially based on a relative difference between the first and the second input voltage signals. The compensation circuit is coupled to the first emitter-coupled transistor pair such that the compensation circuit provides the compensation current to the first emitter-coupled transistor pair. The output signal is representative of either the first or the second input voltage.

Abstract: The present invention implements a novel emitter scheme that maximizes the emitter perimeter to emitter area ratio of an integrated circuit transistor, thereby achieving improved low noise characteristics over the prior art. Emitter regions are disposed in the transistor in discrete "dotted " segments. The dotted emitter segments may be realized by etching into emitter regions defined by an appropriately formed photoresistive overlay, which can be modified without fabrication process changes. The effect is to reduce the total emitter area by half, while maintaining the total emitter perimeter unchanged. As a result, the noise-capacitance product of the transistor is reduced, improving the overall performance of the transistor.

Abstract: An open-loop biasing circuit for a magnetoresistive element provides high common mode and power supply rejection. Two current sources are connected together by two conduction paths. A first conduction path has two impedances. One impedance is tied between the first current source and ground and the second impedance is tied between the second current source and ground. The second conduction path includes the magnetoresistive element. A capacitive path between the two current sources reduces power supply noise and a voltage follower reduces parasitic capacitance in the capacitive path.

Abstract: A first differential amplifier circuit is provided having a first and second input terminal suited for connection to a magnetic head. The first differential amplifier circuit includes first and second output terminals for providing a read output signal. A second differential amplifier circuit is provided which has first and second input terminals connected to the first and second input terminals, respectively, the first differential amplifier circuit. The second differential amplifier circuit also includes first and second output terminals. A first feedback capacitor is provided which is connected between the first input terminal of the first differential amplifier circuit and the first output terminal of the second differential amplifier circuit. A second feedback capacitor is provided which is connected between the second input terminal of the first differential amplifier circuit and the second output terminal of the second differential amplifier circuit.

Abstract: A magnetoresistive sensor and preamplifier system has an excess differential imbalance detector, (a) for detecting magnitude differences between a pair of signals occurring at the output of a preamplifier subsystem due to modal transitions, and (b) for initiating action to overcome same. The excess imbalance detector changes a threshold therein to become more sensitive to smaller imbalances in the output signals being monitored after detection of a modal transition imbalance.

Abstract: A write driver for a two-terminal inductive load comprises an H-bridge switching circuit and a push-pull driver circuit. The H-bridge switching circuit responds to a first mode to conduct a current in a first direction through the inductive load and responds to a second mode to conduct the current in a second direction through the inductive load. The push-pull driver circuit responds to the first mode to push a charge current into a first control node of the H-bridge and responds to the second mode to pull a discharge current from the first control node. In one form, the write driver includes a second push-pull driver circuit responsive to the first mode to pull a discharge current from a second control node and to the second mode to push a charge current into the second control node.

Abstract: An apparatus conducts current through a two terminal inductive load. The apparatus has a first conduction path, from a first supply voltage to one terminal of the inductive load and a second conduction path from the second terminal of the inductive load to a second supply voltage. The first conduction path includes a switching device that is controlled by a field-effect transistor having a gate terminal, second terminal, and third terminal. The gate terminal of the field-effect transistor is coupled to a reference voltage. The voltage at the second terminal of the field-effect transistor increases when the voltage at the field-effect transistor's third terminal increases.

Abstract: A direct AC-coupled amplifier for use with a plurality of magnetoresistive read elements includes a differential amplifier having first and second inputs and first and second outputs. A plurality of input circuits are provided, one for each MR element. Each input circuit has first and second connections to opposite sides of the respective MR element and a pair of emitter-follower its. Each emitter-follower circuit comprises a transistor having a base connected to one of the connections and a collector arranged to be connected a first voltage source. A capacitor is connected between the emitter of each of the transistors and a respective input of the amplifier. A current is applied to the first and second connections of a selected one of the input circuits to operate the respective MR element.

Abstract: A write driver drives a current through a two-terminal inductive load. A switching circuit drives current through the inductive load, and connects to the inductive load and to at least one control node. A driver circuit charges and discharges the control node in response to an input signal. The driver circuit has at least one charging path to charge the control node and at least two active discharging paths to discharge the control node.

Abstract: The present invention implements a novel emitter scheme that maximizes the emitter perimeter to emitter area ratio of an integrated circuit transistor, thereby achieving improved low noise characteristics over the prior art. Emitter regions are disposed in the transistor in discrete "dotted" segments. The dotted emitter segments may be realized by etching into emitter regions defined by an appropriately formed photoresistive overlay, which can be modified without fabrication process changes. The effect is to reduce the total emitter area by half, while maintaining the total emitter perimeter unchanged. As a result, the noise-capacitance product of the transistor is reduced, improving the overall performance of the transistor.

Abstract: A power supply filter is constructed with a capacitive element and an active element coupled to a filtered node and an impedance coupled between the filtered node and a power supply node. The filtered node for carrying a filtered version of a power supply signal on the power supply node. The active element having electrical characteristics such that the addition of the active element to the power supply filter reduces the amount of capacitance needed from the capacitive element to achieve a desired pole frequency for a given voltage drop across the impedance element.

Abstract: The present invention is a magnetoresistive element amplifier circuit for amplifying signals produced by a magnetoresistive element. The amplifier circuit includes a gain setting resistor and a first and second transistor. The first transistor has a pair of controlled terminals connected between first and second supply terminals and in series with the magnetoresistive element. The second transistor is connected to the first transistor in a cascode configuration. The second transistor has a pair of controlled terminals connected between the first and second supply terminals and in series with the gain setting resistor. The magnetoresistive element is in a separate DC current path from the gain setting resistor. The first and second transistors provide small signal current through the gain setting resistor for producing gain adjusted output signals.

Abstract: A programmable phase comparator comprises a switch circuit operable in response to first and second signals to provide an output signal representative of the phase relationship of the first and second signals. A reference signal is applied to the switch circuit to offset the output signal. A phase adjustment adjusts the phase relationship of the first and second signals so that the offset output signal is representative of a null condition. The switch circuit preferably is a Gilbert multiplier having a current source, an impedance means, and a transistor circuit connected between the current source and the impedance means. The transistor circuit has first and second inputs for receiving the first and second signals. The reference signal is input between the transistor circuit and the impedance means and is connected to an output. The output provides the output signal having a value based on the reference signal and the phase relationship of the first and second signals.

Abstract: The present invention discloses a write driver circuit for driving a magnetic head in an information storage system. The write driver circuit is connected to first and second voltage supply terminals and includes first and second data input terminals for receiving data input signals. The H-switch has a pair of pull-up transistors and a pair of pull-down transistors to switch current flow between a first direction and a second direction which is opposite to the first direction. A pair of anti-saturation circuits are connected to the H-switch to bias the pull-up transistors. The anti-saturation circuits contain a transistor having a collector, a base and an emitter and a pair of substantially similar diodes connected between the base and the collector of the transistor.

Abstract: A dry etching method for endpoint detection of a single crystal silicon wafer is disclosed. A top portion of the single crystal silicon wafer is doped with heavy levels of a doping agent, thereby creating heavily and lightly doped regions within the single crystal silicon wafer. A photoresist is patterned on the top surface of the single crystal silicon wafer and etching commences on the top surface. The etch rate is monitored as the etch progresses through the top portion of the single crystal silicon wafer to determine the etch endpoint. The etch endpoint is detected by a local minimum generated by the combined effects of wafer surface thermal heating and the change or etch rate between the heavily doped single crystal silicon and lightly doped single crystal silicon. Once the etch endpoint has been detected, the etching process is stopped, and the photoresist is removed, thereby exposing a doped product.

Abstract: A circuit for rapidly charging a capacitor for a transition between operating states is provided. A controlled reference voltage is provided to reference the circuit. A comparator compares signals at the comparator inputs and provides an output dependent upon the comparator input signals. The output of the comparator enables or disables a controlled current charging circuit. The current charging circuit rapidly charges the capacitor when enabled.

Abstract: A write driver for a magnetic transducer having a three-terminal inductive coil includes first and second voltage sources, a write current source, and a switching network having first and second switching transistors connected between the second voltage source and the respective first and second taps. The switching network responds to respective first and second inputs to switch the write current between respective first and second taps. Active pull-down subcircuits operate to alternately supply base current to the respective first and second switching transistors to charge parasitic capacitances of the respective switching transistors and to alternately sink base current from the respective switching transistors to discharge parasitic capacitances.

Abstract: A data storage system for storing and retrieving data signals on magnetic medium includes a magnetic transducer, a controller for issuing instructions, and a pre-amplifier adaptive to data storage parameters. The pre-amplifier includes a read amplifier having an adjustable gain, a write driver having an adjustable current source, and a serial shift register responsive to the instructions to selectively operate the read amplifier and the write driver and to issue control signals to first and second digital-to-analog converters to adjust the gain of the read amplifier and the current source of the write driver. Preferably first and second multiplexers are responsive to the control signals to select one of a plurality of magnetic transducers.

Abstract: The present invention is a read amplifier that is configured for interconnection with a magnetic head through head contacts. The read amplifier includes a differential transistor pair that is connected in a common emitter configuration. The bases of the differential transistor pair are connected across the magnetic head. A bias generator provides a bias current to the bases of the differential pair of transistors through first and second input resistors. The bias generator includes a circuit for providing a compensation voltage to the bases of the differential transistor pair that is based on changes in the bias current supplied to the differential transistor pair.

Abstract: A system for writing servo information to a plurality of magnetic discs in a servo write mode, and for writing data to the plurality of magnetic discs in a data write mode in disclosed. The system includes a servo binary input buffer for receiving a mode signal and for directing the write signal based upon the mode signal. A first plurality of switches, coupled to the servo binary input buffer and to a disc select buffer, directs the write signal to a selected portion of a plurality of write heads. A second plurality of switches, coupled to the first plurality of switches, to the plurality of write heads, and to a head select buffer, supplies the write signal to one write head in the selected portion of the plurality of write heads during the data write mode, and supplies the write signal to one half of the write heads in the selected portion of the plurality of write heads during the servo write mode.