Abstract: A logic translating buffer for low voltage operation for receiving a TTL compatible signal and providing a current mode logic signal. The logic translating buffer includes an emitter coupled differential pair of NPN transistors with the common emitters each being connected to a current source. One of the transistors of the differential pair has a constant voltage bias applied to the base thereof that is equal to the sum of a forward biased PN junction, a forward biased Schottky diode, and the voltage drop across a first resistor. The other transistor of the differential pair is provided a signal that is representative of the logic level input to the translating buffer. A clamping transistor is provided for keeping the other transistor of the differential pair from saturating.

Abstract: A read preamplifier for use in reading data in a magnetic storage system uses positive feedback to reduce the preamplifier's input capacitance. The read preamplifier includes first and second voltage supply terminals. An input is coupled to the second voltage supply terminal and receives input signals from a connected magnetic head. An output is coupled to the first voltage supply terminal and to the input for producing output signals based upon the input signals. A positive feedback circuit, coupled to the input reduces the input capacitance of the read preamplifier.

Abstract: The present invention is an improved current mirror circuit. This improved current mirror circuit includes first and second transistors of the same conductivity type and have bases connected together. The first transistor is connected between a first supply terminal and an input terminal. The second transistor is connected between a first supply terminal and an output terminal. Included is a feedback circuit for providing a voltage feedback between the input terminal and the bases of the first and second transistors. Also included is a bias circuit for providing a bias current to the feedback circuit that is based on the input current.

Abstract: A write driver for driving a transducer in a storage system. The write driver includes first and second supply terminals and a H-switch for switching current flow through the transducer between a first direction and a second direction, opposite to the first direction. The H-switch includes pull-up transistors and pull-down transistors connected across the transducer for switching current flow through the transducer. Each pull-up transistor and pull-down transistor has a control terminal for controlling current flow through the transistor. The write driver further includes data input terminals for receiving data signals. A bias circuit is connected between the control terminals of the pull-up and pull-down transistors and the data input terminals for switching the pull-up and pull-down transistors between conducting and non-conducting states as a function of the received data signals.

Abstract: A write circuit for driving a magnetic head in a magnetic storage system which greatly improves the voltage swing across the magnetic head. The write circuit includes data input for receiving data input signals, a predriver current source, a predriver circuit, and a write driver circuit. The predriver circuit is connected to the data input and has first and second predriver current paths. The predriver current paths are connected to a predriver current source. The predriver circuit directs current from the predriver current source through the first and second predriver current paths as a function of the data input signals. The write driver circuit has first and second write currents paths connected across the magnetic head. The first write current path directs current through the magnetic head in a first direction and the second write current path directs current through the magnetic head in a second direction, opposite to the first direction.

Abstract: A base current compensation circuit is configured for connection to a first current mirror that has lost base current. The compensation circuit includes a compensation mirror coupled in a feedback loop to the first current mirror. A current sensing transistor senses the lost base current. A current duplicating mirror is coupled to the current sensing transistor and generates a compensation current in response to the sensed lost base current. The compensation current is fed back into the first current mirror to compensate for the lost base current. A voltage clamp is coupled to the current sensing transistor and the current duplicating transistor. The voltage clamp maintains approximately equal collector-base voltages in the current sensing transistor and the current duplicating transistor to increase accuracy of the compensation mirror.

Abstract: An amplifier is compensated for variations in element values. A trim signal is generated based on element values of filter elements of a filter in the amplifier. An RC product in the amplifier is controlled based on the trim signal. The RC product corresponds to a product of a dynamic resistance value of a dynamic resistance element in the filter in the amplifier, and a capacitance value of capacitive elements in the filter. The RC product also determines a pole position of the amplifier. Gain in the amplifier is controlled based on the trim signal so that a desired gain is maintained.

Abstract: A data separator which extracts data embedded in a read signal includes a delay circuit that is controlled by a frequency synthesizer. The frequency synthesizer provides a write clock during write operations. A controlled oscillator included in the frequency synthesizer resides on a common integrated circuit with the delay circuit. Because component fabrication variations tend to track on a common integrated circuit, the frequency synthesizer compensates for fabrication variations in the delay circuit, thereby producing an accurate delay interval.

Abstract: A data separator for use in extracting data from a read signal includes a restart circuit. The data separator is comprised of a controlled oscillator, a delay circuit, a restart circuit, a phase detector and a data extractor. The delay circuit delays the read signal by an interval approximately equal to the time required to start the controlled oscillator after assertion of the start signal. Accordingly, the oscillator starts in-phase with the delayed read signal. In one embodiment of the present invention, the delay interval of the delay circuit is controlled by a frequency synthesizer which generates a write clock during write operations.

Abstract: A magnetic head swing clamp configured for interconnection with a read/write preamplifier of the type including a read differential transistor pair connected to an inductive head. The collectors of the transistors in the read differential transistor pair provide first and second read output signals at first and second read output terminals for connection to a read amplifier. The magnetic head swing clamp comprises a reference voltage generator which produces first and second reference voltage levels at first and second reference voltage output terminals. Positive and negative voltage clamps are electrically connected to the first and second reference voltage output terminals, respectively, and to the first and second read output terminals. The positive and negative voltage clamps clamp voltage swings in the first and second read output signals as functions of the first and second reference voltage levels.

Abstract: An amplifier is compensated for variations in element values. A trim signal is generated based on element values of filter elements of a filter in the amplifier. An RC product in the amplifier is controlled based on the trim signal. The RC product corresponds to a product of a dynamic resistance value of a dynamic resistance element in the filter in the amplifier, and a capacitance value of capacitive elements in the filter. The RC product also determines a pole position of the amplifier. Gain in the amplifier is controlled based on the trim signal so that a desired gain is maintained.

Abstract: An amplifier includes first and second transistors each of which has a conduction path, with first and second conduction path terminals, and a control terminal for controlling conduction through the conduction path. The amplifier also includes a current source and voltage reference terminal for being coupled to a voltage reference. A first Schottky diode has an intrinsic series resistance and is coupled between the second conduction path terminal of the first transistor and the current source. A second Schottky diode has an intrinsic series resistance and is coupled between the second conduction path terminal of the second transistor and the current source.

Abstract: A variable bandwidth differentiating amplifier comprises a differential amplifier and a variable filter comprising a capacitor and a pair of diodes. A current source, having a current value derived from the track postion information in the track count register of a disk drive forward biases the diodes to alter the frequency response of the filter. A Gilbert multiplier may also be included to maintain a constant voltage gain for the differential amplifier.