Abstract: Systems and methods for site-based calibration of object detection values, such as for surveillance video cameras, are described. Video data from a video image sensor may be processed using an object detector to determine object data and a confidence score for a detected object. The object data and confidence score may be post-processed to apply calibration values based on the camera location to one or more parameters used for determining detection events. Event notifications may be sent for detection events. The calibration values may be determined from a calibration period where a verification object detector is used to verify the object detections and failure analysis is applied to determine calibration values for the camera location.

Abstract: Various apparatuses, systems, methods, and media are disclosed to provide a magnetic recording medium with a tungsten (W) pre-seed layer. The W pre-seed layer has a higher conductance than a CrTi pre-seed layer with a similar thickness. In one embodiment, the W pre-seed layer is made of about 95 atomic percent or more of W. The W pre-seed layer has lower electrical resistivity than the CrTi pre-seed layer. As a result, the thickness of the W pre-seed layer can be reduced as compared to the thickness of a CrTi pre-seed layer if a similar conductance is to be achieved. The magnetic recording materials deposited on top of the W pre-seed layer with the reduced thickness provide comparable crystallographic orientation and recording performance to those deposited on top of a thicker CrTi pre-seed layer with a similar conductance.

Abstract: Systems and methods are disclosed that enable shared partitions to be created on devices owned and operated by trusted persons (e.g., family or friends). The disclosed devices and methods provide for partitioning of stored devices and designating one or more of the partitions for sharing with other devices. Access to the shared partitions is managed using coded images thereby requiring the devices to be physically close to one another. Consequently, people sharing the storage partitions are required to meet in person to grant access, increasing the chances that the persons know and trust one another.

Abstract: A method and apparatus for substrate component layout and bonding for increased package capacity. According to certain embodiments, a wire-bonding finger strip is disposed between a flip-chip die and a NAND die stack to reduce a keep out zone (KOZ) required for an underfill material dispensed beneath the flip-chip die. To further inhibit the flow of the underfill material and further reduce the KOZ, a solder mask may be placed adjacent to the flip-chip. According to certain embodiments, there may be at least three sides of the flip-chip that may have such an adjacent solder mask placement. The three sides of the flip-chip according to such embodiments may be those non-adjacent to the wire-bonding finger strip.

Abstract: The present disclosure generally relates to increasing data storage device lifetime by detecting synthetic PLP tests. Both upper and lower PLP time thresholds are set. When the PLP time is above the upper threshold, the data storage device is in a defensive PLP idle state. When the PLP time is between the upper and lower thresholds, the data storage device is in a defensive PLP detecting state. When the PLP time is below the lower threshold, the data storage device may enter the defensive PLP state if the number of times the PLP time is below the lower PLP time threshold either a consecutive number of times or a set number of times within a predefined window of time. While in the defensive PLP state, mounting is not completed and hence, a host device will not send any I/O commands and thus, not waste a PEC count.

Abstract: Read Fused Groups with uniform resource allocation. In one example, a data storage device including an electronic processor that, when executing the Uniform Read Fused Group scheme, is configured to receive information indicating each zone of a plurality of Zone Namespace (ZNS) zones is assigned to one of a plurality of Read Fused Groups (RFGs), assign a portion of a plurality of resources of a memory to the plurality of ZNS zones, control all of the plurality of concurrency units to process a first resource of the plurality of resources assigned to a first Read Fused Group (RFG) of the plurality of RFGs. The first resource is assigned to a first zone of the plurality of ZNS zones, the first zone is assigned to the first RFG, and the electronic processor is one of the plurality concurrency units.

Abstract: Methods and apparatus for thermal management in data storage devices are provided. One such data storage device includes a non-volatile memory (NVM), at least one ambient temperature sensor configured to detect an ambient temperature of the data storage device, at least one component temperature sensor configured to detect one or more component temperatures of one or more components of the data storage device, and a processor coupled to the NVM, the at least one ambient temperature sensor, and the at least one component temperature sensor. The processor is configured to determine a composite temperature of the data storage device based on the one or more component temperatures and the ambient temperature. The processor is further configured to determine whether the composite temperature exceeds a threshold and perform a thermal management operation if the composite temperature exceeds the threshold.

Abstract: A system and method for training base classifiers in a boosting algorithm includes optimally training base classifiers considering an unreliability model, and then using a scheme with an aggregator decoder that reverse-flips inputs using inter-classifier redundancy introduced in training.

Abstract: Disclosed herein are apparatuses for nucleic acid sequencing using magnetic labels (e.g., magnetic particles) and magnetic sensors. Also disclosed are methods of making and using such apparatuses. An apparatus for nucleic acid sequencing comprises a plurality of magnetic sensors, a plurality of binding areas disposed above the plurality of magnetic sensors, each of the binding areas for holding fluid, and at least one line for detecting a characteristic of at least a first magnetic sensor of the plurality of magnetic sensors, the characteristic indicating presence or absence of one or more magnetic nanoparticles coupled to a first binding area associated with the first magnetic sensor.

Abstract: The present disclosure generally relates to ensuring a data storage device consumes as little power as possible. Different HW modules in the data storage device can operate at different frequencies to ensure any bottleneck HW modules operate at as fast a frequency as possible, while non-bottleneck HW modules operate at slower frequencies and hence, consume less power. The frequency for each HW modules is dynamic and is adjusted based upon detected bottlenecks so that the data storage device can operate as efficiently as possible and consume as little power as possible.

Abstract: A semiconductor device package includes a substrate having a top and bottom surface and an electrical circuit. There is a semiconductor die electrically connected to the electrical circuit of the substrate. There are N adjacent first electrical contacts and N is an integer greater than 1. The N adjacent first electrical contacts are positioned within a first contact area on the bottom surface of the substrate. There is a second electrical contact that is associated with N independent common signals that are electrically connected at a single second electrical contact. The second electrical contact is positioned within a second contact area on the bottom surface of the substrate that is smaller than the first contact area. The second electrical contact reduces the total area required on the substrate for common signal contacts to allow for additional non-common signal contacts to be included in the semiconductor device package.

Abstract: The present disclosure generally relates to a tape drive comprising a tape head comprising one or more modules, wherein each module comprises a plurality of servo readers; a plurality of read elements; and a control circuitry configured to retrieve a priority servo reader designation for a bundle of data tracks of the plurality of data tracks, wherein the priority servo reader designation is one or more servo readers of the plurality of servo readers; use the designated priority servo reader to adjust a lateral position the tape head; retrieve a target delta Y position (?Ypos); and adjust a tilt of the tape head based on the target ?Ypos.

Abstract: A method for securing a data storage device (DSD) against rogue behaviour by a host, the method executed by a controller of the DSD and comprising: determining a host type of the host; detecting one or more access activities performed by the host on the DSD; processing the one or more access activities to determine a security threat level of the host, wherein the security threat level is determined by weighting one or more corresponding access activity parameters by one or more impact weights; and in response to determining that the security threat level of the host is greater than or equal to a rogue host threat level, controlling the access activities performable by the host on the DSD to safeguard the DSD against the host, wherein the one or more impact weights are dynamically determined based on the host type.

Abstract: A storage system receives a command from a host to overwrite data that is stored in a memory of the storage system. The command may have been issued in error or by malware, so the storage system preserves the data that the host wants to overwrite, just in case the host later wants to recover the data. To do this, the storage system associates the physical address of the location of the memory that stores the data with a logical block address that is inaccessible by the host. To recover the data, the storage system replaces the logical block address that is inaccessible by the host with a logical block address that is accessible by the host.

Abstract: A memory die assembly, comprising a non-volatile memory structure, performs autonomous testing of the memory die assembly by repeatedly performing a group of tests for multiple cycles such that the group of tests includes programming, erasing and reading the non-volatile memory structure. Failure events from the tests are recorded by storing error data for each recorded failure event including a location in the non-volatile memory structure of the failure event, a type of test that failed and a cycle during which the failure event occurred.

Abstract: A non-volatile memory system includes a control circuit connected to non-volatile memory cells. The control circuit is configured to concurrently program memory cells connected to different word lines that are in different sub-blocks of different blocks in different planes of a die.

Abstract: Disclosed are systems and methods for providing multi-phased programming with balanced Gray coding. A method includes programming, in a first phase, a first portion of data into memory cells of a flash memory in a first-level cell mode. The method also includes retaining, in a cache, at least a subset of the data. The method also includes regenerating the data from at least the cache, wherein the regenerated data includes a second portion of the data. The method also includes programming, in a second phase, the regenerated data in a second-level cell mode based on a mapping from the first-level cell mode to the second-level cell mode. The mapping maps each state distribution in the first-level cell mode to at least two non-adjacent state distributions in the second-level cell mode, and a width of each state distribution in the first-level cell mode may be narrowed.

Abstract: Solid State Drive devices with hardware accelerators and methods for apportioning storage resources with tokens in the SSD are disclosed. SSDs typically comprise an array of non-volatile memory devices and a controller which manages access to the memory devices. The controller may also comprise one or more accelerators to either improve the performance of the SSD itself or to offload specialized computation workloads of a host-computing device. Different accelerators may be dynamically assigned portions of the non-volatile memory array according to the type of data being accessed and/or the throughput required. Provision is also made for the data to be accessed directly by the accelerators bypassing the controller. The accelerators may also share data bus bandwidth and resources with each other or the storage device controller. To minimize conflicts and improve the storage device performance, a system of tokens for both cache memory and bus bandwidth is used to dynamically assign these resources.

Abstract: A semiconductor device package includes an embedded plurality of solder balls within an integrated circuit die (ICD) substrate In one embodiment, the integrated circuit die (ICD) substrate has a top surface and a bottom surface, and a plurality of solder balls at least partially embedded in the ICD substrate, where each of the plurality of solder balls comprises an exposed surface that is substantially flat and parallel planar to the bottom surface, and where the exposed surface of each of the plurality of solder balls is disposed in the bottom surface. In certain examples, the apparatuses also include a plurality of integrated circuit dies stacked on the top surface of the ICD substrate.

Abstract: Technology is disclosed herein for reducing wear due to erasing and programming non-volatile memory cells. The memory system selects a hybrid SLC group of cells for programming to an SLC mode while the selected hybrid SLC group is presently programmed to either the SLC mode or an MLC mode. Memory cells in the selected hybrid SLC group are erased to an SLC erased state regardless of the presently programmed mode of the selected hybrid SLC group. An average memory cell Vt of the SLC erased state is greater than an average threshold voltage of an MLC erased state. Memory cells in the selected hybrid SLC group are programmed from the SLC erased state to an SLC programmed state. Erasing the hybrid SLC group to the SLC erased state reduces wear relative to erasing to the MLC erased state. Therefore, the useful life of the hybrid SLC group is extended.