Patents Assigned to Zaidan Hojin Handotai Kenkyu Shinkokai
  • Patent number: 4619811
    Abstract: An apparatus for growing a GaAs single crystal by relying on the floating zone technique in a cylinder charged with a GaAs polycrystal and a GaAs single seed crystal, comprising an As container communicating with the interior of the cylinder to supply an optimum vapor pressure of As into the cylinder under the condition that a continuous temperature variation is established between this As container and the GaAs crystals charged in the cylinder, whereby a GaAs single crystal having little deviation from stoichiometry and having a good crystal perfection is obtained.
    Type: Grant
    Filed: September 17, 1985
    Date of Patent: October 28, 1986
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4608582
    Abstract: The new kind of field effect transistor having a non-saturating characteristic, i.e. static induction transistor (SIT), proposed by the present inventor is modified to serve as a substitute of any conventional bipolar transistor in a given circuitry. That is, the gate-to-gate distance and the impurity concentration of the channel region of an SIT are so selected that the channel is pinched off by the depletion layer at a predetermined forward gate bias. When the forward gate bias applied is below a certain level, the drain current will increase fundamentally exponentially with an increase of the drain voltage above some threshold voltage, whereas when the gate bias applied is above the certain value, the drain current will increase rapidly with a small increase in the drain voltage.
    Type: Grant
    Filed: July 20, 1983
    Date of Patent: August 26, 1986
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4572763
    Abstract: In conducting a liquid phase epitaxial growth of a Zn crystal on a substrate wherein a batch of Se melt serving as a solvent is used and relying on a vapor pressure controlling technique and a temperature difference method, a Zn vapor pressure controlling region is disposed, via the Se melt, in a direction vertical to the surface of the substrate which is contained in the growth region, and a ZnSe source crystal is disposed in such a way that it is supplied into the Se melt in a lateral direction of this melt. Whereby, a ZnSe single crystal having a good crystal perfection, and a good linearity of the thickness of the grown crystal relative to time can be obtained.
    Type: Grant
    Filed: July 13, 1983
    Date of Patent: February 25, 1986
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4571727
    Abstract: A far-infrared electromagnetic wave generator comprises a semiconductor containing at least one impurity which has an energy difference, close to a quantum energy of optical phonon, between its transition levels; a resonator having two reflectors for effecting positive feedback of an electromagnetic wave corresponding to the quantum energy; and means for applying an electric current across the semiconductor. The semiconductor may have p-i, n-i, p-i-n, p-n, or n-p.sup.- junction. One of the reflectors of the resonator may have a diffraction grating so that the wavelength of the electromagnetic wave to be generated can be varied by adjusting an angle of the diffraction grating.
    Type: Grant
    Filed: August 9, 1983
    Date of Patent: February 18, 1986
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Ken Suto
  • Patent number: 4565156
    Abstract: A solution growth apparatus for conducting an epitaxial growth of a compound semiconductor crystal from solution by relying on the temperature difference technique at a constant growth temperature and on a mass production scale without deranging the control of the growth temperature applied externally of the growth apparatus and with the application of only a small heating power and only a small cooling power, by enhancing the thermal exchange efficiency through the provision of heating means, via an insulator, for the melt-containing reservoir provided on the growth boat housed within a quartz reactor and by the provision of cooling means at the bottom of the boat within the reactor.
    Type: Grant
    Filed: February 28, 1983
    Date of Patent: January 21, 1986
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Yasuo Okuno
  • Patent number: 4504847
    Abstract: In a static induction type semiconductor device comprising a semiconductor region having one conductivity type and a low impurity concentration and gate regions having an opposite conductivity type and a high impurity concentration formed in the semiconductor region to thereby define a channel region between these gate regions, there is provided a subsidiary semiconductor region having the one conductivity type and a relatively high impurity concentration either around each gate region to leave an effective channel region in the semiconductor region, or adjacent to the effective channel region in the entire channel region on the drain side. By so constructing the device, this effective channel region has a relatively low potential difference even when the channel region is completely depleted, and provides a relatively wide current path.
    Type: Grant
    Filed: June 8, 1982
    Date of Patent: March 12, 1985
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4484207
    Abstract: A hetero-junction static induction transistor (SIT) of normal or upside-down type to be operated by applying a forward bias across the gate and source regions, in which at least its source region and gate region among the source, drain and gate regions is formed with a material having a band gap broader than that of the channel region. Such a SIT provides a large current amplification factor, improved frequency characteristics and is suitable for high power operation and for use in semiconductor integrated circuits.
    Type: Grant
    Filed: July 26, 1983
    Date of Patent: November 20, 1984
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Tadahiro Ohmi, Nobuo Takeda
  • Patent number: 4482910
    Abstract: A thermionic emission transistor comprising: an emitter region formed with a semiconductor material having a first conductivity type and a high impurity concentration; a collector region formed with a semiconductor material having a first conductivity type and a high impurity concentration; a base region made of a semiconductor material having a second conductivity type opposite to said first conductivity type and a high impurity concentration, that portion of said emitter region located adjacent to said base region having an energy band gap broader than that of the base region, that portion of said base region located adjacent to the emitter region having an impurity concentration of about 3.times.10.sup.18 cm.sup.-3 or more. Such new transistor has a large transconductance and can be operated with a very large current gain in spite of a very small size of the whole device, and is very suitable for integrated circuit.
    Type: Grant
    Filed: January 30, 1984
    Date of Patent: November 13, 1984
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Tadahiro Ohmi
  • Patent number: 4470059
    Abstract: A gallium arsenide static induction transistor of normally-off type simple in manufacture and exhibiting a superior function and suitable for use in low and medium power operation in integrated circuit is obtained by arranging so that its channel region has a length l (.mu.m), a width (.mu.m) and an impurity concentration N (cm.sup.-3), and that the ratio l/w is 0.5-5.0 and that the product Nw.sup.2 is not larger than 2.5.times.10.sup.15 cm.sup.-3..mu.m.sup.2.
    Type: Grant
    Filed: April 19, 1982
    Date of Patent: September 4, 1984
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Tadahiro Ohmi
  • Patent number: 4434433
    Abstract: A multiplicity of field effect type semiconductor memory elements are formed perpendicular to a surface of a semiconductor wafer. Charge carriers are transported in the semiconductor bulk perpendicular to the surface and a potential barrier is formed in the current path to accomplish storing. Since the bulk mobility of a semiconductor is far larger than the surface mobility, the transit time of the carriers is much improved. Furthermore, since each structure of the memory cells is formed perpendicular to the semiconductor surface, the surface occupation area per memory cell is reduced. Thus, a high-speed and high-density semiconductor memory device is provided.
    Type: Grant
    Filed: August 4, 1980
    Date of Patent: February 28, 1984
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4427990
    Abstract: A high sensitivity semiconductor photo-electric converter is provided by electrically isolating the gate region of a static induction transistor which exhibits non-saturating current versus voltage characteristic. Optically ionized minority carriers are stored in the gate region to control the potential thereof. A semiconductor gate region provided with a insulated gate is very effective to enhance the dynamic range of the converter. Non-saturating characteristic enables enlargement of the output current simply by increasing the drain voltage. A high-speed and high sensitivity image pick-up device can be materialized by integrating a multiplicity of the static induction type photo-electric converter elements. A switching transistor may be merged in the gate region of each photo-electric converter element to enhance the operation speed of the image pick-up device.
    Type: Grant
    Filed: May 15, 1979
    Date of Patent: January 24, 1984
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4416952
    Abstract: The oxynitride film according to the present invention contains Ga and/or Al and has O/N ratio of at least 0.15. This film is obtained by relying on, for example, chemical vapor deposition technique. The O/N ratio in the film may be varied by, for example, varying the distance between the substrate and the substance-supply source, or by varying the proportion of an oxidizing gas contained in a carrier gas. This film is used either as a surface passivation film of III-V compound semiconductors such as GaAs, or as an insulating film for active surface portions of IG-FET, or as an optical anti-reflective film.This is a division of application Ser. No. 215,442 filed Dec. 11, 1980, now Pat. 4,331,737, which in turn is a continuation of application Ser.No. 23,766, filed Mar. 26, 1979.
    Type: Grant
    Filed: February 24, 1982
    Date of Patent: November 22, 1983
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Ikuo Shiota
  • Patent number: 4414558
    Abstract: The emission efficiency of a hetero-junction light-emitting diode is improved by raising the carrier concentration in the radiative region, and by increasing the thickness of the radiative region. On p.sup.+ type GaAs substrate, a p type Ga.sub.1-x Al.sub.x As (0.30<.times.<0.37) layer and an n type Ga.sub.1-y Al.sub.y As (0.40<y<0.70) layer are grown. The emission efficiency are optimized when4.5.times.10.sup.17 cm.sup.-3 <p<2.5.times.10.sup.18 cm.sup.-32.times.10.sup.17 cm.sup.-3 <n<1.times.10.sup.18 cm.sup.-3and the thickness of the p type layer is at least about 5 .mu.m.
    Type: Grant
    Filed: February 9, 1981
    Date of Patent: November 8, 1983
    Assignees: Zaidan Hojin Handotai Kenkyu Shinkokai, Stanley Electric Co., Ltd.
    Inventors: Jun-ichi Nishizawa, Toru Teshima
  • Patent number: 4404575
    Abstract: A semiconductor device which, due to a feedback current flowing through a resistance present between the gate region and a primary current path channel region, exhibits a very steeply rising drain current versus voltage characteristic and has a very small resistance during conduction.
    Type: Grant
    Filed: May 3, 1982
    Date of Patent: September 13, 1983
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4400710
    Abstract: A semiconductor device having its carrier-injecting region formed with a Schottky structure, and arranged so that the current flowing through the Schottky barrier by virtue of tunnel effect is controlled by a controlling electrode to thereby control the drain or collector or anode current. Thus, this device has a large current density and a large current gain. This device can be used not only as a discrete one, but also it is quite suitable when applied to integrated circuits.
    Type: Grant
    Filed: November 25, 1980
    Date of Patent: August 23, 1983
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Tadahiro Ohmi, Keishiro Takahashi
  • Patent number: 4371412
    Abstract: A radio frequency and a static electric field are superposedly applied to a low pressure gas to generate a gaseous plasma and to drive ions of selected polarity in a predetermined direction. The processing chamber is pre-evacuated to a sufficiently high vacuum, and an etching gas is introduced into the chamber to be rendered to a low pressure at which the mean free path of the ions is sufficiently long. The pressure of the etching gas may range from the order of 10.sup.-2 Torr to several Torr for etching silicon, using a silicon oxide as a mask material.This method improves the treating accuracy, especially minimizes the amount of side etch, as compared with the conventional plasma etching, and reduces the surface damage when compared with the known ion beam etching.
    Type: Grant
    Filed: July 3, 1980
    Date of Patent: February 1, 1983
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Junichi Nishizawa
  • Patent number: 4364072
    Abstract: In a static induction type semiconductor device comprising a semiconductor region having one conductivity type and a low impurity concentration and gate regions having an opposite conductivity type and a high impurity concentration formed in the semiconductor region to thereby define a channel region between these gate regions, there is provided a subsidiary semiconductor region having the one conductivity type and a relatively high impurity concentration either around each gate region to leave an effective channel region in the semiconductor region, or adjacent to the effective channel region in the entire channel region on the drain side. By so constructing the device, this effective channel region has a relatively low potential difference even when the channel region is completely depleted, and provides a relatively wide current path.
    Type: Grant
    Filed: March 8, 1979
    Date of Patent: December 14, 1982
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4354140
    Abstract: On a semiconductor substrate of one conductivity type are disposed successively an active semiconductor layer of said one conductivity type, another active semiconductor layer of the other conductivity type and of a low impurity concentration, and a barrier semiconductor layer of the other conductivity type and a high impurity concentration. This another active semiconductor layer constitutes a main radiative region and light emitting in this radiative region is extracted at the side of the barrier layer.The barrier layer is arranged to form a potential barrier of an appropriate height for those minority carriers in that another active semiconductor layer, and reflects the minority carriers back into the active semiconductor layer.Non-radiative recombination is thereby reduced, and radiative recombination is promoted. Thus, the light-emitting efficiency is improved.
    Type: Grant
    Filed: May 28, 1980
    Date of Patent: October 12, 1982
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4346513
    Abstract: A method of fabricating a semiconductor integrated circuit device wherein a substrate having a particular crystallographic orientation is selectively etched so as to form surface depressions of different depths. An epitaxial layer is grown from a Si--H--Cl system on the surface of the substrate having the surface depressions formed therein. The epitaxial layer is grown under conditions effective to achieve faster lateral growth than vertical growth so as to form the epitaxial layer with regions of three different thicknesses. Subsequently, additional regions of the semiconductor integrated circuit are formed in the epitaxial layer regions of different thicknesses so as to complete the device.
    Type: Grant
    Filed: May 21, 1980
    Date of Patent: August 31, 1982
    Assignees: Zaidan Hojin Handotai Kenkyu Shinkokai, Kabushiki Kaisha Daini Seikosha
    Inventors: Junichi Nishizawa, Masafumi Shimbo
  • Patent number: 4340827
    Abstract: A Schottky diode is connected between the collector and the base of a common-base bipolar transistor to form a by-pass of the output current. The output current of this composite three-terminal structure becomes rapidly low when the voltage across the transistor is reduced below a threshold value. This three-terminal structure can be formed in a simple integrated structure and is particularly suited for driving a unipolar transistor of high input impedance, e.g. for use as the injector of an integrated injection logic. The bipolar transistor may also be substituted by a field effect transistor to constitute a three-terminal structure of similar characteristics.
    Type: Grant
    Filed: May 15, 1979
    Date of Patent: July 20, 1982
    Assignees: Zaidan Hojin Handotai Kenkyu Shinkokai, Agency of Industrial Science and Technology
    Inventors: Jun-ichi Nishizawa, Yutaka Hayashi