Abstract: A method, an apparatus and a device for detecting an optical module, and a storage medium are provided. The method includes: constructing insertion loss ranges meeting an insertion loss specification that respectively correspond to different signal frequencies in a predetermined signal frequency range, to construct a target insertion loss region; acquiring a microstripline length, a stripline length, a via number and a connector number of a to-be-detected optical module; inputting the microstripline length, the stripline length, the via number and the connector number to a pre-constructed first model, to determine an insertion loss curve of the to-be-detected optical module in the signal frequency range; and determining that the to-be-detected optical module is unqualified if a part of the insertion loss curve is outside the target insertion loss region.

Abstract: A device for fixing a hard disk is provided, which is arranged in a case and can install multiple hard disks at one time. The device for fixing a hard disk includes fixing brackets and an elastic support member. The elastic support member is arranged between two adjacent fixing brackets. The number of the fixing bracket is even, and the fixing brackets are arranged in symmetry. The hard disk is placed between the elastic support member and one single fixing bracket, which can quickly and conveniently realize the fixing and installation of the hard disk, save a lot of space, and can be arranged in array in the case. The device has high reliability and good shock absorption effects. When the space of the case is limited, the demand of high-density storage configuration can also be achieved.

Abstract: Provided is a circuit structure for suppressing surge current, which includes a surge current suppression judgment circuit, a switching control circuit and a self-boosting regulating circuit. An output end of the surge current suppression judgment circuit is connected with the switching control circuit. An output end of the switching control circuit is connected with the self-boosting regulating circuit. The switching control circuit and the self-boosting regulating circuit are both connected with a current input end Vin. An output end of the self-boosting regulating circuit is connected with an input end of the surge current suppression judgment circuit. The output end of the self-boosting regulating circuit is an output end Vout of the whole circuit structure for suppressing surge current.

Abstract: A signal integrity simulation method for an encryption hybrid model is provided. A step response data of a SPICE model is extracted through a transient simulation. An external random code signal is generated. The extracted step response data is imported as an input source for an ADS channel simulator. An eye diagram at a RX end is calculated by the ADS channel simulator based on an algorithm and the external random code signal, to perform measurement on the eye diagram. With the signal integrity simulation method for an encryption hybrid model such as an IBIS AMI model, the problem that signal integration simulation cannot be accurately performed or cannot be performed because models provided by the manufacturer are encrypted or the types of models provided by the manufacturer are not consistent can be effectively solved.

Abstract: A method for a baseboard management controller mounting a folder with KVM includes following steps. A first size of a to-be-mounted folder is calculated. A second size of a mirror image file corresponding to the to-be-mounted folder is calculated based on the first size. A default storage path is allocated for the mirror image file, and it is obtained a remaining storage capacity of a disk where the default storage path is located. If the remaining storage capacity is less than the second size, a prompt dialog box, for selecting a user storage path for the mirror image file, is displayed to the user. If the remaining storage capacity of the disk where the default storage path or the user storage path is located is greater than the second size, the to-be-mounted folder is mounted to a server.

Abstract: A method, an apparatus, and a device for transmitting a file based on a BMC, and a medium are provided. The method includes: sending, by using a first BMC, a preset command to a second BMC, before the first BMC transmits a data file to the second BMC; controlling the second BMC to stop an IPMI process running based on an I2C bus in response to the preset command; and controlling the first BMC to transmit the data file to the second BMC by using a communication function of the I2C bus. With the method, when the data file is transmitted between the BMCs, the IPMI process running on the BMC receiving the data file is stopped, such that the data file is not intercepted and verified by the command processing function of the IPMI process, and the IPMI process is prevented from being blocked and crashing.

Abstract: A method, a system, an apparatus for allocating a hard disk to a placement group, and a storage medium. An allocated placement group count of each candidate hard disk in a pool of candidate hard disks is acquired, where the allocated placement group count is increased by one count unit, each time said hard disk is allocated to any placement group. A table of allocated placement group counts is established based on the allocated placement group count, where the table reflects a correspondence between candidate hard disks and placement group counts. Candidate hard disks are selected from the table based on an ascending order of the allocated placement group count, to obtain target hard disks, where a quantity of the candidate hard disks is equal to a quantity of hard disks required by a target placement group. The target hard disks are allocated to the target placement group.

Abstract: A jumper cap circuit and a method for designing the same are provided. The jumper cap circuit includes: a three-pin header, a chip, a pull-up resistor or a pull-down resistor, and a resistor R1. The header is connected to the chip via the pull-up resistor or the pull-down resistor, and a voltage dividing circuit is constituted by the resistor R1 and the pull-up resistor or the pull-down resistor, and the resistor R1 is connected to a pin of the pin header. The method includes: acquiring a default input state of a chip, and setting, based on the default input state of the chip, a default value of the chip by arranging a first resistor in a path where a first pin of the three-pin header is located and arranging a second resistor in a path where a second pin of the three-pin header is located.

Abstract: There are provided a method and a device for testing robustness and stability of an SMM, and a computer readable storage medium. In the method, a target variable is firstly obtained, and it is judged whether an SMI is triggered. Once it is judged that the SMI is triggered, the SMM is entered. In the SMM, a target testing model corresponding to a current value of the target variable is determined, and a target SMM function is tested with the target testing model pre-stored in a system management memory, and serial port information is printed by using firmware to determine the robustness and stability of the SMM, thereby achieving the testing for the robustness and stability of the SMM.

Abstract: A method, a device and a medium for allocating a resource based on a type of a PCI device are provided. In a case of running a BIOS program during a start-up process, information of a Switch chip captured by a PCI enumeration operation is acquired. It is determined whether the PCI device is connected to a GPU server based on the information of the Switch chip. An operation of allocating the PCI device with an IO resource is cancelled in a case that the PCI device is connected to the GPU server, and the PCI device is allocated with an IO resource and a memory resource based on a preset allocation rule in a case that the PCI device is not connected to the GPU server.

Abstract: This application provides a testing method and a testing device to determine a problem source of a server failure. When a server experiences a failure, one or more than one Electro Magnetic Susceptibility (EMS) tests are performed and the time domain waveforms during an EMS test are compared to determine whether the server failure is related to EMS interference.

Abstract: A file transfer method between BMCs is provided, to implement file transfer from a master BMC to a slave BMC. Firstly, a file to be transferred to the slave BMC is obtained. Then a communication connection with the slave BMC is established through an I2C bus. After the communication connection is established, the file is divided into multiple sub-files to meet transmission requirements of an IPMI. Finally, the sub-files are read, and the sub-files are sent to the slave BMC, so that the slave BMC combines the sub-files to obtain the file. A file transfer apparatus, device between BMCs and a storage medium corresponding to the method are further provided.

Abstract: A method for designing a layout of a card edge connector and a server a card are provided. The method includes: determining, based on a type of a GND pin of a card edge connector and space between the card edge connector and GND vias, the number of GND vias connected to the GND pin to maximize the number of the GND vias connected to the GND pin; connecting each GND pin to all the GND vias that match with said GND pin to form one signal return path; and minimizing a length of the signal return path by setting all the GND vias that match with said GND pin in close proximity to said GND pin in the signal return path.

Abstract: A power supply device for supplying power to a server and a power supply management system are provided. The device includes: a power supply control chip, a first connector, a voltage comparator, a counter and a resistance regulation circuit. The resistance regulation circuit includes a pull-up resistance circuit and a pull-down resistance circuit including multiple resistor branches and switches. An input terminal of the voltage comparator is connected to an address input terminal, the other input terminal of the voltage comparator is connected to a connection point of the resistance regulation circuit. An input terminal of the counter is connected to an output terminal of the voltage comparator, each output terminal of the counter is connected to one switch and controls a state of the switch. Each output terminal of the counter is connected to one address pin of the power supply control chip.

Abstract: A method, an apparatus and a device for sharing a password between a BIOS and an operating system are provided, which are applied to a Legacy boot mode. In the method, a user is prompted to input a password of the BIOS. The password inputted by the logon user is received and verified. The verified password is stored in a predetermined target memory and E820H information is created if the received password is verified as correct, where address data in the E820H information points to an address of the target memory. The address of the target memory is determined based on the created E820H information and memory contents are obtained if a password is set for the operating system. The logon user is permitted to log on the operating system if the acquired memory contents are verified as correct.

Abstract: A design method for displaying a DRC in a classification manner in a PCB design is provided. The design method includes: acquiring layer information contained in a current design, adding the acquired layer information to a DRC Layer menu in a pop up window, acquiring a DRC Type contained in the current design and adding the processed DRC Type to a DRC Type menu in the pop up window after processing the acquired DRC Type; creating an updating function, to update a DRC Type menu list in response to an input action of a user; acquiring an attribute of each item in a DRC Layer menu list and the DRC Type menu list, and inserting the acquired attribute into the updated DRC Layer menu list and the updated DRC Type menu list, to form a feature parameter list.

Abstract: A siphon-based heat sink for a server comprises a heat absorbing mechanism, a siphon mechanism, and a heat sink. The heat absorbing mechanism comprises a base plate and a cover plate. The base plate comprises a bottom plate and multiple sets of heat dissipating fins, and is in contact with the central processing unit. The heat sink comprises a cooling cavity and cooling fins. The evaporation cavity is communicated with the cooling cavity via two siphon tubes to enable heat transfer and circulation of a thermal conductive medium. Lower ends of the two fin plates are positioned close to and fixed to the bottom plate, while upper ends thereof are bent outward to form a curved mechanism, and an included angle between the two fin plates continuously increases from bottom to top.

Abstract: A method, an apparatus and a device for detecting an optical module, and a storage medium are provided. The method includes: constructing insertion loss ranges meeting an insertion loss specification that respectively correspond to different signal frequencies in a predetermined signal frequency range, to construct a target insertion loss region; acquiring a microstripline length, a stripline length, a via number and a connector number of a to-be-detected optical module; inputting the microstripline length, the stripline length, the via number and the connector number to a pre-constructed first model, to determine an insertion loss curve of the to-be-detected optical module in the signal frequency range; and determining that the to-be-detected optical module is unqualified if a part of the insertion loss curve is outside the target insertion loss region.

Abstract: A method, an apparatus, a device and a medium for processing data based on an FPGA are provided. In the method, computing circuit resources of the FPGA are divided into N DPR spaces based on a preset space threshold, where N is a positive integer greater than 1. When a target type of data is acquired, a corresponding number of the DPR spaces are selected and target firmware corresponding to the target type is loaded into the selected DPR spaces. Then the target firmware is executed to process the target type of data.

Abstract: There are provided a lighting control method, system, and device for an NVME backboard, and a medium. The method is applied to a mainboard. The method includes: executing a target code for parsing a target VPP signal upon reception of the target VPP signal, where the target code is added in the mainboard in advance and stores VPP addresses respectively corresponding to NVME backboards connected with the mainboard; parsing the target VPP signal to obtain a target VPP address corresponding to the target VPP signal; and delivering the target VPP address to a target NVME backboard corresponding to the target VPP address to light the target NVME backboard.