Intel Patents

Intel Corporation designs and manufactures microprocessors and chipsets for computing and communications equipment manufacturers. Its products may be found in desktops, servers, tablets, smartphones and other devices.

Intel Patents by Type
  • Intel Patents Granted: Intel patents that have been granted by the United States Patent and Trademark Office (USPTO).
  • Intel Patent Applications: Intel patent applications that are pending before the United States Patent and Trademark Office (USPTO).
  • Patent number: 6943121
    Abstract: An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer, initially comprising a porous matrix and a porogen, is formed. Subsequent to other processing treatments, the porogen is decomposed and removed from at least a portion of the porous matrix, leaving voids defined by the porous matrix in areas previously occupied by the porogen. The resultant structure has a desirably low k value as a result of the porosity and materials comprising the porous matrix and porogen. The composite dielectric layer may be used in concert with other dielectric layers of varying porosity, dimensions, and material properties to provide varied mechanical and electrical performance profiles.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: September 13, 2005
    Assignee: Intel Corporation
    Inventors: Jihperng Leu, Grant M. Kloster, David H. Gracias, Lee D. Rockford, Peter K. Moon, Chris E. Barns
  • Patent number: 6943658
    Abstract: A transformer comprises a substrate comprising a semiconductor material, a first conductor over the substrate, a second conductor over the substrate, and a magnetic layer over the substrate. The first conductor defines a generally spiral-shaped signal path having at least one turn. The second conductor defines a generally spiral-shaped signal path having at least one turn.
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: September 13, 2005
    Assignee: Intel Corporation
    Inventor: Donald S. Gardner
  • Patent number: 6944850
    Abstract: A method of debugging software that executes in a multithreaded processor having a plurality of microengines includes pausing program execution in threads of execution within a target microengine, inserting a segment of executable code into an unused section of the target microengine's microstore, executing the segment of executable code in the target microengine and resuming program execution in the target microengine
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: September 13, 2005
    Assignee: Intel Corporation
    Inventors: Donald F. Hooper, Desmond R. Johnson, James D. Guilford, Richard D. Muratori
  • Patent number: 6944796
    Abstract: Embodiments of the present invention provide a system event log for a computer system. The system event log may comprise a RAM coupled to a system bus. The system event log may be configured to record information in the RAM corresponding to bus transactions on the system bus. The information may be used to de-bug system problems.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: September 13, 2005
    Assignee: Intel Corporation
    Inventors: Aniruddha P. Joshi, Peter R. Munguia, Jennifer C. Wang
  • Publication number: 20050196876
    Abstract: The invention provides methods used to analyze the contents of a biological sample, such as blood serum, with cascade Raman sensing. A fluorescence producing nanoporous biosensor having probes that bind specifically to known analytes is contacted with a biological sample and one or more bound complexes coupled to the porous semiconductor structure are formed. The bound complexes are contacted with a Raman-active probe that binds specifically to the bound complexes and the biosensor is illuminated to generate fluorescent emissions from the biosensor. These fluorescent emissions generate Raman signals from the bound complexes. The Raman signals produced by the bound complexes are detected and the Raman signal associated with a bound protein-containing analyte is indicative of the presence of the protein-containing compound in the sample. The invention methods are useful to provide a protein profile of a patient sample. The invention also provides detection systems useful to practice the invention methods.
    Type: Application
    Filed: December 29, 2003
    Publication date: September 8, 2005
    Applicant: Intel Corporation
    Inventors: Selena Chan, Tae-Woong Koo
  • Publication number: 20050196109
    Abstract: An optical module that may be used in small-form factor pluggable applications includes a delatching/latching mechanism. The optical module may be an optical transceiver, for example, and the delatching/latching mechanism may allow for improved insertion and removal of the optical module from a cage in a computer board assembly. A latching assembly that assists in latching and delatching may include a latching member having a slotted mating element that is in contact with, and rotates relative to a substantially-fixed pivot element. Rotation may be achieved via a rotatable actuator having a cam engaging a cam follower. Numerous example biasing apparatuses are described to bias the latching assembly to its latched position and to promote contact between the mating element and the pivot element.
    Type: Application
    Filed: March 18, 2004
    Publication date: September 8, 2005
    Applicant: INTEL CORPORATION
    Inventors: Brian Kim, William Wang
  • Publication number: 20050195579
    Abstract: The invention relates to an apparatus and method for improving AC coupling between adjacent signal traces and between plane splits and signals spanning plane splits on circuit boards. A circuit board includes adjacent conductive means and an oxide means interposed there between. The oxide means is a copper oxide, e.g., cupric or cuprous oxide. In one embodiment, the adjacent conductive means are adjacent voltage reference planes with a split interposed between the conductive means. The copper oxide fills the split. In another embodiment, the adjacent conductive means are differential signal traces. The copper oxide fills a gap between the differential signal traces. The copper oxide is a non-conductive material with an increased dielectric constant as compared to other common dielectric materials used as fillers. The increased dielectric constant increases capacitance, in turn, increasing AC coupling.
    Type: Application
    Filed: May 2, 2005
    Publication date: September 8, 2005
    Applicant: Intel Corporation
    Inventors: Weston Roth, Damion Searls, James Jackson
  • Publication number: 20050198045
    Abstract: A compact object header in which least significant bits of the compact object header store additional information.
    Type: Application
    Filed: March 2, 2004
    Publication date: September 8, 2005
    Applicant: INTEL CORPORATION
    Inventors: Gansha Wu, Guei-Yuan Lueh, Xin Zhou
  • Publication number: 20050198627
    Abstract: Sequential loops in computer programs may be identified and transformed into speculative parallel threads based on partitioning dependence graphs of sequential loops into pre-fork and post-fork regions.
    Type: Application
    Filed: March 8, 2004
    Publication date: September 8, 2005
    Applicant: Intel Corporation
    Inventors: Zhao Du, Tin-Fook Ngai
  • Publication number: 20050198400
    Abstract: Systems and methods using network interface card-based (NIC-based) prefetching for host TCP context lookup are disclosed. The process generally includes hashing, by the NIC, a packet received over the network, computing a host hash table cache line in a host memory using the hash value and using a hash table pages table containing host memory physical page addresses of a host hash table, and computing a host context table cache line in a host memory using the hash value and using a context table pages table containing host memory physical page addresses of a host context table. The NIC may be initialized with the hash table pages table and the context table pages table as well as with the a set number of hash node entries in the hash table of the host memory.
    Type: Application
    Filed: December 30, 2003
    Publication date: September 8, 2005
    Applicant: Intel Corporation, A DELAWARE CORPORATION
    Inventor: David Minturn
  • Patent number: 6941438
    Abstract: Memory interleaving includes providing a non-power of two number of channels in a computing system and interleaving memory access among the channels.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Gilbert Wolrich, Mark B. Rosenbluth
  • Patent number: 6940313
    Abstract: In an embodiment, a dynamic bus includes a dynamic bus repeater with a noise margin of about Vcc/2. The bus repeater splits the bus into front and rear segments. The front segment pre-charges while the rear segment evaluates, and vice versa. The dynamic bus repeater hides the pre-charge signal propagated from the front segment from the rear segment while the rear segment is evaluating.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Mark Anders, Ram Krishnamurthy
  • Patent number: 6941480
    Abstract: A method and an apparatus to dynamically transition a processor between two performance states, high performance and low power. Predetermined core clock frequency and supply voltage levels of the processor define each performance state. Transitioning the supply voltage while the processor is in the active mode and transitioning the frequency while the processor is in the sleep mode significantly reduce the processor latency.
    Type: Grant
    Filed: September 30, 2000
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Xia (Kevin) Dai
  • Patent number: 6941423
    Abstract: Apparatus and methods relating to a cache coherency administrator. The cache coherency administrator can include a display to indicate a cache coherency status of a non-volatile cache.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Richard L. Coulson
  • Patent number: 6940716
    Abstract: A method and apparatus for dissipating heat from an electronic device is described. The method and apparatus provides a scalable, cost effective, highly efficient, universally applied thermal solution for high heat generating electronic components. In one embodiment, a housing attaches over a heat sink for an electronic device. Various cooling attachments can be attached to this housing to provide a multitude of air flow enhancers. The cooling attachments are designed to provide a thermal engineer or a system integrator with several options for cooling an electronic component. The cooling attachments can be placed in multiple configurations to provide unique thermal solutions. In another embodiment, a kit of parts for a cooling system is provided. The kit of parts includes a housing and a variety of cooling attachments.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: George K. Korinsky, Craig Crawford
  • Patent number: 6940096
    Abstract: A double gate silicon over insulator transistor may be formed wherein the bottom gate electrode is formed of a doped diamond film. The doped diamond film may be formed in the process of semiconductor manufacture resulting in an embedded electrode. The diamond film may be advantageous as a heat spreader.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Kramadhati V. Ravi
  • Patent number: 6940163
    Abstract: According to one embodiment, an integrated circuit (IC) is disclosed. The IC includes a package, a die mounted within the package, circuit components mounted on the die, and a voltage regulator mounted on the die to supply power to the circuit components.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Michael D. Piorun, Andrew Volk, Chinnugounder Senthilkumar, Robert Fulton, David D. Donofrio, Steve S. Simoni
  • Patent number: 6940345
    Abstract: A common mode ramp voltage generator may be used in generating a ramp voltage for the amplifier and thereby eliminating or reducing pop noise.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Vijayakumaran Nair, Kevin McCarville
  • Patent number: 6940367
    Abstract: A film bulk acoustic resonator may be formed with a piezoelectric film having improved quality. The piezoelectric film may be deposited directly onto a single crystal silicon substrate. That substrate may be removed and selectively replaced with a lower electrode to form the film bulk acoustic resonator.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Qing Ma, Li-Peng Wang, Valluri Rao
  • Patent number: 6940958
    Abstract: A communication such as a telephone call is received, bearing identification information such as caller ID. The received audio signals if any, is encoded and stored. The identification information is used to look up additional information about the sender of the communication, such as by using the caller ID information to search the internet, for example by doing a reverse telephone number lookup. The user is presented with a graphical representation of this, and prior, communications, such as via an html page, and can select individual communications for playback, deletion, and the like. If the user is at a remote location, the encoded communications may be forwarded to that location, such as in the form of email attachments.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Edward O. Clapper
  • Patent number: 6940825
    Abstract: In a spanning tree-based computer network having a plurality of switches, a spanning tree can be generated and/or recovered by identifying a network core, determining a distance to the network core for each switch in the network, and generating and/or recovering a spanning tree for the network based on the switches' relative distances to the network core.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Tomasz J. Goldman, Claus Tondering, Ryszard W. Dyrga
  • Patent number: 6940053
    Abstract: The invention provides a heater for flip chip bonding. The heater transfers more heat to the periphery of a die than to the center. This results in a more even temperature profile along the die and helps prevent epoxy voiding problems.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Song-Hua Shi
  • Patent number: 6940938
    Abstract: A technique includes detecting a phase difference between an input signal and a first signal. A second signal is generated that has a fundamental frequency indicative of the phase difference. The second signal is modulated to produce the first signal.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Michael W. Altman, Issy Kipnis
  • Patent number: 6941458
    Abstract: A processor executive (PE) handles an operating system executive (OSE) in a secure environment. The secure environment has a platform key (PK) and is associated with an isolated memory area in the platform. The OSE manages a subset of an operating system (OS) running on the platform. The platform has a processor operating in one of a normal execution mode and an isolated execution mode. The isolated memory area is accessible to the processor in the isolated execution mode. A PE supplement supplements the PE with a PE manifest representing the PE and a PE identifier to identify the PE. A PE handler handles the PE using the PK and the PE supplement.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Carl M. Ellison, Roger A. Golliver, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger, Ken Reneris, James A. Sutton, Shreekant S. Thakkar, Milland Mittal
  • Patent number: 6941042
    Abstract: Interface loss, diffraction loss, and physical sizes of arrayed-waveguide (AWG) devices, such as AWG routers, are reduced via use of an array of asymmetric waveguide couplers that is inserted between arrayed waveguides. The asymmetric waveguide couplers operate to couple leaked optical power back to the arrayed waveguides. A lenslet matrix may also be used to pre-channel portions of an optical wavefront. The lenslet matrix includes lenslet columns that are aligned with gaps between the arrayed waveguides, such that the portions of the optical wavefront are directed towards the arrayed waveguides rather than towards the gaps.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Rongchung Tyan, Dmitri E. Nikonov
  • Patent number: 6941425
    Abstract: A method and apparatus for the optimization of memory read operations via read launch optimizations in memory interconnect are disclosed. In one embodiment, a write request may be preempted by a read request.
    Type: Grant
    Filed: November 12, 2001
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Randy B. Osborne
  • Patent number: 6940363
    Abstract: In a switching scheme mechanical MEMs switches are connected in parallel with solid state switches. This parallel MEMS/solid-state switch arrangement takes advantage of the fast switching speeds of the solid state switches as well advantage of the improved insertion loss and isolation characteristics of the MEMS switches. The solid-state switches only need to be energized during a ramp up/down period associated with the slower MEMs switch thus conserving power. As an additional advantage, using a solid-state switch in parallel with MEMs switches improves the transient spectrum of the system during switching operations.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Eliav Zipper, Qing Ma
  • Patent number: 6940908
    Abstract: A method includes generating first difference frames and compressing the first difference frames to form compressed difference frames. The compressed difference frames are decompressed to form decompressed difference frames, and the decompressed difference frames are used in the generation of the first difference frames.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Ronald D. Smith
  • Patent number: 6940395
    Abstract: A system and method for adjusting an alarm/reminder activation time that takes into account a user-requested alarm/reminder time and unexpected conditions that are unknown to the user, or are realized after the user has entered the user-requested alarm time, is provided. User related information is used to gather present unexpected condition information relevant to the user from a content provider periodically. Based on the user related and configuration information and the unexpected condition information, an adjusted alarm time is determined periodically. An alarm signal is activated when the actual time reaches the adjusted alarm time.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Daniel E Steinmark
  • Patent number: 6941047
    Abstract: A connector to an optical fiber comprises a prism, a ferrule and an aspheric lens. The prism includes a triangular wedge element having a first surface, a second surface and a base. The ferrule guides the optical fiber so as to contact the optical fiber with the first surface of the prism. The aspheric lens is integrated on the second surface, the integrated aspheric lens being positioned so that the prism serves to redirect a light beam at an angle relative to an axis of the optical source input through total internal reflection by utilizing the base of the triangle wedge element. The aspheric lens serves to collimate the redirected light beam or focus the light beam before being redirected. This arrangement may, for example, be used within a WDM system to multiplex and de-multiplex several wavelengths of light, using a “zig-zag” optical path configuration and thin film filters to separate the wavelengths.
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Dale Capewell, Sam Beizai
  • Patent number: 6941377
    Abstract: The invention provides for utilizing abilities of network interfaces, such as embedded encryption support, or access to such encryption support, so as to extend support for such abilities to network interfaces or other devices lacking such ability. In one configuration, a non-homogeneous team of network interfaces is presented to a protocol stack as being a homogeneous team, by having network interfaces lacking a particular ability be backed up by team member supporting the ability. Various methods may be applied to distribute the work load of backing up network interface according to an operation mode of the team. For example, when operating in load balancing mode, performing backup services is balanced across the team, whereas in a fault tolerant mode, processing may be first given to non-primary network interfaces.
    Type: Grant
    Filed: December 31, 1999
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Nimrod Diamant, Marcus Calescibetta
  • Patent number: 6941441
    Abstract: A first logical memory address identifies a first logical memory location that is outside of a logical buffer space. The first logical memory address is received and is translated into a second logical memory address that identifies a second logical memory location that is within the logical buffer space.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Moshe Maor
  • Patent number: 6940816
    Abstract: A memory controller is disclosed. The memory controller includes a slot-based controller adaptable to launch a packet that straddles a first fixed packet slot and a second fixed packet slot.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: David J. McDonnell
  • Patent number: 6939202
    Abstract: An apparatus and method are provided for detecting wear in substrate retainers used for chemical mechanical planarization processes. A substrate retainer is provided that is adapted to enable a sensor to detect when the wear edge of the retainer has worn to a critical wear threshold so that the retainer may be replaced prior to failure.
    Type: Grant
    Filed: August 13, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Kevin E. Heidrich, Liam S. Roberts
  • Patent number: 6941495
    Abstract: A system and method for creating a built-in self-testing (BIST) state machine to test random access memories (RAMs) are disclosed. The BIST state machine can be simplified to a simple four-state state machine while accommodating a large group of test suites by programming each state to have the capability of performing one of four necessary operations. These operations include a write operation, a read operation, a read/write operation and a null operation. Further bits and signals can be added to the state machine to enable an even larger array of test suites to be performed.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Eric R. Wehage
  • Patent number: 6940887
    Abstract: Known laser diode selections are limited to those designed for high power applications (high gain) or those designed for stable single mode operation in an external cavity (low gain). Exponential gain of laser diodes implemented according to embodiments of the present invention is improved (i.e., optimized) to provide both high output power and stability in an external cavity. This is accomplished by controlling the number of quantum wells, light confinement factor, and the transparency current of the laser diode.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Sergei Sochava
  • Patent number: 6940881
    Abstract: A laser system including a controller for monitoring and controlling various functions of a laser assembly. The laser controller may include a wavelength tuning circuit for adjusting and locking the wavelength of the external cavity. To perform various monitoring and control functions, the controller may include circuitry for monitoring various parameters associated with operation of the laser, such as temperature indicating signals and/or signals from light detectors such as photodiodes.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: George D. Pontis, Douglas A. Sprock, Robert Carney
  • Patent number: 6941484
    Abstract: A method, system, and device capable of generating one or more clocks internally to detect, sample, and receive synchronous data streams and eliminate the need for corresponding external synchronization clocks for each data stream. One aspect of the clock generator provides a two-stage interpolation system. In a first stage, two clocks are selected which accurately detect a calibration data sample. In a second stage, a single, fine-tuned, clock is synthesized by interpolating the two selected clocks.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Hing Y. To, Joseph H. Salmon, Michael W. Williams
  • Patent number: 6941146
    Abstract: Mobile devices having wired and/or wireless network connectivity, when operating in a location, contact one or more map servers to share connectivity information with the map server to allow the map server to create a global map. For example, if a mobile device has two different wireless connectivity options, such as Bluetooth and 802.11, when the mobile device is operated in the location, the mobile device tests whether both connectivity options are available in the location. The results of the test are provided to the central map server, which may integrate the results into the global connectivity map. A mobile device may also receive a connectivity map from the server indicating connectivity options available to the client in the location and possibly other locations as well. The connectivity map may include characteristics of connectivity options, such as cost, availability, etc., to allow the mobile device to choose a preferred connectivity option if multiple options are available.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Robert Knauerhase, Nikhil Deshpande
  • Patent number: 6941237
    Abstract: A method, apparatus, and system for detecting a signal of interest. According to some embodiments, a power of a frequency component of a signal is determined. The power is accumulated for the long and short term, and a delta integrated power spectrum (e.g., a difference between the accumulated power for the long-term and the accumulated power for the short-term) is found. A high delta integrated power spectrum and a normalized delta integrated power spectrum may also be found. It may then be determined whether the high delta integrated power spectrum represents a signal of interest by comparing the power of the high delta integrated power spectrum to the power of the normalized delta integrated power spectrum.
    Type: Grant
    Filed: September 15, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: William Jenrette
  • Patent number: 6941521
    Abstract: A method for dynamically generating a graphical user interface (GUI) from XML-based documents. In accordance with the method, visual components or display objects for building a GUI are defined, as well as a layout hierarchy describing layout relationships between the display objects, specifying how related display objects are to be laid out relative to each other on a layout window in the GUI. XML elements in an XML document pertaining to respective display objects are identified. A GUI is generated by rendering the identified display objects on the layout window, wherein the size and the position of each display object is based on layout rules defined by the layout hierarchy and a hierarchical position of the XML element pertaining to the display object within a hierarchy of XML elements of the XML document. The appearance of display objects in the GUI may also be altered through the use layout descriptors.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: George Lin, Xiaodong Xu
  • Patent number: 6940147
    Abstract: A dielectric layer is formed over a substrate comprising a semiconductor material. A magnetic layer is formed over the dielectric layer. The magnetic layer comprises an amorphous alloy comprising cobalt.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Ankur Mohan Crawford, Donald S. Gardner
  • Patent number: 6939815
    Abstract: A method for making a semiconductor device is described. That method comprises forming a metal oxide layer on a substrate, converting at least part of the metal oxide layer to a metal layer; and oxidizing the metal layer to generate a metal oxide high-k gate dielectric layer.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Justin K. Brask, Mark L. Doczy, Scott A. Hareland, John P. Barnak, Matthew V. Metz, Jack Kavalieros, Robert S. Chau
  • Patent number: 6940501
    Abstract: A tiled display may be formed on a substrate with a plurality of display elements which may be light emitting or non-light emitting display elements. A driver circuit for the display elements may be integrated into the display proximate to the display elements. In one embodiment, a complementary metal oxide semiconductor integrated circuit may form the driver circuit and may be secured within a recess in the same substrate on which said display elements are formed. The integrated circuit and the display elements may then be interconnected using conventional techniques.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Daniel Seligson
  • Patent number: 6939742
    Abstract: A heat dissipating element (e.g., a heat sink) is held in an initial position closer to a heat generating structure (e.g., a microprocessor) and in a subsequent position farther from the microprocessor. A thermal interface material (e.g., a thermal grease) spans the gap, but is not held under compression, between the heat sink and the microprocessor.
    Type: Grant
    Filed: August 6, 2002
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Rakesh Bhatia, Gregory A. James
  • Patent number: 6941537
    Abstract: A standoff device provides predetermined control of a standoff distance between electrical components mounted together with opposing conductive grid array patterns. In an embodiment, a predetermined electrical function is provided by the device to at least one of the electrical components. The standoff device comprises a plurality of rigid one-piece standoff pins which, in an embodiment, contains one or more stops which buttress against the electrical components to serve as a distancing control structure. In an embodiment, the standoff device is integral with one of the electrical components.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Rebecca A. Jessep, David W. Boggs, Carolyn McCormick, John H. Dungan, Daryl A. Sato
  • Patent number: 6940577
    Abstract: An LCOS display, including specially manufactured spacers, and a process for making the display, are disclosed. The spacers ensure a uniform cell gap along the entire display. The spacers occupy a region between pixels, such that they do not interfere with light modulation and are not visible during magnification. The spacers are manufactured using known deposition, lithography and etching techniques, and are made from widely available materials. The process results in a high yield of high-quality LCOS displays.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Michael Kozhukh
  • Patent number: 6941021
    Abstract: A method and apparatus for video conferencing is disclosed. According to one embodiment, a Universal Serial Bus (USB) enabled digital video camera may output an encoded information stream. The USB-enabled digital video camera including an encoder may compress image data received by the USB-enabled digital video camera during a real-time video conference to produce the encoded information stream in which no frame of the encoded information stream may depend on a previous frame by performing intra frame encoding. A computer system coupled to the USB-enabled digital video camera via a USB may be used to decode the encoded information stream and to transmit the image data to one or more other computer systems as part of a video conferencing data stream.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Judith A. Goldstein, Lawrence K. Freytag, Michael Keith
  • Patent number: 6941246
    Abstract: A method, machine readable medium, and system are disclosed. In one embodiment the method comprises generating an acoustic signal from an actuator of a first computing device, receiving the acoustic signal with a sensor of a second computing device, receiving the acoustic signal with a sensor of a third computing device, generating an estimate of a difference between the amount of time required for the acoustic signal to travel from the actuator of the first computing device to the sensor of the second computing device and the amount of time required for the acoustic signal to travel from the actuator of the first computing device to the sensor of the third computing device, wherein the sensors and actuator are unsynchronized, and computing, based on the estimated difference in time, a physical location of at least one of the said sensors and actuator.
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Vikas C. Raykar, Rainer W. Lienhart, Igor V. Kozintsev
  • Publication number: 20050190714
    Abstract: A system and associated methods for network aware, dynamic power management are generally described herein.
    Type: Application
    Filed: December 13, 2004
    Publication date: September 1, 2005
    Applicant: Intel Corporation
    Inventors: Eugene Gorbatov, Rajesh Banginwar