Abstract: Disclosed herein are cavity structures in integrated circuit (IC) package supports, as well as related methods and apparatuses. For example, in some embodiments, an IC package support may include: a cavity in a dielectric material, wherein the cavity has a bottom and sidewalls; conductive contacts at the bottom of the cavity, wherein the conductive contacts include a first material; a first peripheral material outside the cavity, wherein the first peripheral material is at the sidewalls of the cavity and proximate to the bottom of the cavity, and the first peripheral material includes the first material; and a second peripheral material outside the cavity, wherein the second peripheral material is at the sidewalls of the cavity and on the first peripheral material, and the second peripheral material is different than the first peripheral material.

Abstract: Embodiments are generally directed to compression for compression for sparse data structures utilizing mode search approximation. An embodiment of an apparatus includes one or more processors including a graphics processor to process data; and a memory for storage of data, including compressed data. The one or more processors are to provide for compression of a data structure, including identification of a mode in the data structure, the data structure including a plurality of values and the mode being a most repeated value in a data structure, wherein identification of the mode includes application of a mode approximation operation, and encoding of an output vector to include the identified mode, a significance map to indicate locations at which the mode is present in the data structure, and remaining uncompressed data from the data structure.

Abstract: Systems, methods, and apparatuses relating to instructions to compartmentalize memory accesses and execution (e.g., non-speculative and speculative) are described.

Abstract: Transistors having a plurality of channel semiconductor structures, such as fins, over a dielectric material. A source and drain are coupled to opposite ends of the structures and a gate stack intersects the plurality of structures between the source and drain. Lateral epitaxial overgrowth (LEO) may be employed to form a super-lattice of a desired periodicity from a sidewall of a fin template structure that is within a trench and extends from the dielectric material. Following LEO, the super-lattice structure may be planarized with surrounding dielectric material to expose a top of the super-lattice layers. Alternating ones of the super-lattice layers may then be selectively etched away, with the retained layers of the super-lattice then laterally separated from each other by a distance that is a function of the super-lattice periodicity. A gate dielectric and a gate electrode may be formed over the retained super-lattice layers for a channel of a transistor.

Abstract: Techniques for transferring virtual machines and resource management in a virtualized computing environment are described. In one embodiment, for example, an apparatus may include at least one memory, at least one processor, and logic for transferring a virtual machine (VM), at least a portion of the logic comprised in hardware coupled to the at least one memory and the at least one processor, the logic to generate a plurality of virtualized capability registers for a virtual device (VDEV) by virtualizing a plurality of device-specific capability registers of a physical device to be virtualized by the VM, the plurality of virtualized capability registers comprising a plurality of device-specific capabilities of the physical device, determine a version of the physical device to support via a virtual machine monitor (VMM), and expose a subset of the virtualized capability registers associated with the version to the VM. Other embodiments are described and claimed.

Abstract: An integrated circuit includes a diode for generating a temperature dependent voltage, a resistor divider for generating divided voltages by dividing the temperature dependent voltage, and a multiplexer circuit for selecting one of the divided voltages as a reference voltage used for setting a supply voltage.

Abstract: Memory cells with non-planar memory materials that include FE or AFE materials are described. An example memory cell includes a transistor provided over a support structure, where a memory material is integrated with a transistor gate. The channel material and the memory material are non-planar in that each includes a horizontal portion substantially parallel to the support structure, and a first and a second sidewall portions, each of which is substantially perpendicular to the support structure, where the horizontal portion of the memory material is between the horizontal portion of the channel material and a gate electrode material of the transistor gate, the first sidewall of the memory material is between the first sidewall of the channel material and the gate electrode material, and the second sidewall of the memory material is between the second sidewall of the channel material and the gate electrode material.

Abstract: A mechanism is described for facilitating efficient communication and data processing across clusters of computing machines in a heterogenous computing environment. A method includes detecting a request for processing of data using a programming framework and a programming model; facilitating interfacing between the programming framework and the programming model, wherein interfacing includes merging the programming model into the programming framework, wherein interfacing further includes integrating the programming framework with a distribution framework hosting the programming model; and calling on the distribution framework to schedule processing of a plurality of jobs based on the request.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to facilitate end-user defined policy management. An example apparatus includes an edge node interface to detect addition of a networked user device to a service gateway, and to extract publish information from the networked user device. The example apparatus also includes a device context manager to identify tag parameters based on the publish information from the networked user device, and a tag manager to prohibit unauthorized disclosure of the networked user device by setting values of the tag parameters based on a user profile associated with a type of the networked user device.

Abstract: Systems, apparatuses and methods may a performance-enhanced computing system comprising a sensor for measuring luminance values corresponding to light focused onto the sensor at a plurality of pixel locations, a memory including a set of instructions, and a processor. The processor executes a set of instructions causing the system to generate a multi-segment tone mapping curve, generate a set of tone mapping values corresponding to the multi-segment tone mapping curve for equally spaced input values between zero and one for storage into a look up table, and process the luminance values using the look up table to apply the tone mapping curve to the luminance values of the pixels.

Abstract: A device includes a diode that includes a first group III-nitride (III-N) material and a transistor adjacent to the diode, where the transistor includes the first III-N material. The diode includes a second III-N material, a third III-N material between the first III-N material and the second III-N material, a first terminal including a metal in contact with the third III-N material, a second terminal coupled to the first terminal through the first group III-N material. The device further includes a transistor structure, adjacent to the diode structure. The transistor structure includes the first, second, and third III-N materials, a source and drain, a gate electrode and a gate dielectric between the gate electrode and each of the first, second and third III-N materials.

Abstract: Methods and apparatus for determining biological effects of environmental sounds are disclosed. An example apparatus includes a sound characteristic analyzer to identify a sound event based on audio data in an environment. The example apparatus includes a physiological data analyzer to identify a physiological event based on physiological response data collected from a user exposed to the sound event in the environment. The example apparatus includes a correlation identifier to identify a correlation between the sound event and the physiological event and a report generator to generate a report based on the correlation.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to utilize non-volatile memory for computer system boot. An example processor platform includes a non-volatile memory coupled to a processing unit via a bus, and a microcontroller to: configure the processing unit to store, on the non-volatile memory, a heap and a stack for execution of boot code, and configure the processing unit to execute the boot code stored on the non-volatile memory.

Abstract: An integrated circuit structure includes a first metallization layer with first and second electrodes, each of which has electrode fingers. A second metallization layer may be included below the first metallization layer and include one or more electrodes with electrode fingers. The integrated circuit structure is configured to exhibit at least partial vertical inductance cancellation when the first electrode and second electrode are energized. The integrated circuit structure can be configured to also exhibit horizontal inductance cancellation between adjacent electrode fingers. Also disclosed is a simulation model that includes a capacitor model that models capacitance between electrode fingers having a finger length and includes at least one resistor-capacitor series circuit in which a resistance of the resistor increases with decreasing finger length for at least some values of the finger length.

Abstract: Technologies for managing internal time synchronization include an internet-of-things (IoT) device configured to determine a transport delay value as a function of a transmit path delay corresponding to a first message transmitted from an I/O device of the IoT device to a central timer of the IoT device and a receive path delay corresponding to a second message transmitted from the central timer to the I/O device. The IoT device is further configured to update, in response to having received a broadcast message from the central timer subsequent to having determined the transport delay value, a timestamp value of the received broadcast message as a function of the transport delay value. Other embodiments are described herein.

Abstract: Embodiments herein disclose techniques for apparatuses and methods for making a slot antenna on a PCB with a cutout. A PCB may include a metal layer. The metal layer may include a cavity to be a first radiating element of an antenna, and a slot to be a second radiating element of the antenna. In addition, the cavity may extend to be the cutout of the PCB through other layers of the PCB. The first and second radiating elements may provide a determined transmission frequency for the antenna. The metal layer may further include a portion of a transmission line of the antenna, and the transmission line is in contact with the cavity and the slot. A package may be affixed to the PCB, where a portion of the package may be within the cutout of the PCB. Other embodiments may be described and/or claimed.

Abstract: Technologies for deploying virtual machines (VMs) in a virtual network function (VNF) infrastructure include a compute device configured to collect a plurality of performance metrics based on a set of key performance indicators, determine a key performance indicator value for each of the set of key performance indicators based on the collected plurality of performance metrics, and determine a service quality index for a virtual machine (VM) instance of a plurality of VM instances managed by the compute as a function each key performance indicator value. Additionally, the compute device is configured to determine whether the determined service quality index is acceptable and perform, in response to a determination that the determined service quality index is not acceptable, an optimization action to ensure the VM instance is deployed on an acceptable host of the compute device. Other embodiments are described herein.

Abstract: An inductive switch comprises an inductor that has a primary metallic winding having a boundary configured in shape of a figure eight, such as in two loops, and a plurality of secondary metallic windings arranged within the boundary of the primary metallic winding. The inductive switch includes a plurality of switches, each switch arranged in series with a respective one of the plurality of secondary metallic windings. An equal number of the secondary windings is arranged within each loop. A tunable inductor comprises at least one main metallic loop and at least one secondary metallic loop, wherein the at least one secondary metallic loop comprises a switch that is arranged to configure the at least one secondary metallic loop into at least one shorted metallic loop or at least one closed metallic loop. The at least one shorted loop is floating.

Abstract: An electronic package and method includes a substrate including a plurality of pads on a major surface. An electronic component including a plurality of pads on a major surface facing the major surface of the substrate. A stud bump electrically couples one of the plurality of pads of the substrate to one of the plurality of pads of the electronic component.

Abstract: Systems, apparatuses and methods may provide for technology that detects an unidentified individual at a first location along a trajectory in a scene based on a video feed of the scene, wherein the video feed is to be associated with a stationary camera, and selects a non-stationary camera from a plurality of non-stationary cameras based on the trajectory and one or more settings of the selected non-stationary camera. The technology may also automatically instruct the selected non-stationary camera to adjust at least one of the one or more settings, capture a face of the individual at a second location along the trajectory, and identify the unidentified individual based on the captured face of the unidentified individual.

Abstract: Systems, apparatuses, and methods to identify an electronic control unit transmitting a message on a communication bus, such as an in-vehicle network bus, are provided. ECUs transmit messages by manipulating voltage on conductive lines of the bus. Observation circuitry can observe voltage transitions associated with the transmission at multiple points on the in-vehicle network bus. A voltage waveform can be generated from the observed voltage transitions. ECUs can be identified and/or fingerprinted based on the generated waveforms.

Abstract: Electronic device package technology is disclosed. An electronic device package in accordance with the present disclosure can include a substrate, a plurality of electronic components in a stacked relationship, and an encapsulant material encapsulating the electronic components. Each of the electronic components can be electrically coupled to the substrate via a wire bond connection and spaced apart from an adjacent electronic component to provide clearance for the wire bond connection. The encapsulant can be disposed between center portions of adjacent electronic components. Associated systems and methods are also disclosed.

Abstract: An integrated circuit structure comprises a substrate. An antiferroelectric gate oxide is above the substrate, the antiferroelectric gate oxide comprising a perovskite material. A gate electrode is over at least a portion of the gate oxide.

Abstract: Embodiments include an electronic system and methods of forming an electronic system. In an embodiment, the electronic system may include a package substrate and a die coupled to the package substrate. In an embodiment, the electronic system may also include an integrated heat spreader (IHS) that is coupled to the package substrate. In an embodiment the electronic system may further comprise a thermal interface pad between the IHS and the die. In an embodiment the die is thermally coupled to the IHS by a liquid metal thermal interface material (TIM) that contacts the thermal interface pad.

Abstract: Methods and systems are disclosed using camera devices for deep channel and Convolutional Neural Network (CNN) images and formats. In one example, image values are captured by a color sensor array in an image capturing device or camera. The image values provide color channel data. The captured image values by the color sensor array are input to a CNN having at least one CNN layer. The CNN provides CNN channel data for each layer. The color channel data and CNN channel data is to form a deep channel image that stored in a memory. In another example, image values are captured by sensor array. The captured image values by the sensor array are input a CNN having a first CNN layer. An output is generated at the first CNN layer using the captured image values by the color sensor array. The output of the first CNN layer is stored as a feature map of the captured image.

Abstract: A device includes a plurality of ports and a plurality of capability registers that correspond to a respective one of the plurality of ports. The device is to connect to one or more processors of a host device through the plurality of ports, and each of the plurality of ports comprises a respective protocol stack to support a respective link between the corresponding port and the host device according to a particular interconnect protocol. Each of the plurality of capability registers comprises a respective set of fields for use in configuration of the link between its corresponding port and one of the one or more processors of the host device. The fields include a field to indicate an association between the port and a particular processor, a field to indicate a port identifier for the port, and a field to indicate a total number of ports of the device.

Abstract: A thermal interface material may be formed comprising a polymer material and a self-healing constituent. The thermal interface material may be used in an integrated circuit assembly between at least one integrated and a heat dissipation device, wherein the self-healing constituent changes the physical properties of the thermal interface material in response to thermo-mechanical stresses to prevent failure modes from occurring during the operation of the integrated circuit assembly.

Abstract: A processor includes an instruction decoder to receive a first instruction to process a secure hash algorithm 2 (SHA-2) hash algorithm, the first instruction having a first operand associated with a first storage location to store a SHA-2 state and a second operand associated with a second storage location to store a plurality of messages and round constants. The processor further includes an execution unit coupled to the instruction decoder to perform one or more iterations of the SHA-2 hash algorithm on the SHA-2 state specified by the first operand and the plurality of messages and round constants specified by the second operand, in response to the first instruction.

Abstract: Embodiments of the present disclosure describe methods, apparatuses, and systems for enhanced control signaling using full-duplex communication in wireless communication networks. A base station may schedule a first user equipment (UE) for primary access to a set of time-frequency resources in a first communication direction (e.g., uplink or downlink). The base station may additionally schedule a second UE for secondary access to the same set of time-frequency resources in a second communication direction that is the opposite of the first communication direction. The secondary access may be used to communicate supplemental control information, such as a channel quality indicator (CQI) and/or modulation and coding scheme (MCS) feedback, hybrid automatic repeat request (HARQ) feedback, and/or multiple input multiple output (MIMO) feedback (e.g., including a rank indicator (RI) and/or a pre-coding matrix indicator (PMI). Other embodiments may be described and claimed.

Abstract: According to the various examples, a fully integrated system and method for failure analysis using RF-based thermometry enable the detection and location of defects and failures in complex semiconductor packaging architectures. The system provides synchronous amplified RF signals to generate unique thermal signatures at defect locations based on dielectric relaxation loss and heating.

Abstract: A first roadway system receives a communication from a second roadway system over a wireless channel, where the communication includes a description of a physical object within a driving environment. Characteristics of the physical object are determined based on sensors of the first roadway system. The communication is determined to contain an anomaly based on a comparison of the description of the physical object with the characteristics determined based on the sensors of the first roadway system. Misbehavior data is generated to describe the anomaly. A remedial action is initiated based on the anomaly.

Abstract: Methods and apparatus to generate photo-realistic three-dimensional models of a photographed environment are disclosed. An apparatus includes an object position calculator to determine a three-dimensional (3D) position of an object detected within a first image of an environment and within a second image of the environment. The apparatus further includes a 3D model generator to generate a 3D model of the environment based on the first image and the second image. The apparatus also includes a model integrity analyzer to detect a difference between the 3D position of the object and the 3D model. The 3D model generator automatically modifies the 3D model based on the difference in response to the difference satisfying a confidence threshold.

Abstract: Particular embodiments described herein provide for an electronic device that can include a key height activation engine and a keyboard. The keyboard can include a plurality of keys and one or more of the plurality of keys can include a key height mechanism. The key height mechanism includes a shape memory material and when the key height mechanism is activated by the key height activation engine, the shape memory material raises the one or more of the plurality of keys that includes the key height mechanism from a first height to a second height.

Abstract: Integrated circuit structures having source or drain structures with phosphorous and arsenic co-dopants are described. In an example, an integrated circuit structure includes a fin having a lower fin portion and an upper fin portion. A gate stack is over the upper fin portion of the fin, the gate stack having a first side opposite a second side. A first source or drain structure includes an epitaxial structure embedded in the fin at the first side of the gate stack. A second source or drain structure includes an epitaxial structure embedded in the fin at the second side of the gate stack. The first and second source or drain structures include silicon, phosphorous and arsenic, with an atomic concentration of phosphorous substantially the same as an atomic concentration of arsenic.

Abstract: Method and apparatus implementing smart store operations with conditional ownership requests. One aspect includes a method implemented in a multi-core processor, the method comprises: receiving a conditional read for ownership (CondRFO) from a requester in response to an execution of an instruction to modify a target cache line (CL) with a new value, the CondRFO identifying the target CL and the new value; determining from a local cache a local CL corresponding to the target CL; determining a local value from the local CL; comparing the local value with the new value; setting a coherency state of the local CL to (S)hared when the local value is same as the new value; setting the coherency state of the local CL to (I)nvalid when the local value is different than the new value; and sending a response and a copy of the local CL to the requester. Other embodiments include an apparatus configured to perform the actions of the methods.

Abstract: A method is described. The method includes performing the following with a storage end transaction agent within a storage sled of a rack mounted computing system: receiving a request to perform storage operations with one or more storage devices of the storage sled, the request specifying an all-or-nothing semantic for the storage operations; recognizing that all of the storage operations have successfully completed; after all of the storage operations have successfully completed, reporting to a CPU side transaction agent that sent the request that all of the storage operations have successfully completed.

Abstract: Some demonstrative embodiments include apparatuses, systems and/or methods of communicating a Single-User (SU) Multiple-Input-Multiple-Output (MIMO) transmission. For example, a first wireless communication station may be configured to transmit a Request to Send (RTS) to a second wireless communication station via a plurality of SU MIMO Transmit (Tx) sectors of the first wireless communication station, the RTS to establish a Transmit Opportunity (TXOP) to transmit an SU-MIMO transmission to the second wireless communication station, a control trailer of the RTS including an indication of an intent to transmit the SU-MIMO transmission to the second wireless communication station; and to transmit the SU-MIMO transmission to the second wireless communication station, upon receipt of a Clear to Send (CTS) from the second wireless communication station indicating that the second wireless communication station is ready to receive the SU-MIMO transmission.

Abstract: There is disclosed in one example, a system-on-a-chip (SoC), including: a processor core; a fabric; an intellectual property (IP) block communicatively coupled to the processor core via the fabric, the IP block having a microcontroller configured to provide a microcontroller architecture; a firmware load interface configured to provide a standardized hardware interface to the microcontroller architecture, wherein the standardized hardware interface provides an architecture-agnostic mechanism to securely load a firmware to the intellectual property block; and logic to provide a loader to load a firmware to the IP block via the firmware load interface.

Abstract: The present disclosure is directed to systems and methods for providing a dielectric layer on a semiconductor substrate capable of supporting very high density interconnects (i.e., ?100 IO/mm). The dielectric layer includes a maleimide polymer in which a thiol-terminated functional group crosslinks with an epoxy resin. The resultant dielectric material provides a dielectric constant of less than 3 and a dissipation factor of less than 0.001. Additionally, the thiol functional group forms coordination complexes with noble metals present in the conductive structures, thus by controlling the stoichiometry of epoxy to polyimide, the thiol-polyimide may beneficially provide an adhesion enhancer between the dielectric and noble metal conductive structures.

Abstract: For example, an EDMG initiator STA of an asymmetric beamforming training may be configured to, during a Beacon Transmission Interval (BTI) in a Beacon Interval (BI), transmit a beacon via a sector of the EDMG initiator STA, the beacon including allocation information to allocate a beamforming training allocation for asymmetric beamforming training of the sector during a Data Transfer Interval (DTI) in the BI after the BTI, the beacon including one or more Receive Training (TRN-R) subfields for the asymmetric beamforming training of the sector; during the beamforming training allocation, to listen on the sector for one or more Sector Sweep (SSW) frames from one or more EDMG responder STAs; and, during the beamforming training allocation, to transmit via the sector a sector acknowledgement (ACK) frame including information based on the one or more SSW frames.

Abstract: A virtual reality apparatus and method are described for tile-based rendering. For example, one embodiment of an apparatus comprises: a set of on-chip geometry buffers including a first buffer to store geometry data, and a set of pointer buffers to store pointers to the geometry data; a tile-based immediate mode rendering (TBIMR) module to perform tile-based immediate mode rendering using geometry data and pointers stored within the set of on-chip geometry buffers; spill circuitry to determine when the on-chip geometry buffers are over-subscribed and responsively spill additional geometry data and/or pointers to an off-chip memory; and a prefetcher to start prefetching the geometry data from the off-chip memory as space becomes available within the on-chip geometry buffers, the TBIMR module to perform tile-based immediate mode rendering using the geometry data prefetched from the off-chip memory.

Abstract: Example wireless feedback control systems disclosed herein include a receiver to receive a first measurement of a target system via a first wireless link. Disclosed example systems also include a neural network to predict a value of a state of the target system at a future time relative to a prior time associated with the first measurement, the neural network to predict the value of the state of the target system based on the first measurement and a prior sequence of values of a control signal previously generated to control the target system during a time interval between the prior time and the future time, and the neural network to output the predicted value of the state of the target system to a controller. Disclosed example systems further include a transmitter to transmit a new value of the control signal to the target system via a second wireless link.

Abstract: Embodiments are generally directed to a system and method for adapting executable object to a processing unit. An embodiment of a method to adapt an executable object from a first processing unit to a second processing unit, comprises: adapting the executable object optimized for the first processing unit of a first architecture, to the second processing unit of a second architecture, wherein the second architecture is different from the first architecture, wherein the executable object is adapted to perform on the second processing unit based on a plurality of performance metrics collected while the executable object is performed on the first processing unit and the second processing unit.

Abstract: Embodiments include semiconductor packages. A semiconductor package includes a first patch and a second patch on an interposer. The semiconductor package also includes a first substrate in the first patch, and a second substrate in the second patch. The semiconductor package further includes an encapsulation layer over and around the first and second patches, a plurality of build-up layers on the first patch, the second patch, and the encapsulation layer, and a plurality of dies and a bridge on the build-up layers. The bridge may be communicatively coupled with the first substrate of the first patch and the second substrate of the second patch. The bridge may be an embedded multi-die interconnect bridge (EMIB). The first and second substrates may be EMIBs and/or high-density packaging (HDP) substrates. The bridge may be positioned between two dies, and over an edge of the first patch and an edge of the second patch.

Abstract: Embodiments described herein include a resonant process monitor and methods of forming such a resonant process monitor. In an embodiment, the resonant process monitor includes a frame that has a first opening and a second opening. In an embodiment, a resonant body seals the first opening of the frame. In an embodiment, a first electrode on a first surface of the resonant body contacts the frame and a second electrode is on a second surface of the resonant body. Embodiments also include a back plate that seals the second opening of the frame. In an embodiment the back plate is mechanically coupled to the frame, and the resonant body, the back plate, and interior surfaces of the frame define a cavity.

Abstract: Disclosed herein are asymmetric cored integrated circuit (IC) package supports, and related devices and methods. For example, in some embodiments, an IC package support may include a core region having a first face and an opposing second face, a first buildup region at the first face of the core region, and a second buildup region at the second face of the core region. A thickness of the first buildup region may be different than a thickness of the second buildup region. In some embodiments, an inductor may be included in the core region.

Abstract: Apparatus and method for replacing portions of a quantum circuit with multi-qubit gates. For example, one embodiment of an apparatus comprises: a quantum circuit analyzer to evaluate an original quantum circuit specification including one or more sub-circuits of the original quantum circuit specification, the quantum circuit analyzer to generate results of the evaluation; a quantum circuit generator to generate a new quantum circuit specification based on the results of the evaluation generated by the quantum circuit analyzer, the quantum circuit generator to generate the new quantum circuit specification by, at least in part, replacing the one or more sub-circuits of the original quantum circuit specification with one or more multi-qubit gates.

Abstract: Disclosed herein are stacked transistors with dielectric between channel materials, as well as related methods and devices. In some embodiments, an integrated circuit structure may include stacked strata of transistors, wherein a dielectric material is between channel materials of adjacent strata, and the dielectric material is surrounded by a gate dielectric.

Abstract: In one embodiment, an apparatus of a wireless communication device includes control circuitry to cause receiver circuitry of the wireless communication device to switch between an on-mode and an off-mode. The apparatus also includes synchronizing circuitry to: perform a correlation on signals of a packet received by the receiver circuitry when in the on-mode to detect a pattern in the received signals, and cause the control circuitry to hold the receiver circuitry in the on-mode based on detection of the pattern in the received signals. The apparatus further includes demodulation circuitry to process additional signals of the packet received by the receiver circuitry when held in the on-mode.

Abstract: Techniques are disclosed herein for providing guidance for autonomous vehicles in areas of low network connectivity, such as rural areas. According to an embodiment, a guidance system receives a request to exchange data with a vehicle within a specified radius thereof over a wireless connection (e.g., a radio frequency protocol-based connection). The data is stored by the guidance system and is indicative of navigation information within the specified radius. The guidance system transmits the stored data to the vehicle. The guidance system also receives, from the vehicle, data indicative of navigation information for a path previously passed by the vehicle.