Abstract: Disclosed is a method for controlling a computing apparatus including a cover having a display on one surface facing into a keyboard when the cover is in a closed state. The method comprises, in response to receiving a command to turn on an automatic booting mode of the computing apparatus, storing a configuration value corresponding to an ON state of the automatic booting mode in a memory; when the cover is in the closed state, detecting an opening of the cover via a sensor of the computing apparatus; and, in response to detecting the opening of the cover when a system status of the computing apparatus is an S5 state defined by the Advanced Configuration and Power Interface (ACPI) standard, performing, via a controller of the computing apparatus, an operation of entering from the S5 state to an S0 state defined by the APCI standard based on the configuration value stored in the memory.

Abstract: A method of tuning a controller area network (CAN) communication model includes: measuring a CAN signal waveform, dividing the CAN signal waveform into a steady period and a dynamic period, determining a parameter for the steady period, determining a parameter for the dynamic period, modeling a CAN line using the parameter for the steady period and the parameter for the dynamic period, and performing error analysis on the CAN line.

Abstract: Apparatuses, master-slave detect circuits, memories, and methods are disclosed. One such method includes performing a master detect phase during which a memory unit in a memory group is determined to be a master memory unit, determining at each memory unit its location relative to other memory units, and determining at each memory unit its location in the memory group based on a total number of slave memory units and its location relative to other memory units.

Abstract: Various embodiments of the present technology provide methods for activating a security module of a rack system prior to the loading of an operating system. The security module can be configured to examine server platform security, communicate with an administrator through a baseboard management controller (BMC), certify signatures of firmware pieces on a motherboard of the rack system, exclude malware by isolating unsigned UEFI images, examine a signature list and security key installed on the motherboard, and/or report status of security management to a controller of the rack system (e.g., BMC). When the security module determines that an uncertified firmware or a bootable storage with malware is loaded onto the rack system, the security module can stop process(es) associated with the uncertified firmware and/or the bootable storage, and subsequently send a report the administrator.

Abstract: A Power over Ethernet (PoE) system and method that can provide greater power efficiency and reduces greenhouse gas emissions is described. The PoE system includes power supply equipment, Ethernet cabling, and a powered device. When a load is not present at the end of the Ethernet cabling, an injector in the power supply equipment enters a sleep state, thus conserving power and increasing efficiency. When the injector is electrically connected to a load, such as the powered device, a circuit in the injector activates power to a digital control logic and subsequently provides power to a sensing conductor in the Ethernet cable, thereby enabling high efficiency power transfer.

Abstract: Power saving systems and methods for Universal Serial Bus (USB) systems are disclosed. When a USB physical layer (PHY) enters a U3 low power state, not only are normal elements powered down, but also circuitry within the USB PHY associated with detection of a low frequency periodic signal (LFPS) wake up signal is powered down. A low speed reference clock signal is still received by the USB PHY, and a medium speed clock within the USB PHY is activated once per period of the low speed reference clock signal. The medium speed clock activates the signal detection circuitry and samples a line for the LFPS. If no LFPS is detected, the signal detection circuitry and the medium speed clock return to low power until the next period of the low speed reference clock signal. If the LFPS is detected, the USB PHY returns to a U0 active power state.

Abstract: A power subsystem is configured to manage the maximum power usage of a computer subsystem. A power detector determines when power usage approaches the maximum capability of the power supply. The power detector generates a signal that corresponds to power usage. A controller then applies the signal to the system voltage regulator as a secondary regulation function such that the output voltage is reduced in a manner that supports maximum operating voltage while limiting power usage to within the capability of the power supply. The controller may configure the signal to implement the secondary regulation function as a modification of the feedback voltage, the reference voltage, or the current feedback of the regulator. As a result the subsystem causes the computer subsystem to operate at an optimum point on the voltage-current curve of the power supply.

Abstract: A method for visually guided storage array installation is disclosed. The method includes receiving an installation plan for a storage array and determining a component of the storage array that is specified in the installation plan. One or more visual indicators that are associated with the component of the storage array are displayed to indicate a status corresponding to executing a portion of the installation plan.

Abstract: A communicator has profiles for holding locators for items in a tree-like database for a smart device that monitors a process. The communicator is connected to the smart device and obtains tag and other identity information to find the profile for the smart device. When a profile is located, the communicator displays a list of configuration items and favorite items and loads the items on the list into the communicator as default inputs or settings.

Abstract: An apparatus includes a first circuit and a second circuit sharing an instruction stream. A voltage controller circuit is configured to provide an operation voltage and at least one low-power voltage to the second circuit independent of a supply voltage of the first circuit in response to a sequence of the instruction stream. In another aspect, a method of operating a power management function is presented. The method includes providing an instruction stream for a first circuit and a second circuit and providing selectively an operation voltage and at least one low-power voltage to the second circuit independent of a supply voltage of the first circuit in response to a sequence of the instruction stream.

Abstract: A display apparatus and a controlling method thereof are provided. The controlling method of a display apparatus according to an exemplary embodiment includes, in response to a power-off command being input, storing information regarding an application which is executed at the time when the power-off command is input and entering a standby mode, and in response to a user interaction being detected while the display apparatus maintains a standby mode, entering a pre-power on mode where power is applied to an element included in the display apparatus by performing kernel-level booting.

Abstract: A system and method for efficiently restoring data to a different computing device. At least a backed up operating system (OS) and an initial file system, which is also referred to as a temporary file system, are restored on a memory connected to a target computing device. The OS and the initial file system are configured for a hardware configuration for a source computing device different from a hardware configuration for the target computing device. The input/output (I/O) modules used for accessing storage devices connected to data storage interfaces within the target computing device are identified and compared to I/O modules in the initial file system. The missing I/O modules in the initial file system for the target computing device are retrieved from the restored OS and inserted in the initial file system. Afterward, a boot up sequence is executed using the modified initial file system.

Abstract: A computer system has a controller and a voltage regulator. The controller generates a power consumption state signal for one or more components of the computer system to the voltage regulator. The voltage regulator supplies a first voltage level for the one or more components when the one or more components are at a first power consumption state. The voltage regulator increases to a second voltage level for the one or more components when the one or more components enter a second power consumption state.

Abstract: A method and system for enhancing computer peripheral safety is provided. In accordance with various aspects of the present invention, the exemplary method and system are configured to monitor and/or isolate alternating current (A.C.) supplies with and/or from any peripheral subsystems or devices. An exemplary method and system comprises an A.C. supply, a host computer system, and a peripheral subsystem or device connected to the host computer system, such as an ultrasound imaging and/or therapy peripheral, and an isolation subsystem configured for monitoring and/or isolating the A.C. supply from the peripheral subsystem or device.

Abstract: The invention provides a method of integrating a server using alternating current power (AC server) into a server system using direct current power (DC server system) and an alternative junction device therefor. The integrating method includes: providing an AC server having a plug-in power supply unit; providing an alternative junction device for replacing the plug-in power supply unit; extracting the plug-in power supply unit from the AC server; plugging the alternative junction device into the AC server; and coupling the alternative junction device to a direct current power supply unit of a DC server system. The alternative junction device includes: a shell to be installed into a containing slot of an AC server; an output coupled to a DC input of a processor of the AC server when the shell is installed into the containing slot; and an input coupled to a DC power supply unit of a DC server system.

Abstract: A dynamic power distribution system includes a dynamic powering system that provides dynamic power, an external device, and a powered system that is coupled to the external device and engaging the dynamic powering system. The powered system determines a power budget using the dynamic power received from the dynamic powering system. The powered system also determines a powered system component load for a plurality of powered system components, receives a power request from the external device, and retrieves at least one power distribution rule. Using the powered system component load, the power request, and the at least one power distribution rule, and powered system allocates and distributes a first portion the power budget to the external device, and may also allocate and distribute a second portion the power budget to at least one of the plurality of powered system components. The dynamic powering system may be a wireless powering system.

Abstract: A method and a system are applied to manage a plurality of power supplies. In both the method and the system, a board management controller is applied to detect a plurality of power supplies, so as to determine whether the power supplies are normally operated. When the power supplies are operated normally, the board management controller automatically checks whether an automatic power control means is activated. When the automatic power control means is not activated, the board management controller calculates a real-time residual maximum power value according to at least one of the normal-operated power supplies. Then, the board management controller resets a system power supply value of a management engine by the real-time residual maximum power value. Finally, the board management controller orders the complex programmable logic device relieve a thermal protection means, whereby the processor's operating frequency can be maintained at a normal operating frequency.

Abstract: An apparatus and method are disclosed for providing efficient operation in a feedback loop having a synchronous buck converter. The synchronous buck converter includes a plurality of individually selectable phases, where each of the phases has a plurality of individually selectable and parallel switching legs. The circuit stores information that associates multiple different load values with respective configuration settings that each define a number of phases and a number of switching legs. As the load changes, the circuit measures the load and selects an appropriate configuration setting. The circuit applies the selected configuration setting to operate the number of phases and a number of parallel switching legs in the buck converter.

Abstract: Embodiments of systems and methods for applying a component update using a management engine are disclosed. A computing device may include a management engine to store a bootable image containing an update for a component of the computing device in a secured memory location and configure the computing device to boot from the bootable image. Such configuration may include configuring the computing device for integrated device electronics redirection (IDE-R) to the bootable image. A firmware update server may generate the bootable image containing the update, digitally sign the bootable image, and transmit the bootable image to the computing device for the update to be applied. The firmware update server may sign the bootable image with an original equipment manufacturer key, such as a firmware signing key. The firmware update server may notify all computing devices connected to a network that the update is available. Other embodiments are described and claimed.

Abstract: A device and method of operating a synchronous frequency processing environment served by a common power source and common clock source. The method includes operating the processing environment to have a first power consumption. The method further includes determining a first synchronous frequency processing domain within the processing environment where it is desired to implement a first clock frequency alteration in a clock signal for the first synchronous frequency processing domain. The first clock frequency alteration generates an associated first alteration in a power consumption from the first synchronous frequency processing domain. The method further includes determining a second clock frequency alteration to a clock signal for a second synchronous frequency processing domain of the processing environment. The second clock frequency alteration is determined so as to reduce a change in the first power consumption caused by the first alteration in power consumption.