Patents Examined by Albrecht
  • Patent number: 11444176
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a cap element over the gate stack. The cap element has an upper portion and a lower portion, and the upper portion is wider than the lower portion. The semiconductor device structure also includes a spacer element over a sidewall of the cap element and a sidewall of the gate stack.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Chi Wu, Chai-Wei Chang, Kuo-Hui Chang, Yi-Cheng Chao
  • Patent number: 11444105
    Abstract: The present invention provides an array substrate and a manufacturing method thereof, an array substrate includes a sub-pixel including a main-region and a sub-region. A gate line is disposed between the main-region and the sub-region, and two adjacent data lines define a pixel boundary. A transparent common electrode line is respectively disposed corresponding to the main-region and the sub-region. Wherein, a projection range of the pixel electrode on the substrate covers a projection range of part of the transparent common electrode line corresponding to a direction of the data line on the substrate.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: September 13, 2022
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Suping Xi
  • Patent number: 11444242
    Abstract: A resistive memory device including a first electrode and a second electrode facing each other and a variable resistance layer disposed between the first electrode and the second electrode, wherein the variable resistance layer includes cadmium-free quantum dots (Cd-free quantum dots) and at least a portion of the Cd-free quantum dots include a Cd-free quantum dot including a halide anion on a surface of the Cd-free quantum dot, a method of manufacturing the same and an electronic device.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: September 13, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kwanghee Kim, Heejae Lee, Oul Cho, Tae Hyung Kim, Eun Joo Jang
  • Patent number: 11437574
    Abstract: Provided is a resistive-switching memory containing a positive electrode, a negative electrode and a resistive switching layer provided between the positive electrode and the negative electrode, the resistance of which is switched by an applied voltage, wherein the resistive switching layer contains a compound of the chemical formula (A?)2An?1BnX3n+1, wherein A? is an ammonium ion having an asymmetric structure and containing a phenyl group, A is a monovalent metal ion and X is a halogen ion, the A? has an asymmetric ion distribution which may be rotated by an applied electric field, and n is a value between 1 and ?.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: September 6, 2022
    Assignee: SEOUL UNIVERSITY R&DB FOUNDATION
    Inventors: Ho Won Jang, Ji su Han, Hyojung Kim
  • Patent number: 11437573
    Abstract: A semiconductor device includes a bottom electrode, a top electrode, a switching layer and a diffusion harrier layer. The top electrode is over the bottom electrode. The switching layer is between the bottom electrode and the top electrode, and configured to store data. The diffusion barrier layer is between the bottom electrode and the switching layer to obstruct diffusion of ions between the switching layer and the bottom electrode.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: September 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hai-Dang Trinh, Hsing-Lien Lin, Fa-Shen Jiang
  • Patent number: 11437411
    Abstract: The present invention discloses a thin film transistor (TFT) drive backplane and a Micro- light emitting diode (LED) display that by employing a structure of an oxide thin film transistor drive backplane with a high mobility can achieve fulfillment of the need for large size Micro-LED displays. Disposing the rear metal layer under the base substrate with the rear metal layer including a metal wire layer configured to connect with a drive chip and a metal light shielding layer configured to block ambient light reduces a spliced bezel of the display panel in application of large size Micro-LED displays, reduces depositing and patterning steps of the metal light shielding layer during manufacturing the thin film transistors and further reduces process steps of manufacturing a TFT drive backplane.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: September 6, 2022
    Inventors: Gongtan Li, Hyunsik Seo
  • Patent number: 11437409
    Abstract: An array substrate and a manufacturing method thereof, and a display device. The array substrate includes: a base substrate, including a first surface and a second surface opposite to each other, and a through-hole penetrating the base substrate from the first surface to the second surface; a data line on the first surface of the base substrate, the data line being at least partially filled in the through-hole; a thin film transistor on the second surface of the base substrate, the thin film transistor including a source electrode and a drain electrode, and the source electrode being electrically connected to the data line.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: September 6, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Seungjin Choi
  • Patent number: 11437414
    Abstract: The present invention provides a display panel and a display device. A conductive film layer of the display panel is electrically connected to a gate electrode of a thin film transistor (TFT) through a first via hole, and the conductive film layer at least partially overlaps a source/drain electrode of the TFT to form a first capacitor. A second capacitor is formed in an overlapping region between a source/drain electrode of the TFT and the gate electrode of the TFT. Accordingly, a boost capacitance value of the display panel is increased, and a driving circuit requires less space.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: September 6, 2022
    Inventors: Peng Du, Qiaoqiao Song
  • Patent number: 11437470
    Abstract: The disclosure relates to a semiconductor component having an SiC semiconductor body and a first load terminal on a first surface of the SiC semiconductor body. A second load terminal is formed on a second surface of the SiC semiconductor body opposite the first surface. The semiconductor component has a drift zone of a first conductivity type in the SiC semiconductor body and a first semiconductor area of a second conductivity type which is electrically connected to the first load terminal. A pn junction between the drift zone and the first semiconductor area defines a voltage blocking strength of the semiconductor component.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: September 6, 2022
    Assignee: Infineon Technologies AG
    Inventors: Thomas Basler, Rudolf Elpelt, Hans-Joachim Schulze
  • Patent number: 11437524
    Abstract: The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. One embodiment of the present invention is a semiconductor device which includes a gate electrode, an insulating film over the gate electrode, an oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film include the same element. The second oxide semiconductor film includes a region having lower crystallinity than one or both of the first oxide semiconductor film and the third oxide semiconductor film.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: September 6, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Kenichi Okazaki, Yasutaka Nakazawa
  • Patent number: 11378846
    Abstract: A display substrate, a manufacturing method thereof and a display device. The display substrate includes a working area and a sealant setting area outside of the working area. The display substrate further includes: a base substrate, a first conductive structure on a first side of the base substrate, and a second conductive structure on one side of the first conductive structure away from the base substrate. The first conductive structure and the second conductive structure are in the sealant setting area. The second conductive structure at least includes an inclined part inclined relative to a main surface of the base substrate. The inclined part is configured to allow at least part of light to be exited out directly over the first conductive structure after the light incident into the inclined part from a second side of the base substrate opposite to the first side is reflected by the inclined part.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: July 5, 2022
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Bo Shi, Yuanjie Xu, Wenhua Song, Ting Li
  • Patent number: 11329221
    Abstract: The present disclosure, in some embodiments, relates to a method of forming a resistive random access memory (RRAM) device. The method includes forming one or more bottom electrode films over a lower interconnect layer within a lower inter-level dielectric layer. A data storage film having a variable resistance is formed above the one or more bottom electrode films. A lower top electrode film including a metal is over the data storage film, one or more oxygen barrier films are over the lower top electrode film, and an upper top electrode film including a metal nitride is formed over the one or more oxygen barrier films. The one or more oxygen barrier films include one or more of a metal oxide film and a metal oxynitride film. The upper top electrode film is formed to be completely confined over a top surface of the one or more oxygen barrier films.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: May 10, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Ting Chu, Tong-Chern Ong, Ying-Lang Wang
  • Patent number: 11316059
    Abstract: The present inventive concept relates to a thermal radiation body for cooling a heating element, which includes a pattern unit including a pore part provided as an empty space or filled with a gas phase and a cover part covering the pore part and dissipates heat of the heating element through heat radiation.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: April 26, 2022
    Inventors: Duk Kyu Bae, Sung Hee Kim, Ka Youn Kim, Sun Kyung Kim, Jin Woo Cho
  • Patent number: 11302834
    Abstract: This electromagnetic wave detector that detects electromagnetic waves by performing photoelectric conversion includes: a substrate; an insulating layer that is provided on the substrate; a graphene layer that is provided on the insulating layer; a pair of electrodes, which are provided on the insulating layer, and which are connected to both ends of the graphene layer, respectively; and a contact layer that is provided such that the contact layer is in contact with the graphene layer. The contact layer is formed of a material having a polar group, and a charge is formed in the graphene layer by having the contact layer in contact with the graphene layer.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: April 12, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masaaki Shimatani, Shimpei Ogawa, Daisuke Fujisawa, Satoshi Okuda
  • Patent number: 11296112
    Abstract: A semiconductor structure includes a doped semiconductor material portion, a metal-semiconductor alloy portion contacting the doped semiconductor material portion, a device contact via structure in direct contact with the metal-semiconductor alloy portion, and at least one dielectric material layer laterally surrounding the device contact via structure. The device contact via structure includes a barrier stack and a conductive fill material portion. The barrier stack includes at least two metal nitride layers and at least one nitrogen-containing material layer containing nitrogen and an element selected from silicon or boron.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: April 5, 2022
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventor: Fumitaka Amano
  • Patent number: 11279614
    Abstract: Microelectromechanical system (MEMS) inertial sensors exhibiting reduced parasitic capacitance are described. The reduction in the parasitic capacitance may be achieved by forming localized regions of thick dielectric material. These localized regions may be formed inside trenches. Formation of trenches enables an increase in the vertical separation between a sense capacitor and the substrate, thereby reducing the parasitic capacitance in this region. The stationary electrode of the sense capacitor may be placed between the proof mass and the trench. The trench may be filled with a dielectric material. Part of the trench may be filled with air, in some circumstances, thereby further reducing the parasitic capacitance. These MEMS inertial sensors may serve, among other types of inertial sensors, as accelerometers and/or gyroscopes. Fabrication of these trenches may involve lateral oxidation, whereby columns of semiconductor material are oxidized.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 22, 2022
    Assignee: Analog Devices, Inc.
    Inventors: Charles Blackmer, Jeffrey A. Gregory, Nikolay Pokrovskiy, Bradley C. Kaanta
  • Patent number: 11264506
    Abstract: A semiconductor device includes a power switch circuit and a logic circuit. The semiconductor device includes a first dielectric layer and a thin film transistor (TFT) formed on the first dielectric layer. The TFT includes a semiconductor nano-sheet, a gate dielectric layer wrapping around a channel region of the semiconductor nano-sheet, and a gate electrode layer formed on the gate dielectric layer. The semiconductor nano-sheet is made of an oxide semiconductor material.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: March 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Marcus Johannes Henricus Van Dal, Gerben Doornbos
  • Patent number: 11264414
    Abstract: An image sensor includes a semiconductor substrate having opposite first and second surfaces, a wiring structure on the first surface of the semiconductor substrate, and a refractive structure on the second surface of the semiconductor substrate. The refractive structure includes a first anti-reflective layer on the second surface of the semiconductor substrate, a refractive pattern on the first anti-reflective layer, an insulation layer on the first anti-reflective layer, and a second anti-reflective layer on the refractive pattern and the insulation layer. The refractive pattern includes first refractive parts spaced apart from each other in a first direction parallel to the second surface of the semiconductor substrate, and the insulation layer fills spaces between the first refractive parts.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: March 1, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Masaru Ishii, Tae-hyoung Kim, Min-ho Jang, In-sung Joe
  • Patent number: 11257998
    Abstract: A semiconductor element package includes: a semiconductor element arranged above a first substrate; first and second electrodes arranged above the first substrate and electrically connected to the semiconductor element; a housing which is arranged above the first substrate and arranged around the semiconductor element, and which has a stepped portion in the upper area thereof; a diffusion part arranged on the stepped portion of the housing and arranged above the semiconductor element; and a plurality of via holes penetrating the first substrate and the housing.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: February 22, 2022
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Keon Hwa Lee, Do Yub Kim, Myung Sub Kim, Baek Jun Kim
  • Patent number: 11239213
    Abstract: A method of fabricating a multi-color display includes dispensing a photo-curable fluid over a display having an array of LEDs disposed below a cover layer. The cover has an outer surface with a plurality of recesses, and the photo-curable fluid fills the recesses. The photo-curable fluid includes a color conversion agent. A plurality of LEDs in the array are activated to illuminate and cure the photo-curable fluid to form a color conversion layer in the recesses over the activated LEDs. This layer will convert light from these LEDs to light of a first color. An uncured remainder of the photo-curable fluid is removed. Then the process is repeated with a different photo-curable fluid having a different color conversion agent and a different plurality of LEDs. This forms a second color conversion layer in different plurality of recesses to convert light from these LEDs to light of a second color.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: February 1, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Daihua Zhang, Yingdong Luo, Mingwei Zhu, Hou T. Ng, Sivapackia Ganapathiappan, Nag B. Patibandla