Abstract: A light-emitting element extending in one direction includes: a semiconductor core including a main body extending in the one direction, a first end connected to one side of the main body and having an inclined side surface, and a second end connected to an other side of the main body and having a width less than that of the main body; and an insulation film around at least a portion of the outer surface of the semiconductor core, wherein the insulation film includes a first insulation film around the first end of the semiconductor core; and a second insulation film around the second end of the semiconductor core, wherein the diameter of an outer surface of the first insulation film is the same as a diameter of an outer surface of the second insulation film.

Abstract: A display device may include a pixel circuit in a display area including a rounded corner portion, a scan driving circuit in a peripheral area surrounding the display area, and configured to provide a scan signal to the pixel circuit, a fan-out line between the pixel circuit and the scan driving circuit in the peripheral area adjacent to the corner portion, and configured to provide a pixel data signal to the pixel circuit, and a repair circuit between the scan driving circuit and the fan-out line in the peripheral area adjacent to the corner portion.

Abstract: A thin semiconductor packaging unit includes a semiconductor die, a mold, two contact bulks, a first bridge layer, a second bride layer, and two insulation layers; the mold covers a side surface of the semiconductor die; the mold includes two sides, and each of the sides includes at least one first contact area; the two contact bulks are respectively mounted on the two sides of the mold; each of the contact bulks includes at least one second contact area connecting the at least one first contact area; the first bridge layer connects the top electrode of the semiconductor die to one of the contact bulks; the second bride layer connects the bottom electrode of the semiconductor die to the other one of the contact bulks; the two insulation layers respectively cover the first bridge layer and the second bridge layer; the present invention dissipates heat efficiently.

Abstract: An embodiment of the present application discloses an OLED display device manufacturing method and an OLED display device. The method includes a first pixel definition partitioning bar forming step, a second pixel definition partitioning bar forming step, and a color ink printing step. The first pixel definition partitioning bar forming step includes forming first pixel definition partitioning bars on substrate along a first direction. the second pixel definition partitioning bar forming step includes forming second pixel definition partitioning bars on the substrate along a second direction. An overflow drainage region is defined in each of the second pixel definition partitioning bars. The present application uses the overflow drainage region to perform an overflow drainage color inks printed on the substrate in the color ink printing step to prevent an issue of the overflowing color inks has color mixing and affect a quality of the OLED display device.

Abstract: The invention is that of an encapsulated electronic component assembly that may be incorporated into a textile or yarn. Electronic components is encapsulated in two flexible substrates forming a pod for housing the electronic components. A flexible substrate may be a flexible polymer film capable of compression in response to a bending force, protecting the internal electronic components. The components in the substrate may then be incorporated into a yarn or woven into a textile. The electronic components may comprise an antenna, data processor, light emitter, accelerometer, or other components.

Abstract: A method of manufacturing a semiconductor device includes applying a polymer mixture over a substrate, exposing and developing at least a portion of the polymer mixture to form a developed dielectric, and curing the developed dielectric to form a dielectric layer. The polymer mixture includes a polymer precursor, a photosensitizer, and a solvent. The polymer precursor may be a polyamic acid ester.

Abstract: A method for manufacturing optical unit, the method includes (a) obtaining an intermediate optical unit that comprises a semiconductor portion, a transparent organic layer, the array of organic microlenses and a protective layer; (b) depositing a protective mask above a first protective layer region; (c) removing, by applying a first etch process, the second protective layer region to expose a second region of the transparent organic layer; and (d) removing, by applying a second etch process, the second region of the transparent organic layer to expose the contact pads and removing the protective mask while maintaining the first protective layer portion.

Abstract: An optoelectronic module, including a substrate, a covering member, a light emitting element, and a light receiving element, is provided. The covering member is disposed on the substrate and includes an upper cover portion, a peripheral sidewall portion connected to the upper cover portion, and an inside partition delimiting a first cavity and a second cavity. The first cavity is separated from the second cavity. The light emitting element is disposed on the substrate as corresponding to the first cavity. The light receiving element is disposed on the substrate as corresponding to the second cavity. The inside partition has a first inner wall surface located in the first cavity and a second inner wall surface located in the second cavity. A first protruded-recessed structure is formed on the first inner wall surface.

Abstract: A method of forming a semiconductor package includes providing a first metal substrate; and mounting a stacked arrangement on the first metal substrate, the stacked arrangement comprising a semiconductor die, wherein mounting the stacked arrangement includes: providing a first layer of attachment material between the first metal substrate and the stacked arrangement; and providing a second layer of attachment material within the stacked arrangement at an interface with the semiconductor die, wherein at least one of the first and second layers of attachment material is a compressible layer that includes one or more elastomeric elements embedded within a matrix of solder material.

Abstract: Provided is a floating gate based 3-terminal analog synapse device including a silicon channel layer; a gate oxide deposited on the silicon channel layer; a charge trap layer deposited on the gate oxide, wherein charges are injected into the charge trap layer; a barrier layer deposited on the charge trap layer, and having lower electron affinity than electron affinity of a material of the charge trap layer; and a gate metal layer deposited on an upper surface of the barrier layer, wherein a gate voltage is applied to the gate metal layer.

Abstract: A light-emitting device includes a substrate including a top surface, a first side surface and a second side surface, wherein the first side surface and the second side surface of the substrate are respectively connected to two opposite sides of the top surface of the substrate; a semiconductor stack formed on the top surface of the substrate, the semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first electrode pad formed adjacent to a first edge of the light-emitting device; and a second electrode pad formed adjacent to a second edge of the light-emitting device, wherein in a top view of the light-emitting device, the first edge and the second edge are formed on different sides or opposite sides of the light-emitting device, the first semiconductor layer adjacent to the first edge includes a first sidewall directly connected to the first side surface of the substrate,

Abstract: A power device for surface mounting has a leadframe including a die-attach support and at least one first lead and one second lead. A die, of semiconductor material, is bonded to the die-attach support, and a package, of insulating material and parallelepipedal shape, surrounds the die and at least in part the die-attach support and has a package height. The first and second leads have outer portions extending outside the package, from two opposite lateral surfaces of the package. The outer portions of the leads have lead heights greater than the package height, extend throughout the height of the package, and have respective portions projecting from the first base.

Abstract: A display base plate includes: a substrate (101), a first electrode layer (102) formed on the substrate (101), and a first pixel definition layer (103) and a second pixel definition layer (104) formed on the first electrode layer (102); the first pixel definition layer (103) divides the substrate (101) into a plurality of pixel regions (105), each pixel region (105) includes a plurality of subpixel regions (1050) distributed along a first direction, and two adjacent subpixel regions (1050) are separated by the second pixel definition layer (104); in the first direction, surfaces of each pixel region (105) in contact with the first pixel definition layer (103) include a plurality of first curved surfaces (1061) and a plurality of second curved surfaces (1062), and the first curved surfaces (1061) and the second curved surfaces (1062) are protruded away from the pixel region (105) to which they belong.

Abstract: A package structure includes first and second package components, an underfill layer disposed between the first and second package components, and a metallic layer. The first package component includes semiconductor dies, a first insulating encapsulation laterally encapsulating the semiconductor dies, and a redistribution structure underlying first surfaces of the semiconductor dies and the first insulating encapsulation. The second package component underlying the first package component is electrically coupled to the semiconductor dies through the redistribution structure. The underfill layer extends to cover a sidewall of the first package component, the metallic layer overlying second surfaces of the semiconductor dies and the first insulating encapsulation, and a peripheral region of the second surface of the first insulating encapsulation is accessibly exposed by the metallic layer, where the first surfaces are opposite to the second surfaces.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a plurality of first nanostructures stacked over a substrate in a vertical direction. The semiconductor device structure includes a first gate structure surrounding the first nanostructures. The semiconductor device structure also includes a first gate spacer layer formed adjacent to the first gate structure. A topmost first nanostructure has a first portion directly below the gate spacer layer and a second portion directly below the first gate structure, and the first portion has a first height along the vertical direction, the second portion has a second height along the vertical direction, and the first height is greater than the second height.

Abstract: Foldable substrates have a first portion, a second portion, and a central portion positioned therebetween with a first transition region having a first central surface area of the central portion with a first average angle. In aspects, the first average angle is from about 176.10 to about 179.9° or from about 177.0° to about 179.9°. In aspects, a polymer angle is from 178.3° to about 179.9° or from about 179.10 to about 179.9°. Methods comprise disposing an etch mask over the first major surface of the foldable substrate before etching the foldable substrate. In aspects, the etch mask comprises a first polymer layer positioned between a first barrier layer and the first major surface. In aspects, the etch mask comprises a plurality of ink-jet printed shapes. Methods of measuring a contrast ratio comprise impinging a transparent apparatus with a collimated beam.

Abstract: Disclosed is a method for manufacturing a display panel. The method includes: providing a display back plate, wherein the display back plate is provided with a light emitting side; attaching a protective film on the light emitting side of the display back plate, wherein the protective film comprises a transparent adhesive layer disposed on the display back plate and a heavy release film disposed on a side, distal from the display back plate, of the transparent adhesive layer; treating the transparent adhesive layer; and removing the heavy release film, and attaching a functional layer on a side, distal from the display back plate, of the transparent adhesive layer.

Abstract: The display substrate includes: a base substrate; a pixel defining layer on the base substrate, and an organic light-emitting functional layer. The pixel defining layer includes: openings in sub-pixels respectively and communication slots. The organic light-emitting functional layer corresponding to the sub-pixels is provided in the openings. In at least one row of pixels, openings of sub-pixels of the same color communicate with one another through corresponding communication slots. At least of a portion of the communication slots are located in gaps between adjacent rows of pixels.

Abstract: Monolithic multi-dimensional integrated circuits and memory architecture are provided. Exemplary integrated circuits comprise an electronic board having a first side and a second side, a multi-dimensional electronic package having multiple planes, and one or more semiconductor wafers mounted on the first side and the second side of the electronic board and on the multiple planes of the electronic package. Exemplary monolithic multi-dimensional memory architecture comprises one or more tiers, one or more monolithic inter-tier vias spanning the one or more tiers, at least one multiplexer disposed in one of the tiers, and control logic determining whether memory cells are active and which memory cells are active and controlling usage of the memory cells based on such determination. Each tier has a memory cell, and the inter-tier vias act as crossbars in multiple directions. The multiplexer is communicatively coupled to the memory cell in the respective tier.

Abstract: A photoelectric conversion device includes a photoelectric conversion area in which photoelectric conversion elements each including a first electrode, a second electrode, and a photoelectric conversion layer, provided between the first electrode and the second electrode, that contains a semiconductor material are provided in a matrix and a guard ring surrounding a periphery of the photoelectric conversion area in a form of a frame. The guard ring has an intermediate layer containing the same semiconductor material as the photoelectric conversion layer.