Patents Examined by Anita K Alanko
  • Patent number: 7686967
    Abstract: A cooled liquid sample dispensing system comprises a pair of pins for holding a droplet of liquid therebetween and a cooling element. Each pin includes a tip spaced predetermined distance from the other pin to define a sample acquisition region. The pins acquire and hold a droplet of the liquid sample in the sample acquisition region formed in the space between the tips and apply the droplet to a selected sample handing system. The cooling element, when activated, cools the droplet of liquid to reduce evaporation.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: March 30, 2010
    Assignee: Cytonome/St, LLC
    Inventors: John R. Gilbert, Sebastian Böhm
  • Patent number: 7682516
    Abstract: A method for etching features in an etch layer is provided. A patterned photoresist mask is formed over the etch layer with photoresist features with sidewalls wherein the sidewalls of the photoresist features have irregular profiles along depths of the photoresist features. The irregular profiles along the depths of the photoresist features of the sidewalls of the photoresist features are corrected comprising at least one cycle, where each cycle comprises a sidewall deposition phase and a profile shaping phase. Feature is etched into the etch layer through the photoresist features. The mask is removed.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: March 23, 2010
    Assignee: Lam Research Corporation
    Inventors: S. M. Reza Sadjadi, Peter Cirigliano, Jisoo Kim, Zhisong Huang, Eric A. Hudson
  • Patent number: 7682985
    Abstract: A method for etching a stack with at least one silicon germanium layer over a substrate in a processing chamber is provided. A silicon germanium etch is provided. An etchant gas is provided into the processing chamber, wherein the etchant gas comprises HBr, an inert diluent, and at least one of O2 and N2. The substrate is cooled to a temperature below 40° C. The etching gas is transformed to a plasma to etch the silicon germanium layer.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: March 23, 2010
    Assignee: Lam Research Corporation
    Inventors: C. Robert Koemtzopoulos, Yoko Yamaguchi Adams, Yoshinori Miyamoto, Yousun Kim Taylor
  • Patent number: 7678288
    Abstract: A method of manufacturing bonded substrate structures. The method includes providing a first substrate comprising a first surface region and processing the first surface region to form a first pattern region using a first photolithographic stepper characterized by a first tolerance criteria for alignment. The method also includes providing a second substrate comprising a second surface region and processing the second surface region through at least one masking process to form a second pattern region using a second photolithographic stepper characterized by a second tolerance criteria for alignment.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: March 16, 2010
    Assignee: Miradia Inc.
    Inventors: Xiao Yang, Kegang Huang, Yuxiang Wang, Howard Woo
  • Patent number: 7678287
    Abstract: An information storage medium and method of manufacturing such a medium, particularly applicable to computer hard disks. An information storage medium includes an approximately plane front face and a back face, the medium being read and/or written by a device placed facing the front face. The back face includes recessed areas and all or part of sidewalls and/or the bottom of the recessed areas is covered with a magnetic deposit, the distance separating the front face from the deposit being such that the device can read and/or write information in the deposit.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: March 16, 2010
    Assignee: Commissariat a l'Energie Atomique
    Inventor: Stefan Landis
  • Patent number: 7674389
    Abstract: Methods of shape modifying a nanodevice by contacting it with a low-energy focused electron beam are disclosed here. In one embodiment, a nanodevice may be permanently reformed to a different geometry through an application of a deforming force and a low-energy focused electron beam. With the addition of an assist gas, material may be removed from the nanodevice through application of the low-energy focused electron beam. The independent methods of shape modification and material removal may be used either individually or simultaneously. Precision cuts with accuracies as high as 10 nm may be achieved through the use of precision low-energy Scanning Electron Microscope scan beams. These methods may be used in an automated system to produce nanodevices of very precise dimensions. These methods may be used to produce nanodevices of carbon-based, silicon-based, or other compositions by varying the assist gas.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: March 9, 2010
    Assignee: The Regents of the University of California
    Inventors: Alex Zettl, Thomas David Yuzvinsky, Adam Fennimore
  • Patent number: 7670496
    Abstract: A structural body comprising a substrate and a structural layer formed on the substrate through an air gap in which the structural layer functions as a micro movable element is produced by a process comprising a film-deposition step of successively forming a sacrificial layer made of a silicon oxide film and the structural layer on the substrate, an air gap-forming step of removing the sacrificial layer by etching with a treating fluid to form the air gap between the substrate and the structural layer, and a cleaning step. By using a supercritical carbon dioxide fluid containing a fluorine compound, a water-soluble organic solvent and water as the treating fluid, the sacrificial layer is removed in a short period of time with a small amount of the treating fluid without any damage to the structural body.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: March 2, 2010
    Assignees: SONY Corporation, Mitsubishiki Gas Chemical Company, Inc.
    Inventors: Koichiro Saga, Hiroya Watanabe, Tomoyuki Azuma
  • Patent number: 7666796
    Abstract: Some embodiments of the present invention include apparatuses and methods relating to improved substrate patterning for multi-gate transistors.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: February 23, 2010
    Assignee: Intel Corporation
    Inventors: Ibrahim Ban, Uday Shah, Allen B. Gardiner
  • Patent number: 7666321
    Abstract: A method for decapsulating a package is provided. The method comprises steps of providing a package having a chip therein, wherein the chip has an active surface and a rear surface. Further, the package further comprises a heat sink, a plurality of solder bumps, a substrate, an underfill and a plurality of solder balls. The method further comprises removing the heat sink and removing the substrate together with the solder balls. A dry etching process is performed to remove a portion of the underfill. A wet etching process is performed to remove the rest portion of the underfill. A thermal process solder bump removal process is performed to melt the solder bumps and then a solder bump removal process is performed to remove the melted solder bumps from the active surface of the chip.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: February 23, 2010
    Assignee: United Microelectronics Corp.
    Inventor: Tung-Yi Shih
  • Patent number: 7666320
    Abstract: There is provided a method for removing molten and scattered Cu and overhang that are generated around a via opening during laser machining in a direct laser via forming method of directly machining an outer-layer copper foil. In a manufacturing method of a printed wiring board of machining the via by laser directly through the copper foil of a copper-clad laminate in which the copper foil is clad on a base material resin, a process for machining the via is carried out in a sequence of (a) a copper foil surface treatment step of forming an oxide film on the surface of said copper foil, (b) a laser via machining step, (c) an alkali treatment step and (d) a molten and scattered Cu etching step. It is desirable to carry out (e) a de-smearing treatment after the molten and scattered Cu etching.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: February 23, 2010
    Assignee: Hitachi Via Mechanics, Ltd.
    Inventors: Toshinori Kawamura, Haruo Akahoshi, Kunio Arai
  • Patent number: 7662299
    Abstract: A method for forming a template useful for nanoimprint lithography comprises forming at least one pillar which provides a topographic feature extending from a template base. At least one conformal pattern layer and one conformal spacing layer, and generally a plurality of alternating pattern layers and spacing layers, are formed over the template base and pillar. A planarized filler layer is formed over the pattern and spacing layers, then the filler, the spacing layer and the pattern layer are partially removed, for example using mechanical polishing, to expose the pillar. One or more etches are performed to remove at least a portion of the pillar, the filler, and the spacing layer to result in the pattern layer protruding from the spacing layer and providing the template pattern.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: February 16, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Krupakar M. Subramanian, Mirzafer Abatchev
  • Patent number: 7641806
    Abstract: By steps of forming first masks 13, 14 each having a first pattern on a first surface of a substrate 11 on which a membrane is to be formed, etching the first surface of the substrate 11 by using the first masks 13, 14 to forming first support beams 15, positioning a second surface of the substrate 11 on the basis of the first pattern on the first surface, forming a second mask 17 having a second pattern on the second surface of the substrate 11 based on the alignment and etching the second surface of the substrate 11 in dry by using the second mask 17 to form the second support beams 20, a membrane member 22a where the first and second support beams 15, 20 are formed on both surfaces of the membrane 12 is manufactured. Consequently, it is possible to provide the membrane member that is sufficient in strength and is hard to be deformed by heat.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: January 5, 2010
    Assignees: Tokyo Electron Limited, OCTEC Inc.
    Inventors: Katsuya Okumura, Kazuya Nagaseki, Naoyuki Satoh, Koji Maruyama
  • Patent number: 7635436
    Abstract: The present invention provides an etchant composition containing 60 to 75 wt % of phosphoric acid (H3PO4), 0.5 to 15 wt % of nitric acid (HNO3), 2 to 15 wt % of acetic acid (CH3COOH), and 0.1 to 15 wt % of aluminum nitrate (Al(NO3)3).
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: December 22, 2009
    Assignee: Samsung Elctronics Co., Ltd.
    Inventors: Kyu-Sang Kim, Kwan-Tack Lim
  • Patent number: 7625495
    Abstract: Methods and devices for mechanical and/or chemical-mechanical planarization of semiconductor wafers, field emission displays and other microelectronic substrate assemblies. One method of planarizing a microelectronic substrate assembly in accordance with the invention includes pressing a substrate assembly against a planarizing surface of a polishing pad at a pad/substrate interface defined by a surface area of the substrate assembly contacting the planarizing surface. The method continues by moving the substrate assembly and/or the polishing pad with respect to the other to rub at least one of the substrate assembly and the planarizing surface against the other at a relative velocity. As the substrate assembly and polishing pad rub against each other, a parameter indicative of drag force between the substrate assembly and the polishing pad is measured or sensed at periodic intervals.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: December 1, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Jim Hofmann, Gundu M. Sabde, Stephen J. Kramer, Scott E. Moore
  • Patent number: 7625494
    Abstract: The present invention is a plasma etching method including: an arranging step of arranging a pair of electrodes oppositely in a chamber and making one of the electrodes support a substrate to be processed in such a manner that the substrate is arranged between the electrodes, the substrate having an organic-material film and an inorganic-material film; and an etching step of applying a high-frequency electric power to at least one of the electrodes to form a high-frequency electric field between the pair of the electrodes, supplying a process gas into the chamber to form a plasma of the process gas by means of the electric field, and selectively plasma-etching the organic-material film of the substrate with respect to the inorganic-material film by means of the plasma; wherein a frequency of the high-frequency electric power applied to the at least one of the electrodes is 50 to 150 MHz in the etching step.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: December 1, 2009
    Assignees: Tokyo Electron Limited, Kabushiki Kaisha Toshiba
    Inventors: Masanobu Honda, Kazuya Nagaseki, Koichiro Inazawa, Shoichiro Matsuyama, Hisataka Hayashi
  • Patent number: 7622052
    Abstract: Methods are provided for chemical mechanical planarization of a layer and for determining the endpoint of a CMP operation. In accordance with one embodiment the method for determining an endpoint comprises making a plurality of eddy current thickness measurement of the layer being planarized, each of the plurality of measurements spaced apart by a predetermined length of time. A difference is calculated between sequential ones of the plurality of eddy current measurements, and a predetermined minimum threshold for the difference is set. The endpoint is defined as a calculated difference less than the predetermined minimum threshold.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: November 24, 2009
    Assignee: Novellus Systems, Inc.
    Inventors: Justin Quarantello, Thomas Laursen, Karl Kasprzyk, Rob Stoya
  • Patent number: 7615164
    Abstract: The invention includes etching and contact opening forming methods. In one implementation, a plasma etching method includes providing a bottom powered plasma chamber that includes a plasma generating electrode powerable at different first and second frequencies, with the first frequency being lower than the second frequency. A substrate is positioned over the electrode. A plasma is generated over the substrate with the electrode from a first applied power at the first frequency and a second applied power at the second frequency. A ratio of the first applied power to the second applied power is from 0 to 0.25 or at least 6.0. Material is etched from the substrate with the plasma.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: November 10, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Bradley J. Howard, Max F. Hineman
  • Patent number: 7615163
    Abstract: A method of using a film formation apparatus for a semiconductor process includes processing by a cleaning gas a by-product film deposited on an inner surface of a reaction chamber of the film formation apparatus. This step is arranged to supply the cleaning gas into the reaction chamber, and set an interior of the reaction chamber at a first temperature and a first pressure. The by-product film mainly contains a high-dielectric-constant material. The cleaning gas contains chlorine without containing fluorine. The first temperature and the first pressure are set to activate chlorine in the cleaning gas.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: November 10, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Akitake Tamura, Shigeru Nakajima, Tetsushi Ozaki
  • Patent number: 7611639
    Abstract: A method for manufacturing a glass substrate having projections of the same height. The method includes forming a surface layer having a decreased chemical resistance on a glass plate, forming a texture including a plurality of projections having upper portions included in the surface layer, and selectively removing the surface layer.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: November 3, 2009
    Assignee: Hoya Corporation
    Inventors: Yasuhiro Saito, Toshiaki Hashimoto, Yuriko Kudoh
  • Patent number: 7608195
    Abstract: A process for etching a insulating layer to produce an opening having an aspect ratio of at least 15:1 by supplying a first gaseous etchant having at least fifty (50) percent He to a plasma etch reactor, and exposing the insulating layer to a plasma of the first gaseous etchant. Use of the first gaseous etchant reduces the occurrence of twisting in openings in insulating layers having an aspect ratio of at least 15:1.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: October 27, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Aaron R. Wilson