Patents Examined by Anita K Alanko
  • Patent number: 9991116
    Abstract: The invention disclosed a method for forming high aspect ratio patterning structure. Firstly, forming a dielectric film ashing stop layer, a first photoresist layer, a first hard mask layer and a second photoresist layer on a semiconductor substrate in turn. A second hard mask layer having a high etch selectivity ratio with the first photoresist layer is formed on top surface and sidewall of the pattern by utilizing a low temperature chemical vapor deposition process, which can be a protect for the pattern sidewall during the later etching process of the first photoresist layer. So, the cone-shaped or the bowling-shaped photoresist morphology caused by plasma bombardment can be avoided. Therefore, the problems of the insufficient of selectivity ratio, burrs at the edge of the pattern and larger critical dimension can be solved, and the implanted ions can be well distributed according to the design of the device.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: June 5, 2018
    Assignee: SHANGHAI HUALI MICROELECTRONICS CORPORATION
    Inventors: Peng Liu, Qiyan Feng, Yu Ren, Yukun Lv, Jun Zhu, Hsusheng Chang
  • Patent number: 9982166
    Abstract: CMP processes, tools and slurries utilize metal oxide-polymer composite particles that include metal oxide particles and a polymer core. The metal oxide particles are modified with a modifying agent and are partially or fully embedded within the polymer core. Using these processes, tools and slurries can enhance removal rates, reduce defectivity and increase cleanability with respect to comparable systems and substrates.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: May 29, 2018
    Assignee: Cabot Corporation
    Inventors: Brian G. Prevo, Mark J. Hampden-Smith, Dmitry Fomitchev, Yakov E. Kutsovsky
  • Patent number: 9977522
    Abstract: A touch panel and a method of manufacturing the touch panel are provided. The touch panel includes a substrate comprising a wiring area and a sensor area, a sensing pattern located on a surface of the substrate in the sensor area, and a wiring line located on the surface of the substrate in the wiring area and electrically connected to the sensing pattern. The sensing pattern includes a plurality of first fine metal lines arranged irregularly in a mesh, and a first photosensitive layer pattern residue located between at least two of the first fine metal lines.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: May 22, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ki Hyun Cho, Cheol Kyu Kim, Sung kyun Park, Sun Haeng Cho
  • Patent number: 9966274
    Abstract: Provided are a method of generating plasma and a method of fabricating a semiconductor device including the method, which may improve selectivity in an etching process and minimize damage to layers. The method of generating plasma includes generating first plasma by supplying at least one first process gas into a first remote plasma source (RPS) and applying first energy having a first power at a first duty ratio, and generating second plasma by supplying at least one second process gas into a second RPS and applying second energy having a second power at a second duty ratio.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: May 8, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gon-jun Kim, Sam Hyungsam Kim, Sangheon Lee
  • Patent number: 9966168
    Abstract: A method of fabricating a conductive thin film includes the following steps: forming a polymer fiber made of a polymer and a metal precursor distributed in a surface layer near the surface of the polymer fiber; and applying a plasma treatment on the polymer fiber to concurrently etch the polymer and reduce the metal precursor in the surface layer of the polymer fiber. When the plasma treatment is completed, a metal membrane is formed on the surface of the polymer fiber.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: May 8, 2018
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Chang-Shu Kuo, In-Gann Chen, Hung-Tao Chen, Han-Hsuan Cheng
  • Patent number: 9956743
    Abstract: Devices, systems and techniques are described for producing and implementing articles and materials having nano-scale and microscale structures that exhibit superhydrophobic, superoleophobic or omniphobic surface properties and other enhanced properties. In one aspect, a surface nanostructure can be formed by adding a silicon-containing buffer layer such as silicon, silicon oxide or silicon nitride layer, followed by metal film deposition and heating to convert the metal film into balled-up, discrete islands to form an etch mask. The buffer layer can be etched using the etch mask to create an array of pillar structures underneath the etch mask, in which the pillar structures have a shape that includes cylinders, negatively tapered rods, or cones and are vertically aligned. In another aspect, a method of fabricating microscale or nanoscale polymer or metal structures on a substrate is made by photolithography and/or nano imprinting lithography.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: May 1, 2018
    Assignee: The Regents of the University of California
    Inventors: Sungho Jin, Chulmin Choi
  • Patent number: 9958781
    Abstract: A method comprises applying a composition on a substrate to form a coating film on the substrate. The coating film is heated in an atmosphere in which an oxygen concentration is less than 1% by volume and a temperature is higher than 450° C. and 800° C. or lower, to form a film on the substrate. The composition comprises a compound comprising an aromatic ring. The oxygen concentration in the atmosphere during the heating of the coating film is preferably no greater than 0.1% by volume. The temperature in the atmosphere during the heating of the coating film is preferably 500° C. or higher and 600° C. or lower.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: May 1, 2018
    Assignee: JSR CORPORATION
    Inventors: Yuushi Matsumura, Goji Wakamatsu, Naoya Nosaka, Tsubasa Abe, Yoshio Takimoto
  • Patent number: 9938638
    Abstract: A method for producing a semiconductor epitaxial wafer, including steps of: fabricating an epitaxial wafer by epitaxially growing a semiconductor layer on a silicon-based substrate; observing the outer edge portion of the fabricated epitaxial wafer; and removing portions in which a crack, epitaxial layer peeling, and a reaction mark observed in the step of observing are present. As a result, a method for producing a semiconductor epitaxial wafer in which a completely crack-free semiconductor epitaxial wafer can be obtained, is provided.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: April 10, 2018
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazunori Hagimoto, Masaru Shinomiya, Keitaro Tsuchiya, Hirokazu Goto, Ken Sato, Hiroshi Shikauchi, Shoichi Kobayashi, Hirotaka Kurimoto
  • Patent number: 9919917
    Abstract: Disclosed herein an inertial sensor and a method of manufacturing the same. An inertial sensor 100 according to a preferred embodiment of the present invention is configured to include a plate-shaped membrane 110, a mass body 120 that includes an adhesive part 123 disposed under a central portion 113 of the membrane 110 and provided at the central portion thereof and a patterning part 125 provided at an outer side of the adhesive part 123 and patterned to vertically penetrate therethrough, and a first adhesive layer 130 that is formed between the membrane 110 and the adhesive part 123 and is provided at an inner side of the patterning part 125. An area of the first adhesive layer 130 is narrow by isotropic etching using the patterning part 125 as a mask, thereby making it possible to improve sensitivity of the inertial sensor 100.
    Type: Grant
    Filed: October 14, 2014
    Date of Patent: March 20, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong Woon Kim, Won Kyu Jeung
  • Patent number: 9922671
    Abstract: A write head having a main pole, a gap layer, and at least two sacrificial layers. In accordance with one embodiment, a method includes depositing a non-magnetic gap layer of material above a main pole layer of magnetic material; depositing a sacrificial layer of material above the non-magnetic gap layer of material; etching a portion of the sacrificial layer of material while not entirely removing the sacrificial layer of material; and depositing additional sacrificial material to the etched sacrificial layer.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: March 20, 2018
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Wei Tian, Venkateswara Rao Inturi, Dong Lin, Huaqing Yin, Jiaoming Qiu
  • Patent number: 9915002
    Abstract: This disclosure teaches a method for producing a nano metal mesh. A brittle layer can be deposited onto a flexible substrate, the brittle layer having a thickness on the flexible substrate. The flexible substrate can be bent to produce a plurality of gaps on the brittle material. A material can be deposited at the surface of the flexible substrate filling the gaps of the brittle layer. Then, the brittle layer can be etched from the flexible substrate using an etchant, a nano metal mesh formed by the material previously in the gaps. The disclosure also teaches a nano metal mesh made using this method.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: March 13, 2018
    Inventor: Ethan Pfeiffer
  • Patent number: 9903991
    Abstract: A method of fabricating a wire grid polarizer includes sequentially depositing a conductive wire pattern layer, and a plurality of guide patterns which forms one or more trenches therebetween on the conductive wire pattern layer, hydrophobically treating surfaces of the conductive wire pattern layer exposed in the trenches, and the guide patterns, coating the hydrophobically treated conductive wire pattern layer in the trenches with a neutral layer to partially fill the trenches, filling a remainder of the trenches with a block copolymer of two monomers with different etching rates, aligning the block copolymer filled in the trenches, selectively removing blocks of one monomer among the two monomers from the aligned block copolymer, and patterning the conductive wire pattern layer by using blocks of the other monomer among the two monomers remaining in the trenches and the guide patterns as a mask.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: February 27, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Eun Ae Kwak, Min Hyuck Kang, Moon Gyu Lee
  • Patent number: 9891526
    Abstract: A pattern-forming method includes applying an inorganic film-forming composition on an upper face side of a substrate to provide an inorganic film, forming a resist pattern on an upper face side of the inorganic film; and dry-etching once or several times using the resist pattern as a mask such that the substrate has a pattern The inorganic film-forming composition includes a polyacid or a salt thereof, and an organic solvent. The step for forming a resist pattern may include the steps of: applying a resist composition on an upper face side of the inorganic film to provide a resist film; exposing the resist film; and developing the resist film exposed.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: February 13, 2018
    Assignee: JSR CORPORATION
    Inventors: Shunsuke Kurita, Toru Kimura, Yoshio Takimoto, Kazunori Takanashi
  • Patent number: 9884768
    Abstract: Disclosed is a method for manufacturing a vertically-growing open carbon nanotube thin film. The method comprises: grinding the surface of a ceramic film by using metallographical sandpaper, performing ultrasonic cleaning by using acetone and performing boiling with water, and performing drying to obtain a ceramic film substrate; dissolving a catalyst ferrocene in a carbon source dimethylbenzene in an ultrasonic manner, and adding a carbon nanotube growth promoting agent thiophene to form a mixed solution; putting the ceramic film substrate in a tubular furnace reactor, introducing nitrogen, and slowly injecting the mixed solution at a constant speed to perform a high-temperature vapor deposition reaction; and further performing plasma etching and nitric acid reflux heating treatment to open closed ends of carbon nanotubes, and removing catalyst particles on the carbon nanotube thin film to obtain the open carbon nanotube thin film that is highly vertically aligned.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: February 6, 2018
    Assignee: Nanjing Tech University
    Inventors: Zhaoxiang Zhong, Yang Zhao, Zhong Yao
  • Patent number: 9885117
    Abstract: A method for conditioning a semiconductor chamber component may include passivating the chamber component with an oxidizer. The method may also include performing a number of chamber process operation cycles in a semiconductor processing chamber housing the chamber component until the process is stabilized. The number of chamber operation cycles to stabilize the process may be less than 10% of the amount otherwise used with conventional techniques.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: February 6, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Dmitry Lubomirsky, Sung Je Kim
  • Patent number: 9880036
    Abstract: A vacuum-cavity-insulated flow sensor and related fabrication method are described. The sensor comprises a porous silicon wall with numerous vacuum-pores which is created in a silicon substrate, a porous silicon membrane with numerous vacuum-pores which is surrounded and supported by the porous silicon wall, and a cavity with a vacuum-space which is disposed beneath the porous silicon membrane and surrounded by the porous silicon wall. The fabrication method includes porous silicon formation and silicon polishing in HF solution.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: January 30, 2018
    Assignee: Posifa
    Inventor: Xiang Zheng Tu
  • Patent number: 9873137
    Abstract: Disclosed is an ultrasonic transducer that is provided with: a bottom electrode; an electric connection part which is connected to the bottom electrode from the bottom of the bottom electrode; a first insulating film which is formed so as to cover the bottom electrode; a cavity which is formed on the first insulating film so as to overlap the bottom electrode when seen from above; a second insulating film which is formed so as to cover the cavity; and a top electrode which is formed on the second insulating film so as to overlap the cavity when seen from above. The electric connection part to the bottom electrode is positioned so as to not overlap the cavity when seen from above.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: January 23, 2018
    Assignee: HITACHI, LTD.
    Inventors: Shuntaro Machida, Takashi Kobayashi
  • Patent number: 9850578
    Abstract: Shielding coatings are applied to polymer substrates for selective metallization of the substrates. The shielding coatings include a primer component and a hydrophobic top coat. The primer is first applied to the polymer substrate followed by application of the top coat component. The shielding coating is then selectively etched to form an outline of a desired current pattern. A catalyst is applied to the patterned polymer substrate followed by electroless metal plating in the etched portions. The portions of the polymer substrate which contain the shielding coating inhibit electroless metal plating. The primers contain five-membered heterocyclic nitrogen compounds and the top coat contains hydrophobic alky organic compounds.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: December 26, 2017
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Hung Tat Chan, Ka Ming Yip, Chit Yiu Chan, Kwok Wai Yee
  • Patent number: 9837251
    Abstract: A plasma etching method includes a first step of attracting a substrate onto a monopolar electrostatic chuck in a first plasma, which is a plasma of a noble gas, and stopping generation of the first plasma after the attracting of the substrate, and a second step of etching the substrate in a second plasma, which is a plasma of a halogen-based etching gas, and stopping generation of the second plasma after the etching of the substrate. In the first step, the generation of the first plasma is stopped when a positive voltage is applied from the monopolar electrostatic chuck to the substrate. In the second step, the generation of the second plasma is stopped when a negative voltage is applied from the monopolar electrostatic chuck to the substrate.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: December 5, 2017
    Assignee: ULVAC, INC.
    Inventor: Naoki Moriguchi
  • Patent number: 8557128
    Abstract: Methods for fabricating sub-lithographic, nanoscale microchannels utilizing an aqueous emulsion of an amphiphilic agent and a water-soluble, hydrogel-forming polymer, and films and devices formed from these methods are provided.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: October 15, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Dan B. Millward