Abstract: A surge current delay time period is added to a current limit delay time period in order to permit a longer time for a possibly temporary larger-than-steady-state electrical current, such as for a start-up power requirement. A system is described for permitting a legitimate surge current by distinguishing true over-current fault conditions from temporary surges in terms of high current duration time.

Abstract: An inverter circuit overcurrent protection device in which an overcurrent detection resistor (Rs) is incorporated in a hybrid integrated circuit, in which a detection voltage from the overcurrent detection resistor (Rs) is divided by voltage dividing resistors (R1 and R2) and is compared with a reference voltage in an overcurrent detection circuit, for carrying out an overcurrent protection, and an external resistor is connected in series or in parallel with one of the voltage dividing resistors (R1 and R2) to change a division ratio so that the level of overcurrent protection can be adjusted; and an embodiment wherein, in the vicinity of a current detection terminal, a first pad (P1) is connected to a detection voltage from the overcurrent detection resistance, a second pad (P2) is connected to a detection voltage from the amplifier, and a third pad (P3) is connected to the voltage dividing resistors, and a bonding wire (10) is connected between the current detection terminal one of said pads, to select one

Abstract: A latch-up-free ESD protection circuit using SCR is disclosed, in which an SCR is connected between the input pad and the negative power supply; a turn-on switch and a turn-off switch are connected between the positive power supply VDD (or the input pad) and the SCR; and a transistor gating circuit is connected to the turn-on switch and the turn-off switch to direct the operation of the SCR. When overvoltage stress develops over the input pad in the fast-transient mode, the turn-on switch enables the NPN transistor to switch on the SCR to form a discharging path for electrostatic discharge; and when overvoltage stress is released, the turn-off switch enables the PNP transistor to switch off the SCR, thus making it immune to any latch-up after the overvoltage stress is released, and having the advantages of fast triggering, low trigger voltage, no latch-up, and full ESD protection in the active and passive modes.

Abstract: A cable device includes an integrated surge protection circuit. In the event that, communication signals conveyed by the cable include (potentially damaging) transient voltages, the surge protection circuit integrated in the cable suppresses the transient voltages at a distance from a corresponding electronic circuit to which the cable is attached. Consequently, potentially damaging voltage transients imparted on the communication signals are clamped before reaching potentially sensitive inputs of the electronic circuit.