Patents Examined by Anthony Dinkins
  • Patent number: 7190568
    Abstract: A multilayer contact approach for use in a planar solid oxide fuel cell stack includes at least 3 layers of an electrically conductive perovskite which has a coefficient of thermal expansion closely matching the fuel cell material. The perovskite material may comprise La1-xEx Co0.6Ni0.4O3 where E is a alkaline earth metal and x is greater than or equal to zero. The middle layer is a stress relief layer which may fracture during thermal cycling to relieve stress, but remains conductive and prevents mechanical damage of more critical interfaces.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: March 13, 2007
    Assignee: Versa Power Systems Ltd.
    Inventors: Anthony Wood, Zheng Tang, Tahir Joia
  • Patent number: 7177137
    Abstract: A multilayer electronic component includes a plurality of dielectric layers interleaved with a plurality of internal electrode elements and a plurality of internal anchor tabs. Portions of the internal electrode elements and anchor tabs are exposed along the periphery of the electronic component in one or more aligned columns. Each exposed portion is within a predetermined distance from other exposed portions in a given column such that bridged terminations may be formed by depositing one or more plated termination materials over selected of the respectively aligned columns. Internal anchor tabs may be provided and exposed in prearranged relationships with other exposed conductive portions to help nucleate metallized plating material along the periphery of a device. External anchor tabs or lands may be provided to form terminations that extend to top and/or bottom surfaces of the device.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: February 13, 2007
    Assignee: AVX Corporation
    Inventors: Andrew P. Ritter, Robert Heistand, II, John L. Galvagni, Sriram Dattaguru, Jeffrey A. Horn, Richard A. Ladew
  • Patent number: 7167355
    Abstract: An electrode for a capacitor is provided and includes a conductive metal foil layer and an electronically conductive intermediate layer disposed on the metal foil layer. A thin metal oxide ink coating is operatively printed on the intermediate layer and in one form includes a mixture of a carbon containing powder, a metal oxide powder, a conductive binder, a polar solvent and a dispersing agent.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: January 23, 2007
    Assignee: T.B. Kim Technologies, Inc.
    Inventor: Zheng Chen
  • Patent number: 7164572
    Abstract: An electrical feedthrough assembly according to the invention can be used as a component of an implantable medical device (IMD) and/or or electrochemical cell. An IMD includes implantable pulse generators, cardioverter-defibrillators, physiologic sensors, drug-delivery systems, etc. Such assemblies require biocompatibility and resistance to degradation under applied bias current or voltage. In some forms of the invention, such assemblies are fabricated by using electrically common, multiply-interconnected electrical pathways including metallized vias and interlayer structures of conductive metallic material within bores and between ceramic layers. The layers are stacked together and sintered to form a substantially monolithic dielectric structure with at least one electrically common embedded metallization pathway extending through the structure.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: January 16, 2007
    Assignee: Medtronic, Inc.
    Inventors: Jeremy W. Burdon, Joyce K. Yamamoto
  • Patent number: 7151659
    Abstract: In a semiconductor device, a capacitor is provided which has a gap in at least one of its plates. The gap is small enough so that fringe capacitance between the sides of this gap and the opposing plate at least compensates, if not overcompensates, for the missing conductive material that would otherwise fill the gap and add to parallel capacitance. As a result, the capacitance of a storage device can be increased without taking up more die area. Alternatively, the size of a capacitor can be reduced with no decrease in capacitance. Various gap configurations and methods for providing them are also within the scope of the current invention.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: December 19, 2006
    Assignee: Micron Technology, Inc.
    Inventors: David Y. Kao, James Peacher
  • Patent number: 7149074
    Abstract: Methods to at least partially reduce a niobium oxide are described wherein the process includes heat treating the niobium oxide in the presence of a getter material and in an atmosphere which permits the transfer of oxygen atoms from the niobium oxide to the getter material, and for a sufficient time and at a sufficient temperature to form an oxygen reduced niobium oxide. Niobium oxides and/or suboxides are also described as well as capacitors containing anodes made from the niobium oxides and suboxides.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: December 12, 2006
    Assignee: Cabot Corporation
    Inventors: Jonathon L. Kimmel, Yongjian Qiu
  • Patent number: 7136275
    Abstract: The present invention includes a dielectric. The dielectric includes a polymer that has a high dielectric constant. The polymer includes polarizable species. The present invention also includes an embedded capacitor, and an IC package made with the dielectric.
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: November 14, 2006
    Assignee: Intel Corporation
    Inventors: Paul A. Koning, Paul H. Wermer
  • Patent number: 7120009
    Abstract: The capacitor element includes a chip body 2 prepared by compacting valve metal powder into a porous body and sintering the body, and an anode bar 3 fixed to the chip body so as to project from an end surface 2a of the chip body. A solid electrolyte layer 5 of conductive polymer is formed on the chip body via a dielectric film 4. A cathode film 6 is formed on the solid electrolyte layer. The solid electrolyte layer 5 formed at the end surface 2a of the chip body 2 includes carbide 5a formed by pyrolysis of the solid electrolyte layer to surround the entire circumference of the anode bar 3, so that damage is prevented from occurring at the root portion of the anode bar.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: October 10, 2006
    Assignee: Rohm Co., Ltd.
    Inventor: Kentarou Naka
  • Patent number: 7116547
    Abstract: Deposition of a metal-containing reagent solution or suspension onto a conductive substrate by various pad-printing techniques is described. This results in a pseudocapacitive oxide coating, nitride coating, carbon nitride coating, or carbide coating having an acceptable surface area for incorporation into an electrolytic capacitor, such as one having a tantalum anode.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: October 3, 2006
    Assignee: Wilson Greatbatch Technologies, Inc.
    Inventors: Keith Seitz, Ashish Shah, Barry Muffoletto, Wolfram Neff, Douglas Eberhard
  • Patent number: 7113385
    Abstract: For controlling a magnetic flux of an electromagnet with a relay pulling characteristic and at least two stabile levels of values of a magnetic flux in a magnetic guide, controlling pulses of electric current are supplied into a winding of a magnetizing coil with obtaining a pulling force of a moving part of a magnetic guide of the electromagnet at least with one air gap, wherein the magnetic guide is formed at least partially of a magnetically hard material, two short-term pulses having an opposite polarity are supplied into the magnetizing coil on the magnetic guides of the electromagnet, for closing a magnetic circuit and minimization of magnetic resistance of the magnetic guide due, and holding or attracting force is provided until a supply of a second controlling pulse of electric current of the opposite polarity transferring the magnetic guide into a second stabile condition. Also, an electromagnet is proposed for an electromagnetic drive of an executing device.
    Type: Grant
    Filed: July 11, 2002
    Date of Patent: September 26, 2006
    Assignee: SPB United, Inc.
    Inventor: Nikolai Babich
  • Patent number: 7110240
    Abstract: A capacitor is described. The capacitor includes a case chamber. An electrode stack assembly is disposed within the case chamber. The electrode stack assembly includes a layer. The layer includes an anode subassembly. The anode subassembly comprises at least one anode layer that has an anode edge disposed at a first distance from an interior wall of the case chamber. The layer also includes a capacitor layer. The capacitor layer includes a cathode edge disposed at a second distance from the wall interior. The second distance is greater than the first distance.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: September 19, 2006
    Assignee: Medtronic, Inc.
    Inventors: Mark D. Breyen, Andrew Michael Jacobs, Anthony W. Rorvick, Paul A. Pignato
  • Patent number: 7102875
    Abstract: Disclosed is a capacitor with a dielectric structure having an aluminum oxide layer and a lanthanum oxide layer and a fabrication method thereof. The capacitor includes: a lower electrode; a first dielectric layer with a high energy band gap formed on the lower electrode; a second dielectric layer formed on the first dielectric layer, the second dielectric layer with a high dielectric constant, wherein an energy band gap of the second dielectric layer is lower than the energy band gap of the first dielectric layer; and an upper electrode formed on the second dielectric layer.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: September 5, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kee-Jeung Lee, Hong Kwon
  • Patent number: 7099144
    Abstract: There is a solid electrolytic capacitor having a low ESR characteristic. In accordance with the solid electrolytic capacitor using an capacitor element wherein solid electrolyte is formed, the post-etching void factor of the anode foil used for the capacitor element is set at not more than 51% or the post-etching void factor of the cathode foil used for the capacitor element is set at not more than 44%, so that an electrode foil increases in conductivity and decreases in resistivity, to thereby obtain, coupled with the solid electrolyte of a low resistivity, a solid electrolytic capacitor having a lower ESR characteristic.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: August 29, 2006
    Assignee: Nippon Chemi-Con Corporation
    Inventors: Kazuhiro Higuchi, Akihiro Inoue, Akio Ishii, Kazuhiro Saegusa, Kazuhiro Hatanaka
  • Patent number: 7095602
    Abstract: A method of forming a ceramic structure includes disposing substrate-forming ceramic green sheets having conductors, internal conductors, and via conductors so as to sandwich connecting member-forming ceramic green sheets having via conductors, followed by lamination and bonding thereof by pressure application, with the conductors being formed using a conductive paste primarily composed of a powdered metal, so that a ceramic laminate composed of ceramic molded bodies laminated to each other is formed. The ceramic laminate is fired at a temperature at which the substrate-forming ceramic green sheets are sintered and the connecting member-forming ceramic green sheets are not sintered and at a temperature not more than the melting point of the metal, and subsequently, the connecting member-forming ceramic green sheets are removed from the fired composite laminate, thereby forming a ceramic structure.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: August 22, 2006
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Masahiro Kimura
  • Patent number: 7092233
    Abstract: An improved capacitor that is less susceptible to the depletion effect and methods for providing the same. The capacitor comprises a first and second electrode and an insulating layer interposed therebetween. The first electrode includes a bulk layer comprising n-doped polysilicon. The first electrode also includes an interface layer extending from a first surface of the bulk layer to the insulating layer. The interface layer is heavily doped with phosphorus so that the depletion region of the first electrode is confined substantially within the interface layer. The method of forming the interface layer comprises depositing a layer of hexamethldisilazane (HMDS) material over the first surface of the bulk layer so that HMDS molecules of the HMDS material chemically bond to the first surface of the bulk layer. The method further comprises annealing the layer of HMDS material in a phosphine ambient so as to replace CH3 methyl groups with PH3 molecules.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: August 15, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Scott J. DeBoer, Don C. Powell
  • Patent number: 7088572
    Abstract: A polymer gel electrolyte includes an electrolyte solution composed of a plasticizer with at least two carbonate structures on the molecule and an electrolyte salt, in combination with a matrix polymer. Secondary batteries made with the polymer gel electrolyte can operate at a high capacitance and a high current, have a broad service temperature range and a high level of safety, and are thus particularly well-suited for use in such applications as lithium secondary cells and lithium ion secondary cells. Electrical double-layer capacitors made with the polymer gel electrolyte have a high output voltage, a large output current, a broad service temperature range and excellent safety.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: August 8, 2006
    Assignee: Nisshinbo Industries, Inc.
    Inventors: Hiroshi Yoshida, Kimiyo Hata, Tatsuya Maruo, Takaya Sato
  • Patent number: 7085126
    Abstract: A polymeric cradle molded about the periphery of an anode pellet in an electrolytic capacitor is described. The polymeric cradle contacts between a welding strap surrounding the butt seam between mating “clam shell” casing portions and the anode pellet sidewall. This prevents the anode pellet from moving along both an x- and y-axes. Having the cathode active material contacting the opposed major casing sidewalls being in a closely spaced relationship with the anode pellet through an intermediate separator prevents movement along the z-axis. The resulting capacitor is particularly well suited for use in high shock and vibration conditions.
    Type: Grant
    Filed: March 1, 2005
    Date of Patent: August 1, 2006
    Assignee: Wilson Greatbatch Technologies, Inc.
    Inventors: Barry Muffoletto, Laurie O'Connor
  • Patent number: 7082026
    Abstract: A high capacity silicon capacitor formed on an integrated circuit substrate includes a metal portion on the substrate; a silicon nitride (SiN) portion sputtered on the metal; a silicon (Si) portion sputtered on the silicon nitride portion, another SiN layer and finally a metal layer. The SiN layers are for increased isolation and are optional.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: July 25, 2006
    Inventor: Dominik J. Schmidt
  • Patent number: 7082025
    Abstract: To provide a capacitor device that has a fusing feature and which can be made miniaturized, lighter in weight and thin-shaped, comprising a plurality of conductive pattern electrodes 20 and 21 electrically separated by a separation groove 19; a capacitor element 15 in which at least either one of an anode lead 16 and a cathode lead 17 is connected via a thin metal wire 22 having a fusing feature to the conductive pattern electrodes 20 and 21; and a insulating resin 24 for covering a part except for the capacitor element 15 and a part working as the conductive pattern electrodes and for integrally supporting the conductive pattern electrode and the capacitor element.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: July 25, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Hiroyuki Tamura
  • Patent number: 7082024
    Abstract: A variable capacitor having a groove portion formed in an insulating substrate, two upper portions of the substrate located on either side of the groove portion forming two lateral edges, a conductive layer covering the inside of the groove portion, a flexible conductive membrane, placed above the groove portion by bearing on the edges, a dielectric layer covering the conductive layer or the membrane to insulate the conductive layer and the membrane, and terminals of application of a voltage between the conductive layer and the membrane, and such that the depth of the groove portion continuously increases from one of the edges to the bottom of the groove portion, and that the conductive layer covers the inside of the groove portion at least to reach one of the two edges, that it may cover.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: July 25, 2006
    Assignees: STMicroelectronics S.A., Commissariat a l'Energie Atomigue
    Inventors: Fabrice Casset, Guillaume Bouche, Rivoire Maurice