Patents Examined by Anthony Dinkins
  • Patent number: 7054134
    Abstract: A stacked capacitor includes a dielectric member, a plurality of internal electrodes, and a plurality of extraction electrodes. The dielectric member is a stacked member formed of a plurality of sheet-like stacked dielectric layers and has at least one side surface. The internal electrodes fit within the surface area of the dielectric layers and are stacked alternately with the dielectric layers. Further, the internal electrodes have first edges positioned near the side surface. Each extraction electrode has an overlapping portion A overlapping another extraction electrode at the side surface in a direction orthogonal to the mounting direction.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: May 30, 2006
    Assignee: TDK Corporation
    Inventors: Masaaki Togashi, Tatsuya Fukunaga
  • Patent number: 7054141
    Abstract: A capacitor includes a dielectric layer, a manganese dioxide layer, an organic solid electrolyte layer, and a carbon paste layer that are stacked in this order between a first electrode, which serves as an anode, and a second electrode, which serves as a cathode. Between the first electrode and the second electrode, an insulating resin layer is formed in the shape of a rectangular frame so as to surround the organic solid electrolyte layer. A lower end portion of the resin layer is fixed to the manganese dioxide layer while an upper end portion of the resin layer is fixed to the second electrode 16. Therefore, complete sealing is established between the first electrode and the second electrode in the outer peripheral end face of the capacitor.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: May 30, 2006
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hideaki Sakaguchi, Takashi Kurihara, Mitsutoshi Higashi, Takashi Mochizuki
  • Patent number: 7050289
    Abstract: A multilayer capacitor includes: a dielectric element; a pair of first internal conductors with same polarity disposed in the dielectric element to be adjacent to each other while being separated from each other by the dielectric layer; first leadout portions led out from the pair of first internal conductors respectively, one being provided for each of the first internal conductors; a pair of second internal conductors with same polarity disposed in the dielectric element to be adjacent to each other while being separated from each other by the dielectric layer; and second leadout portions led out from the pair of second internal conductors respectively, one being provided for each of the second internal conductors, wherein the first leadout portion and the second leadout portion led out respectively from the first internal conductor and the second internal conductor disposed adjacent to each other are led out to substantially the same positions in side faces facing each other of the dielectric element, resp
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: May 23, 2006
    Assignee: TDK Corporation
    Inventor: Masaaki Togashi
  • Patent number: 7050287
    Abstract: A high voltage sign ballast capacitor assembly is disclosed. The assembly includes two components for the sign ballast operation, namely a main capacitor element for power factor correction and up to six starting capacitors for aiding in starting under cold weather conditions. The main capacitor element is arranged and configured to divide the necessary capacitance into several capacitors connected in series. By doing so, the voltage is divided across each of the series capacitors resulting in reduced voltage stress and a reduction in the risk of corona arcing. The assembly is preferably constructed as a modular printed circuit board and a sleeve that houses the circuit board. The circuit board allows for the incorporation of multiple lead configurations, multiple start capacitors, and bleed resistors.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: May 23, 2006
    Assignee: American Shizuki Corporation (ASC Capacitors)
    Inventor: Stacey G Bauer
  • Patent number: 7050288
    Abstract: Internal electrodes A1 to D1 and A2 to D2 are laid in layers at spaces in the direction of thickness of a ceramic body 1. Lead electrodes a1 to d1 and a2 to d2 are led out to a side face to form lead portions. Dummy electrodes 51 to 58 have one-side ends led out to a side face to form lead portions in layers provided with the internal electrodes A1 to D1 and A2 to D2. The lead portion of a lead electrode a1 to d1 or a2 to d2 of each layer is superposed over the lead portion of a dummy electrode 51 to 58 belonging to another layer in the direction of thickness.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: May 23, 2006
    Assignee: TDK Corporation
    Inventors: Taisuke Ahiko, Sunao Masuda, Masaaki Togashi
  • Patent number: 7050291
    Abstract: An ultracapacitor formed on a semiconductor substrate includes a plurality conductive layers with intervening dielectric layers. These layers form a plurality of capacitors which may be connected in parallel to store a charge for powering an electronic circuit or for performing a variety of integrated circuit applications. A plurality of ultracapacitors of this type may be connected in series or may be designed in stacked configuration for attaining a specific charge distribution profile.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: May 23, 2006
    Assignee: Intel Corporation
    Inventors: Siva G. Narendra, Shekhar Y. Borkar
  • Patent number: 7049510
    Abstract: A sensor with a carrier board which is arranged in a housing is at least partly produced by an injection molding process and fitted with electronic, optical, electromechanical and/or opto-electronic components. A region of the carrier board and at least some of the components disposed thereon are arranged in a hollow space formed inside the at least partly injection molded housing.
    Type: Grant
    Filed: May 3, 2002
    Date of Patent: May 23, 2006
    Assignee: Sick AG
    Inventor: Torsten Neuhaeuser
  • Patent number: 7046499
    Abstract: A feedthrough device includes a conductive ferrule having an outer peripheral surface defining the outermost boundary of the feedthrough device, an insulator, a lead wire electrically isolated from the ferrule extending through the insulator, a filter capacitor adjacent the insulator through which the lead wire extends in conductive relation therewith, and a ground wire coupled to the ferrule and to the insulator within the outermost boundary of the feedthrough device. The ferrule has an inner peripheral surface defining an opening therethrough and each of the insulator and the filter capacitor has an outer peripheral surface proximate the inner peripheral surface, a counterbore in the outer peripheral surface of each of the insulator and filter capacitor, an end of the ground wire being received in the counterbore and brazed to the ferrule and insulator. Alternatively, an end of the ground wire is welded to the inner peripheral surface of the ferrule.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: May 16, 2006
    Assignee: Pacesetter, Inc.
    Inventors: Reza Imani, Rodney J. Hawkins
  • Patent number: 7046502
    Abstract: A multilayer ceramic capacitor having an internal electrode layer and a dielectric layer having a thickness of less than 2 ?m is provided, wherein the dielectric layer contains a plurality of dielectric particles, and when it is assumed that standard deviation of a particle distribution of the entire dielectric particles in the dielectric layer is ? (no unit), an average particle diameter of the entire dielectric particles in the dielectric layer is D50 (unit: ?m), and a rate that dielectric particles (coarse particles) having an average particle diameter of 2.25 times of the D50 exist in the entire dielectric particles is p (unit: %), the ? and p satisfy ?<0.130 and p<12%; by which a TC bias characteristic can be expected to be improved while maintaining various electric characteristics, particularly a sufficient permittivity, even when the interlayer dielectric layer is made thin.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: May 16, 2006
    Assignee: TDK Corporation
    Inventors: Takako Murosawa, Mari Miyauchi, Kazunori Noguchi, Akira Sato
  • Patent number: 7046504
    Abstract: The present invention relates to a solid electrolytic capacitor having a masking structure in which the insulation between the anode part and the cathode part can be ensured without fail, to its production method, to a method for coating a masking agent on a solid electrolytic capacitor substrate, and to apparatus therefore. According to the present invention, the masking material covers the dielectric film on the metal material having valve action and sufficiently infiltrates into the core metal made of a metal having valve action while the solid electrolyte is masked by the masking material without fail, so that a solid electrolytic capacitor can be produced that has a reduced leakage current and a reduced stress generated at the reflow treatment or the like.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: May 16, 2006
    Assignee: Showa Denko K.K.
    Inventors: Atsushi Sakai, Ryuji Monden, Hiroshi Nitoh, Toshihiro Okabe, Yuji Furuta, Hideki Ohata, Koro Shirane
  • Patent number: 7042707
    Abstract: A multilayer ceramic capacitor having internal electrode layers and dielectric layers, wherein a thickness of said dielectric layer is 2.0 ?m or less, and an average particle number per one dielectric layer obtained by dividing the thickness of said dielectric layer by an average particle diameter of dielectric particles composing said dielectric layer is 3 or more and 6 or less.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: May 9, 2006
    Assignee: TDK Corporation
    Inventors: Yuji Umeda, Akira Sato
  • Patent number: 7042703
    Abstract: An energy conditioning structure comprised of any combination of multilayer or monolithic energy conditioners with operable conductors, all selectively arranged and shielded for attachment to at least a conductive substrate.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: May 9, 2006
    Assignee: X2Y Attenuators, LLC
    Inventors: Anthony Anthony, William Anthony
  • Patent number: 7042698
    Abstract: A MEMS tunable capacitor and method of fabricating the same, includes a plurality of fixed charge plates on a substrate, the plurality of fixed charge plates having a same height, being arranged in a shape of comb-teeth and being electrically connected to one another, a capacitor dielectric layer covering the plurality of fixed charge plates, a movable charge plate structure spaced apart from the capacitor dielectric layer, and arranged on the plurality of fixed charge plates, wherein the movable charge plate structure includes a plurality of movable charge plates arranged corresponding the plurality of fixed charge plates, and an actuator connected to the movable charge plate structure allowing the movable charge plate structure to move in a horizontal direction.
    Type: Grant
    Filed: February 2, 2005
    Date of Patent: May 9, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seok-Jun Won, Kang-soo Chu, Weon-Hong Kim
  • Patent number: 7038902
    Abstract: A solid electrolytic capacitor is provided with: an anode employing tantalum; a dielectric layer formed on said anode; and a cathode layer formed on said dielectric layer. The dielectric layer contains tantalum oxide and fluorine.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: May 2, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kazuhiro Takatani, Mutsumi Yano, Mamoru Kimoto
  • Patent number: 7035075
    Abstract: A fixing and protecting arrangement for a capacitor may include a cooling element, one or more recesses arranged in the cooling element, and a capacitor intended to be fixed into each recess. The capacitor may be arranged in the recess in such a way that a lower surface of the capacitor is in contact with the cooling element for transferring heat from the capacitor to the cooling element.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: April 25, 2006
    Assignee: Vacon Oyj
    Inventors: Osmo Miettinen, Juha Norrena, Timo Koskinen, Leo Palomäki
  • Patent number: 7035078
    Abstract: An electrode assembly in embodiments of the invention can include a unitary member formed from an electrically conductive material having a central portion, and tab and plate portions extending radially outward from the central portion. The unitary member can be folded to configure the plate portions in a stacked configuration, thereby providing an electrically connected support structure for a cathode and/or anode assembly without individual connections/welds of plates to a common connection. The elimination of multiple welds lowers the internal resistance of the electrode assembly, and improves the structural integrity. Embodiments of the invention include batteries and implantable medical devices (IMDs) which incorporate the design flexibility in the shape and contour of the electrode assembly and hence, the overall shape and design of batteries and IMDs.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: April 25, 2006
    Assignee: Medtronic, Inc.
    Inventor: Joseph J. Viavattine
  • Patent number: 7035077
    Abstract: An insulative shield is co-bonded to the top of a ceramic capacitor in a feedthrough terminal assembly on an active implantable medical device. The insulative shield is a thin substrate that provides protection against damage and degradation of the feedthrough capacitor and/or its conformal coating from heat, splatter or debris resulting from the electromechanical connection of components during construction of the assembly. Laser welding, thermal or ultrasonic bonding, soldering, brazing or related lead attachment techniques can create such heat, splatter or debris. In a preferred embodiment, the insulative shield is co-bonded using the capacitor's own conformal coating.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: April 25, 2006
    Assignee: Greatbatch-Sierra, Inc.
    Inventor: Richard L. Brendel
  • Patent number: 7035082
    Abstract: A structure and method for manufacturing multi-electrode capacitor within a PCB is used to form a multi-electrode capacitor with a plurality of metal laminates coupled each other and employing the characteristics of the edge-coupled effect therein. the present invention can provide efficient capacitance from the capacitor with the smallest area. The present invention is applied to promote the capability of noise-restraint of the capacitive substrate in a high-frequency/speed system, and further achieves the purpose of regular circuit design with the smallest area in the future development.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: April 25, 2006
    Assignee: Industrial Technology Research Institute
    Inventors: Uei-Ming Jow, Chin-Sun Shyu
  • Patent number: 7031140
    Abstract: The invention provides an electric double layer capacitor which has a container made from a resin in a substantially rectangular parallelepipedal form by joining a first container half segment and a second container half segment each in the form of a box. The second container segment is provided at one end thereof with an extension extending along an outer side surface of the first container segment to the bottom outer surface thereof. A first lead member has a portion closer to one end thereof, embedded in the first container segment, the first lead member portion, bent as embedded in the first container segment and led out of the container to outside thereof. A second lead member has a portion closer to one end thereof, embedded in the second container segment, bent as embedded in the second container segment and extending through the extension to outside of the container.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: April 18, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Seiji Omura, Kiyotaka Ito
  • Patent number: 7027289
    Abstract: Extending high k material of a second dielectric layer to surround at least one thru-via designed to provide a signal other than a power signal to a die may eliminate discrete AC coupling capacitors to reduce cost and improve performance of the package.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: April 11, 2006
    Assignee: Intel Corporation
    Inventors: Jiangqi He, Ping Sun, Hyunjun Kim, Xiang Yin Zeng