Abstract: Structures having backside high voltage capacitors for front side GaN-based devices are described. In an example, an integrated circuit structure includes a front side structure including a GaN-based device layer, and one or more metallization layers above the GaN-based device layer. A backside structure is below and coupled to the GaN-based layer, the backside structure including metal layers and one or more alternating laterally-recessed metal insulator metal capacitors.

Abstract: An optical sensor includes: a lower substrate; a plurality of lower electrodes on the lower substrate; an organic photoelectric conversion layer that is provided in common on the plurality of lower electrodes and includes a hole transport layer, an active layer, and an electron transport layer in this order from the lower substrate side; a conductive adhesive that is provided between each of the plurality of lower electrodes and the organic photoelectric conversion layer and electrically connects each of the plurality of lower electrodes to the organic photoelectric conversion layer; a light-transmitting upper electrode provided on the organic photoelectric conversion layer; and a light-transmitting upper substrate provided on the upper electrode.

Abstract: Some embodiments provide apparatuses capable of enabling the measurement of various characteristics of a showerhead-substrate gap in a processing chamber, including at high temperatures and at low-light conditions, using an imaging system external to the processing chamber.

Abstract: Provided are a semiconductor device and a method of forming the same. The semiconductor device includes a device layer having a frontside and a backside; a first interconnect structure disposed on the frontside of the device layer, and having a first seal ring structure; a second interconnect structure disposed on the backside of the device layer; and a diode and a transistor embedded in the device layer, wherein a gate of the transistor is electrically connected to the first seal ring structure by the diode.

Abstract: Electronic packages and methods of formation are described. In an embodiment, an electronic package includes one or more electronic components encapsulated in a step molded molding compound layer, and wiring layer spanning a lower step surface, sidewall, and top surface of the step molded molding compound layer. The wiring layer may further extend into a via opening extending through the lower step surface of the molding compound layer.

Abstract: A field effect transistor, comprising: a substrate and a superlattice of stacked conducting channels on the substrate; a source and a drain spaced-apart from each other on the superlattice; alternating castellations and trenches formed in the superlattice between the source and the drain, wherein the castellations have sidewalls that cut-down through the superlattice to form the trenches and edges of the stacked conducting channels that terminate at the sidewalls; a fringe field dielectric that fills lower volumes of the trenches up to a height on the sidewalls that is higher than first edges of first conducting channels among the stacked conducting channels, such that the fringe field dielectric is adjacent to the first edges; and a gate electrode overlaying the fringe field dielectric and the castellations such that the gate electrode is not adjacent to the first edges.

Abstract: A display device includes a substrate including a non-transmissive area and a transmissive area, where the non-transmissive area has a first emission area, and the transmissive area has a second emission area. The display device further includes a first light emitting element disposed in the non-transmissive area and including a first anode electrode, a second light emitting element disposed in the transmissive area and including a second anode electrode, a thin film transistor disposed in the non-transmissive area and configured to drive at least the second light emitting element, and a transparent electrode electrically connecting the thin film transistor to the second anode electrode of the second light emitting element. Further, the structures of the first anode electrode and the second anode electrode are different from each other.

Abstract: Disclosed are a display substrate and a method for manufacturing the same, and a display device, belonging to the technical field of display. The display substrate includes: a base substrate, an electroluminescent device layer on the base substrate, and a light-absorbing layer on a light-emitting side of the electroluminescent device layer, wherein the electroluminescent device layer is configured to emit initial light of a first color, wherein the initial light forms target light after passing through the light-absorbing layer, and a full width at half maximum of an emission spectrum of the initial light is greater than a full width at half maximum of an emission spectrum of the target light. According to the present disclosure, the display device is provided with a wider color gamut.

Abstract: The present invention relates to a process for producing a layer of a crystalline A/M/X material, which crystalline A/M/X material comprises a compound of formula [A]a[M]b[X]c, wherein: [M] comprises one or more first cations, which one or more first cations are metal or metalloid cations; [A] comprises one or more second cations; [X] comprises one or more halide anions; a is an integer from 1 to 6; b is an integer from 1 to 6; and c is an integer from 1 to 18, wherein the process comprises disposing on a substrate a precursor composition comprising: (a) a first precursor compound comprising a first cation (M), which first cation is a metal or metalloid cation; and (b) a solvent, and wherein the solvent comprises: (i) a non-polar organic solvent which is a hydrocarbon solvent, a chlorohydrocarbon solvent or an ether solvent; and (ii) a first organic amine comprising at least three carbon atoms. Also described are compositions useful in the process of the invention.

Abstract: A semiconductor device may include a gate structure including insulating layers and conductive layers alternately stacked, a channel layer passing through the gate structure, an insulating core disposed in the channel layer, and a capping layer including a capping pattern disposed in the channel layer and a capping liner disposed between the capping pattern and the insulating core and extending between the channel layer and the capping pattern, wherein the capping liner and the capping pattern may include impurities having different concentrations.

Abstract: A substrate liquid processing method includes preparing a substrate having a recess on a surface thereof, a seed layer being formed on a surface of the recess; bringing a first pretreatment liquid, containing a reducing agent, a pH adjuster, and an additive configured to accelerate or inhibit an electroless plating reaction, into contact with the seed layer; and precipitating, after the bringing of the first pretreatment liquid into contact with the seed layer, a plating metal in the recess by supplying a first electroless plating liquid to the recess.

Abstract: A press pack power semiconductor device can include a housing, a semiconductor, and a locator strip deformed into a ring-like shape to concentrically fit within the housing and concentrically locate at least part of the semiconductor therein. The locator strip can include a first plurality of regions regularly interspersed with a second plurality of regions along a length of the locator strip, and each of the first plurality of regions can have a first cross-sectional area that can be smaller than a second cross-sectional area of each of the second plurality of regions.

Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a lower electrode on a substrate, a metal oxide on the lower electrode, a buffer on the metal oxide, an oxide channel in the buffer, a gate insulating layer in the oxide channel, a gate electrode in the gate insulating layer, and an upper electrode on the gate electrode, and the buffer may include a silicide material.

Abstract: An image sensor comprises a plurality of image sensing pixels arranged to form a sensor array. Each image sensing pixel of the plurality of image sensing pixels comprises a semiconductor photodetector connected to a photosensitive region that comprises a photon reception area configured to receive photons to facilitate image capture. For at least a particular image sensing pixel of the plurality of image sensing pixels, the length or the width of the photon reception area is smaller than about 80% of a pixel pitch measurement between the particular image sensing pixel and an adjacent image sensing pixel, which contributes to reduced volume of the photosensitive region and mitigated sensor noise. A space between the photosensitive region of the particular image sensing pixel and the photosensitive region of the adjacent image sensing pixel comprises at least one oxide layer and/or at least one metal layer.

Abstract: Provided is an organic electroluminescent device. The organic electroluminescent device includes an anode, a cathode, and a hole transporting region disposed between the anode and the cathode; the hole transporting region includes a first organic layer; the first organic layer contains a first p-type dopant and a second p-type dopant; the first p-type dopant is different from the second p-type dopant. The electroluminescent device containing at least two different p-type dopants in the first organic layer in the hole transporting region can maintain a high external quantum efficiency and achieve the great reduction in voltages and the significant improvement in lifetimes, thereby improving the comprehensive performance of the device. Further provided is an electronic assembly containing the organic electroluminescent device.

Abstract: A die includes a plurality of pillar bumps configured to electrically connect the die to a substrate. The plurality of pillar bumps includes at least one first pillar bump having a first total pillar bump height. The at least one first pillar bump includes a first pillar having a first pillar height and a first solder cap having a first solder cap height. The plurality of pillar bumps includes at least one second pillar bump having a second pillar height substantially equal to the first total pillar bump height. The at least one second pillar bump includes a second pillar having a second pillar height and a second solder cap having a second solder cap height. The second pillar height is greater than the first pillar height, and the second solder cap height is less than the first solder cap height.

Abstract: A light-emitting device including a substrate; a first electrode disposed on the substrate; a second electrode facing the first electrode; an interlayer disposed between the first electrode and the second electrode, wherein the interlayer includes an emission layer; and an antioxidant, wherein the first electrode is a cathode, and the second electrode is an anode.

Abstract: A light-emitting device including a first electrode, a second electrode facing the first electrode, and an interlayer between the first electrode and the second electrode and including an emission layer is provided. The emission layer includes a sensitizer and an emitter and a spectral overlap integral of an emission spectrum of the sensitizer and an absorption spectrum of the emitter is at least 1×1013 M?1 cm4. A highest occupied molecular orbital (HOMO) energy level of the sensitizer is greater than a HOMO energy level of the emitter, and the spectral overlap integral is evaluated by Equation 1: J ? ( ? ) = ? 0 ? ? ? ( ? ) ? ? 4 ? F D ( ? ) ? d ? ? .

Abstract: The present disclosure provides a quantum dot light-emitting diode, a manufacturing method thereof, and a quantum dot film. The quantum dot light-emitting diode includes a first electrode, a second electrode, and a quantum dot light-emitting layer. The quantum dot light-emitting layer is disposed between the first electrode and the second electrode. The quantum dot light-emitting layer includes a first quantum dot and a second quantum dot, and an absolute value of a difference between a photoluminescence peak wavelength of the first quantum dot and a photoluminescence peak wavelength of the second quantum dot is less than or equal to 10 nm.

Abstract: Various embodiments of improved systems and methods are provided herein to monitor process chemicals used in a semiconductor process. More specifically, new semiconductor processing systems and methods that utilize infrared (IR) spectroscopy techniques are provided herein to monitor the composition and/or concentration of process chemicals utilized to process a substrate and/or the by-products produced during substrate processing. By monitoring the process chemicals and/or the by-products in real-time, the systems and methods described herein can be used to provide better process control and/or end-point detection for a wide variety of semiconductor processes.