Patents Examined by Anthony Ho
  • Patent number: 12713633
    Abstract: Provided is a semiconductor circuit capable of protecting a semiconductor device that operates at a low voltage from a harmful pulse. A semiconductor circuit included in the semiconductor device has a semiconductor element 1 including: a first n-type semiconductor layer; a metal layer; and a Schottky barrier between the first n-type semiconductor layer and the metal layer, wherein the semiconductor element 1 is in forward connection between a signal line of the semiconductor device and a ground.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: August 18, 2026
    Assignee: OTOWA ELECTRIC CO., LTD.
    Inventors: Takatoshi Tojo, Minoru Tsukazaki, Naoyuki Tsukamoto, Shizuo Fujita
  • Patent number: 12713719
    Abstract: An image sensor includes a substrate having a plurality of pixels. Each pixel includes a photoelectric conversion region and a floating diffusion region in the substrate, a pixel transistor including a pixel gate on the first surface of the substrate, a first transmission gate between the photoelectric conversion region and the floating diffusion region, extending into the substrate, and having a first width in a horizontal direction, and a second transmission gate between the photoelectric conversion region and the floating diffusion region, arranged between the pixel gate and the first transmission gate when viewed in a plan view, and having a second width less than the first width in the horizontal direction.
    Type: Grant
    Filed: November 17, 2023
    Date of Patent: August 18, 2026
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sungjun In, Sungchul Kim, Jaeho Kim
  • Patent number: 12708029
    Abstract: A semiconductor package includes a photonic integrated circuit (PIC) die having a photonic layer, and an electronic integrated circuit (EIC) die bonded to the PIC die. The EIC die includes an optical region that allows the transmission of optical signals through the optical region towards the photonic layer, and a peripheral region outside of the optical region. The optical region includes optical concave/convex structures, a protection film and optically transparent material layers. The optical concave/convex structures are formed in the semiconductor structure. The protection film is conformally disposed over the optical concave/convex structures. The optically transparent material layers are disposed over the protection film and filling up the optical region. The peripheral region includes first bonding pads bonded to the photonic integrated circuit die, and via structures connected to the first bonding pads, wherein the protection film is laterally surrounding sidewalls of the via structures.
    Type: Grant
    Filed: October 10, 2023
    Date of Patent: August 11, 2026
    Assignee: Taiwan Semicondutor Manufacturing Company, Ltd.
    Inventors: Chen Chen, Yu-Hung Lin, Chih-Hao Yu, Wei-Ming Wang, Chia-Hui Lin, Shih-Peng Tai
  • Patent number: 12701886
    Abstract: A display device includes a substrate including a first display area and a second display area, a passivation layer overlapping the first display area and the second display area, an insulating layer overlapping the second display area and on the passivation layer, a first light emitting element on the passivation layer and in the first emission area; and a second light emitting element on the passivation layer and in the second emission area. The insulating layer includes a first surface facing the passivation layer, a second surface opposite to the first surface, and an inclined surface connecting the first surface and the second surface, the first light emitting element includes a first pixel electrode on the passivation layer, and the second light emitting element includes a second pixel electrode including a first portion on the passivation layer and a second portion on the inclined surface of the insulating layer.
    Type: Grant
    Filed: November 27, 2023
    Date of Patent: August 4, 2026
    Assignee: Samsung Display Co., LTD.
    Inventors: Hyeon Bum Lee, Hyun Ho Kim, Hyoeng Ki Kim
  • Patent number: 12694190
    Abstract: A layout method is provided. A timing analysis is performed based on design data of a standard cell to classify a plurality of device units of the standard cell into a timing-critical group and a non-timing-critical group. A plurality of first sources regions in the device units of the non-timing-critical group are aligned with a plurality of second sources regions in the device units of the timing-critical group in a first direction in floorplan of the standard cell in a layout. The device units of the timing-critical group are arranged in a first row of a cell array and the device units of the non-timing-critical group are arranged in a second row of the cell array. The first and second rows of the cell array share a common power line. First active regions of the first row are wider than second active regions of the second row.
    Type: Grant
    Filed: January 3, 2024
    Date of Patent: July 28, 2026
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ching-Yu Huang, Wei-Cheng Lin, Jiann-Tyng Tzeng
  • Patent number: 12696506
    Abstract: A silicon carbide wafer includes a substrate made of silicon carbide and an epitaxial layer made of silicon carbide and disposed on the substrate. A concentration of carbon vacancies in the substrate and the epitaxial layer continuously decreases from the substrate toward the epitaxial layer. The concentration of the carbon vacancies in the substrate is 3.0×1015 cm?3 or more.
    Type: Grant
    Filed: September 21, 2023
    Date of Patent: July 28, 2026
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventor: Hideyuki Uehigashi
  • Patent number: 12696679
    Abstract: A fullerene derivative having a partial structure shown in the following General Formula (1) is provided. (in Formula (1), C*'s are adjacent carbon atoms that form a fullerene framework. Rf1 and Rf2 each independently represents a perfluoroalkyl group having 1 to 4 carbon atoms, and Rf1 and Rf2 may be linked to each other to form a ring structure).
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: July 28, 2026
    Assignee: MITSUBISHI CORPORATION
    Inventors: Takeshi Igarashi, Chieko Nakagawa
  • Patent number: 12687774
    Abstract: An overlay correction method for improving an overlay parameter of an ultra-high order component includes: obtaining misalignment components of an overlay through measurement; converting the misalignment components into overlay parameters; applying a conversion logic between the overlay parameters; converting the overlay parameters into aberration input data; and performing an exposure process by applying the aberration input data to an exposure machine, wherein the overlay parameters are divided into a first overlay parameter shifting in a first direction that is an extending direction of a slit, and a second overlay parameter shifting in a second direction that is perpendicular to the first direction, and the performing of the exposure process includes correcting the first and second overlay parameters including a higher-order component of a 3rd order or greater with respect to a location of the slit in the first direction.
    Type: Grant
    Filed: December 7, 2023
    Date of Patent: July 21, 2026
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jonghyun Hwang, Jaeil Lee, Kyoungcho Na
  • Patent number: 12690268
    Abstract: Display panels and array substrates are provided. The array substrate includes a first base, a first metal layer disposed on the first base and including scanning lines, a second metal layer disposed on the first metal layer and including data lines, a third metal layer disposed on the second metal layer and including pixel electrodes, and a fourth metal layer disposed between the third metal layer and the second metal layer. The fourth metal layer includes a transparent shielding electrode in which at least one repair hole is formed. An orthographic projection of the repair hole on the first base overlaps a part of an orthographic projection of at least one of the data lines and the scanning lines on the first base.
    Type: Grant
    Filed: September 27, 2023
    Date of Patent: July 21, 2026
    Assignee: TCL China Star Optoelectronics Technology Co., Ltd.
    Inventors: He Wang, Dongming Su, Jiaming Peng, Guanshui Luo, Jiaojiao Shi, Ziran Li
  • Patent number: 12690188
    Abstract: An integrated circuit device includes a substrate having an active region, a word line extending in the substrate in a first horizontal direction, a bit line extending on the word line in a second horizontal direction, a bit line contact electrically connecting the bit line to the active region, a doping contact connecting the bit line contact to the active region, a cell pad having a horizontal width greater than that of the active region, a buried contact that digs into one side wall of the cell pad, and a conductive landing pad facing the bit line in the first horizontal direction. The doping contact includes a first doping contact and a second doping contact, and a thickness of the first doping contact in the vertical direction is less than that of the second doping contact in the vertical direction.
    Type: Grant
    Filed: October 19, 2023
    Date of Patent: July 21, 2026
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wonhee Choi, Daejin Nam, Sunguk Jang
  • Patent number: 12685198
    Abstract: A semiconductor chiplet device includes a first die, a second die, a decoupling circuit and an interposer. The interposer includes a plurality of power traces and a plurality of ground traces. The first die and the second die are arranged on a first side of the interposer according to a configuration direction, and are coupled to the power traces and the ground traces. The decoupling circuit is arranged on a second side of the interposer, and is coupled to the power traces and the ground traces. The power traces and the ground traces are staggered with each other, and an extending direction of the ground traces and the power traces is the same as the configuration direction.
    Type: Grant
    Filed: March 20, 2024
    Date of Patent: July 14, 2026
    Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Liang-Kai Chen, Chih-Chiang Hung, Wen-Yi Jian, Yuan-Hung Lin, Sheng-Fan Yang
  • Patent number: 12685005
    Abstract: A flexible substrate, a method of manufacturing thereof, and display panel are provided. The flexible substrate includes a glass substrate, a first flexible base layer disposed on the glass substrate, a second flexible base layer disposed on the first flexible base layer, and a third flexible base layer disposed on the second flexible base layer.
    Type: Grant
    Filed: December 28, 2023
    Date of Patent: July 14, 2026
    Assignee: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Hongquan Wei
  • Patent number: 12681215
    Abstract: A layered semiconductor device comprising a compound, the compound comprising a silicon-oxygen backbone and at least one fluorine-containing moiety attached to the silicon-oxygen backbone. The compound may comprise a unit represented by: formula (I) wherein R and R? each independently represents at least one of: substituted or unsubstituted alkyl, substituted or unsubstituted fluoroalkyl, substituted or unsubstituted alkoxy, substituted or unsubstituted fluoroalkoxy, substituted or unsubstituted siloxy, or substituted or unsubstituted fluoroalkylsiloxy, substituted or unsubstituted cycloalkyl, substituted or unsubstituted fluorocycloalkyl, substituted or unsubstituted aryl, substituted or unsubstituted fluoroaryl, or substituted or unsubstituted heteroaryl; and wherein at least one of R and R? is the fluorine-containing moiety.
    Type: Grant
    Filed: May 2, 2023
    Date of Patent: July 14, 2026
    Assignee: OTI Lumionics Inc.
    Inventors: Michael Helander, Scott Nicholas Genin
  • Patent number: 12672416
    Abstract: A display device includes a first electrode and a second electrode, spaced apart from each other, and light emitting elements disposed between the first electrode and the second electrode. Each of the light emitting elements includes a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer, and an active layer disposed between the first semiconductor layer and the second semiconductor layer. A thickness of the active layer is in a range of about 1 nm to about 2.8 nm, the active layer includes InGa1-xN (about 0.18?x?about 0.20). The light emitting elements emit light with a wavelength in a range of about 462 nm to about 472 nm in a current density in a range of about 0.5 A/cm2 to about 100 A/cm2.
    Type: Grant
    Filed: December 12, 2023
    Date of Patent: June 30, 2026
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seung A Lee, Bong Chun Park, Kwan Jae Lee, Dong Eon Lee, So Young Lee
  • Patent number: 12666785
    Abstract: A light-emitting element includes a first electrode, a second electrode, a first light-emitting layer and a second light-emitting layer provided between the first electrode and the second electrode and including the same quantum dots, and an intermediate layer provided between the first light-emitting layer and the second light-emitting layer.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: June 23, 2026
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Shinichi Handa
  • Patent number: 12666801
    Abstract: The present invention relates to a color conversion device (100).
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: June 23, 2026
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tadashi Kishimoto, Atsuko Noya, Julian Burschka, Teruaki Suzuki, Daishi Yokoyama, Seishi Shibayama
  • Patent number: 12666795
    Abstract: A transparent OLED substrate, a transparent display panel, an array substrate, a display screen, and a display device. The transparent OLED substrate includes a base substrate, a driving circuit layer formed on the base substrate; and a light emitting functional film layer formed on the driving circuit layer. The driving circuit layer includes a plurality of first driving circuit units, the plurality of first driving circuit units each include a storage capacitor and a first transistor, the storage capacitor includes a first electrode plate and a second electrode plate. The driving circuit layer further includes a first conductive layer, a part of the first conductive layer is performed as the first electrode plate and other part is performed as a gate electrode of the first transistor.
    Type: Grant
    Filed: January 8, 2024
    Date of Patent: June 23, 2026
    Assignees: Yungu (Gu'an) Technology Co., Ltd., KunShan Go-Visionox Opto-Electronics Co., Ltd.
    Inventors: ChaoChi Peng, Mingxing Liu, Shuaiyan Gan
  • Patent number: 12660613
    Abstract: A semiconductor device includes a first metal layer including a plurality of first ground wire pairs alternating with a plurality of first power wire pairs and a second metal layer including a plurality of second ground wire pairs alternating with a plurality of second power wire pairs. A metal-insulator-metal capacitor (MIMCAP) is between the first metal layer and the second metal layer. A group of ground vias connects a pair of the first ground wire pairs with a pair of the second ground wire pairs. The group of ground vias can also connect to a ground plate of the MIMCAP. A group of power vias connects a pair of the first power wire pairs with a pair of the second power wire pairs. The group of power vias can also connect to a power plate of the MIMCAP. Various other methods and systems are also disclosed.
    Type: Grant
    Filed: December 6, 2023
    Date of Patent: June 16, 2026
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Douglas Stirrett, Thomas Michael Daum, Jeffrey Lucas
  • Patent number: 12652900
    Abstract: A method for manufacturing an EL element, includes: a first quantum dot layer forming step of forming a quantum dot layer containing first quantum dots; a first quantum dot layer coating step of exposing a first portion included in the first quantum dot layer, and coating a second portion included in the first quantum dot layer, the first quantum dot layer coating step including: a photoresist layer forming step; and a photoresist layer patterning step; a solution supplying step of applying or spraying a solution only to or on the first portion, the solution containing first molecules each having a plurality of coordinating functional groups coordinatable with the first quantum dots and; a removing step of removing the second portion of the first quantum dot layer and the patterned photoresist layer, such that the first portion of the first quantum dot layer forms a first light-emitting layer.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: June 9, 2026
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yukio Takenaka, Yuma Yaguchi
  • Patent number: 12648333
    Abstract: The present application provides a display panel and a display device. The display panel includes pixel driving circuits provided respectively corresponding to pixel regions and a photosensitive device provided corresponding to a photosensitive region between the pixel regions, wherein the display panel further includes: a substrate; a first metal layer provided on a side of the substrate, a first semiconductor layer disposed on a side of the first metal layer away from the substrate, a second semiconductor layer disposed on a side of the first semiconductor layer away from the substrate, and a third semiconductor layer disposed on a side of the second semiconductor layer away from the substrate. The first metal layer includes a shield portion provided corresponding to the pixel region and a reflection portion provided corresponding to the photosensitive region.
    Type: Grant
    Filed: September 27, 2023
    Date of Patent: June 2, 2026
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Shengrong Yu, Yuan Yan