Patents Examined by Anthony Ho
  • Patent number: 11690242
    Abstract: Provided are a light emitting device includes a first electrode and a second electrode facing each other; an emissive layer disposed between the first electrode and the second electrode and a display device including the same. The emissive layer comprises: a first emission layer disposed on the first electrode and having a hole transporting property; a second emission layer and a third emission layer disposed on the first emission layer; wherein the second emission layer comprises an organic compound having a bipolar transport property and the third emission layer has a composition different from the first emission layer and the second emission layer; wherein the first emission layer, the second emission layer, and the third emission layer comprises a plurality of quantum dots, and wherein the first emission layer, the second emission layer, and the third emission layer are configured to emit light of a same color.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: June 27, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Moon Gyu Han, Kwanghee Kim, Heejae Lee, Eun Joo Jang, Dae Young Chung
  • Patent number: 11690240
    Abstract: An electroluminescent device, a manufacturing method thereof, and a display apparatus are provided. The electroluminescent device includes an anode layer, a light emitting layer, a cathode layer, a hole transport layer located between the anode layer and the light emitting layer, and a electron transport layer located between the cathode layer and the light emitting layer. The electroluminescent device further includes: a first interface modification layer between the light emitting layer and one of the hole transport layer and the electron transport layer; wherein an energy level of the first interface modification layer matches an energy level of the light emitting layer and an energy level of the one of the hole transport layer and the electron transport layer.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: June 27, 2023
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Xin Zhang
  • Patent number: 11690236
    Abstract: The present invention relates to a process for the preparation of a top-gate, bottom-contact organic field effect transistor on a substrate, which organic field effect transistor comprises source and drain electrodes, a semiconducting layer, a cured first dielectric layer and a gate electrode, and which process comprises the steps of: i) applying a composition comprising an organic semiconducting material to form the semiconducting layer, ii) applying a composition comprising a first dielectric material and a crosslinking agent carrying at least two azide groups to form a first dielectric layer, iii) curing portions of the first dielectric layer by light treatment, iv) removing the uncured portions of the first dielectric layer, and v) removing the portions of the semiconducting layer that are not covered by the cured first dielectric layer, wherein the first dielectric material comprises a star-shaped polymer consisting of at least one polymer block A and at least two polymer blocks B, wherein each polymer b
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: June 27, 2023
    Assignee: CLAP CO., LTD.
    Inventors: Wei Hsiang Lin, Mi Zhou, JunMin Lee, Giseok Lee, Stefan Becker
  • Patent number: 11690277
    Abstract: A method of p-type doping a carbon nanotube includes the following steps: providing a single carbon nanotube; providing a layered structure, wherein the layered structure is a tungsten diselenide film or a black phosphorus film; and p-type doping at least one portion of the carbon nanotube by covering the carbon nanotube with the layered structure.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: June 27, 2023
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Gao-Tian Lu, Yang Wei, Shou-Shan Fan, Yue-Gang Zhang
  • Patent number: 11688720
    Abstract: According to one embodiment, a semiconductor device includes a substrate, a logic circuit provided on the substrate, and a memory cell array provided over the logic circuit that includes a plurality of electrode layers stacked on top of one another and a semiconductor layer provided over the plurality of electrode layers. The semiconductor device further includes a first plug and a second plug provided above the logic circuit and electrically connected to the logic circuit, a bonding pad provided on the first plug, and a metallic wiring layer provided on the memory cell array, electrically connected to the semiconductor layer, and electrically connected to the second plug.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: June 27, 2023
    Assignee: KIOXIA CORPORATION
    Inventor: Yasuhiro Uchiyama
  • Patent number: 11680476
    Abstract: Disclosed herein are devices, systems and methods useful for downhole sensors and electronics suitable for harsh thermal and mechanical environment associated with high-temperature geothermal drilling and high-temperature/high-pressure oil and gas drilling.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: June 20, 2023
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: David Samuel Ginley, Philip Anthony Parilla, Daniel Joseph Friedman
  • Patent number: 11682636
    Abstract: A method includes encapsulating a package component in an encapsulating material, with the encapsulating material including a portion directly over the package component. The portion of the encapsulating material is patterned to form an opening revealing a conductive feature in the package component. A redistribution line extends into the opening to contact the conductive feature. An electrical connector is formed over and electrically coupling to the conductive feature.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: June 20, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Han Wang, Yu-Hsiang Hu, Hung-Jui Kuo, Chen-Hua Yu
  • Patent number: 11683947
    Abstract: An organic light emitting display device may include a substrate, a first pixel electrode on the substrate, a pixel defining layer on the substrate, the pixel defining layer having an opening exposing a portion of the first pixel electrode, a second pixel electrode on the portion of the first pixel electrode exposed by the opening, a hole injection layer on the second pixel electrode, the hole injection layer including a metal oxide, an organic light emitting layer on the hole injection layer; and a common electrode on the organic light emitting layer.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: June 20, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sungjoo Kwon, Hyuneok Shin, Juhyun Lee
  • Patent number: 11678523
    Abstract: A display device includes a base layer on which a display area and a non-display area are defined, a circuit layer including a first power electrode and driving circuits, which are disposed in the non-display area, a first planarization layer in which a first opening through which the first power electrode is exposed is defined and which covers the driving circuits, a second power electrode disposed on the first planarization layer to contact the first power electrode that is exposed through the first opening and overlapping at least a portion of the driving circuits, and a second planarization layer disposed on the first planarization layer to cover a portion of the second power electrode and having a groove part in an area overlapping the first planarization layer and the second power electrode in a plan view.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: June 13, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Zail Lhee, Keunsoo Lee
  • Patent number: 11678485
    Abstract: A vertical memory device, including: a substrate including a cell array region and an extension region; gate electrodes stacked on each other with a plurality of levels, wherein each of the gate electrodes includes a pad, and wherein the pads disposed on the gate electrodes form at least one staircase structure on the extension region of the substrate; a channel extending in a first direction on the cell array region of the substrate through at least one of the gate electrodes; and dummy gate electrode groups disposed on the extension region of the substrate, wherein the dummy gate electrode groups includes dummy gate electrodes, wherein each of the dummy gate electrodes are spaced apart from a corresponding gate electrode among the gate electrodes stacked at a same level, wherein the dummy gate electrode groups are spaced apart from each other in a second direction.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: June 13, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Seok-Cheon Baek
  • Patent number: 11666046
    Abstract: Apparatus and associated methods relate to a pest repelling magnetic field generating device (PRD) having a temperature sensor to detect the temperature of a solenoid coil during operation. The detected temperature to be used to ensure that the PRD operates within an ideal temperature range. Additionally, a fan is oriented within a housing of the PRD to force the flow of air from inside a housing of the PRD to outside a housing the PRD. In an illustrative example, the PRD may shut off if the temperature of the solenoid coil moves outside the ideal temperature range. By operating the PRD within an ideal temperature range, the service life of the PRD may be extended. Further, the fan may mitigate dust collection within the housing of the pest repelling magnetic field generating device.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: June 6, 2023
    Assignee: Scopat Properties, LLC
    Inventor: Raymond Connell
  • Patent number: 11672168
    Abstract: A light emitting element includes: a member including a semiconductor layer and an active layer; and at least one ligand bonded to a surface of the member; wherein the at least one ligand includes: a first ligand including two or more functional group chains; and a second ligand having a shorter carbon length than the first ligand.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: June 6, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: YunKu Jung, YunHyuk Ko, HyoJin Ko, DukKi Kim, JunBo Sim, JaeKook Ha
  • Patent number: 11672148
    Abstract: A first organic resin layer is formed over a first substrate; a first insulating film is formed over the first organic resin layer; a first element layer is formed over the first insulating film; a second organic resin layer is formed over a second substrate; a second insulating film is formed over the second organic resin layer; a second element layer is formed over the second insulating film; the first substrate and the second substrate are bonded; a first separation step in which adhesion between the first organic resin layer and the first substrate is reduced; the first organic resin layer and a first flexible substrate are bonded with a first bonding layer; a second separation step in which adhesion between the second organic resin layer and the second substrate is reduced; and the second organic resin layer and a second flexible substrate are bonded with a second bonding layer.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: June 6, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masakatsu Ohno, Hiroki Adachi, Satoru Idojiri, Koichi Takeshima
  • Patent number: 11670717
    Abstract: A semiconductor device includes a fin feature in a substrate, a stack of semiconductor layers over the fin feature. Each of the semiconductor layers does not contact each other. The device also includes a semiconductor oxide layer interposed between the fin feature and the stack of the semiconductor layers. A surface of the semiconductor oxide layer contacts the fin feature and an opposite surface of the semiconductor oxide layer contacts a bottom layer of the stack of semiconductor layers. The device also includes a conductive material layer encircling each of the semiconductor layers and filling in spaces between each of two semiconductor layers.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: June 6, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Lien Huang, Tung Ying Lee, Chun-Hsiang Fan
  • Patent number: 11664438
    Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a sacrificial layer over the semiconductor substrate, etching the sacrificial layer to form a sacrificial pattern, etching the semiconductor substrate using the sacrificial pattern as an etching mask to form an active region of the semiconductor substrate, trimming the sacrificial pattern, and replacing the trimmed sacrificial pattern with a gate electrode.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: May 30, 2023
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Shu-Ming Lee, Yung-Han Chiu, Chia-Hung Liu, Tzu-Ming Ou Yang
  • Patent number: 11664171
    Abstract: The present application discloses stilbene derivative compounds and phenyl-benzofuran compositions, useful in the manufacture of dye-sensitized solar cells and other similar technology.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: May 30, 2023
    Assignee: AMBIENT PHOTONICS, INC.
    Inventor: John C. Warner
  • Patent number: 11665946
    Abstract: A display panel, a display device, and a method for manufacturing the display panel are provided. The display panel includes two electrode layers and a luminous functional layer stacked between the two electrode layers. Each electrode layer has a first surface and a second surface opposite to each other in a thickness direction thereof. The first surface of each electrode layer is attached to and in contact with the luminous functional layer. Each electrode layer includes at least one insulation section and at least one electrode section integrated as a single body. A material of the electrode section is a conductively modified form of a material of the insulation section. The electrode section is in contact with the luminous functional layer and is in a conductive state at least at the first surface. The electrode layer in the present disclosure has no conductive pattern and will not cause optical disturbance.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: May 30, 2023
    Assignee: YUNGU (GU'AN) TECHNOLOGY CO., LTD.
    Inventors: Li Lin, Shixing Cai, Junhui Lou
  • Patent number: 11664305
    Abstract: An interconnect structure is disclosed. The interconnect structure includes a first line of interconnects and a second line of interconnects. The first line of interconnects and the second line of interconnects are staggered. The individual interconnects of the second line of interconnects are laterally offset from individual interconnects of the first line of interconnects. A dielectric material is adjacent to at least a portion of the individual interconnects of at least one of the first line of interconnects and the second line of interconnects.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: May 30, 2023
    Assignee: Intel Corporation
    Inventors: Kevin Lai Lin, Manish Chandhok, Miriam Reshotko, Christopher Jezewski, Eungnak Han, Gurpreet Singh, Sarah Atanasov, Ian A. Young
  • Patent number: 11654590
    Abstract: An example system includes a cutting tool and a device configured to remotely control the cutting tool. In response to receiving information indicative of actuation of a first user interface item, the device sends a first signal to the cutting tool so as to request enabling the cutting tool to be operated remotely. The cutting tool sends a second signal to the device indicating that remote operation of the cutting tool has been enabled. The cutting tool receives information indicating that the trigger has been activated, and sends a third signal to the device indicating that the cutting tool is ready to perform a cutting operation. The device receives information indicative of actuation of a second user interface item, and responsively, sends a fourth signal to the cutting tool so as to cause the cutting tool to perform the cutting operation.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: May 23, 2023
    Assignee: Milwaukee Electric Tool Corporation
    Inventors: Luke J. Skinner, Burtrom L. Stampfl, Timothy J. Bartlett, Carter H. Ypma, Timothy R. Obermann, Benjamin O. Cabot, Kris J. Kanack, Thomas C. Hanks, Ian C. Zimmermann
  • Patent number: 11659731
    Abstract: An integrated light-emitting device and a fabricating method thereof. The integrated light-emitting device includes a first electrode, an insulating layer, a second electrode, a light-emitting layer, and a third electrode which are sequentially laminated; the first electrode, the insulating layer, the second electrode, and the third electrode together constitute a field effect transistor unit, and the first electrode, the second electrode and the third electrode are respectively a gate, a source and a drain of the field effect transistor unit, and a surface of the insulating layer adjacent to the second electrode is provided with a nano-pit array structure configured for condensing light; and the second electrode, the light-emitting layer and the third electrode together constitute a light-emitting unit, the light-emitting unit configured to emit light toward the first electrode along the second electrode.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: May 23, 2023
    Assignee: TCL TECHNOLOGY GROUP CORPORATION
    Inventors: Hui Lei, Weiran Cao, Lei Qian