Patents Examined by Baboucarr Faal
  • Patent number: 12045169
    Abstract: Techniques for identifying a hardware configuration for operation are disclosed. The techniques include applying feature measurements to a trained model; obtaining output values from the trained model, the output values corresponding to different hardware configurations; and operating according to the output values, wherein the output values include one of a certainty score, a ranking, or a regression value.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: July 23, 2024
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Furkan Eris, Paul S. Keltcher, John Kalamatianos, Mayank Chhablani, Alok Garg
  • Patent number: 12039371
    Abstract: A memory allocation method for a neural network includes determining information about N memory blocks, sorting the N memory blocks in descending order based on sizes of the N memory blocks, allocating a first memory block to the neural network, to perform an operation for a first node set in the neural network, determining whether a memory block in an allocated set is reusable for an nth memory block, where the allocated set includes a memory block that has been allocated to the neural network, if the memory block in the allocated set is reusable for the nth memory block, allocating, to the neural network, the memory block to perform an operation for an nth node set in the neural network, then updating the allocated set, and sequentially performing the foregoing determining from n=2 to n=N based on the sort sequence.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: July 16, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Lihua Huang, Hao Ding, Aoxiang Fan
  • Patent number: 12026391
    Abstract: A copy control device for controlling a data copy between a plurality of cloud systems each including one or a plurality of storage devices collects predetermined information for determining data duplication between storage devices, accepts a copy process request for a data copy from a storage device in a copy source cloud system to a copy destination storage device in a different cloud system, determines duplication between copy target data designated in the copy process request and data in the different cloud system on the basis of the collected predetermined information, instructs the different cloud system to copy duplicate data from the storage device having the duplicate data to the copy destination storage device, and instructs the copy source cloud system to copy remaining data of the copy target data to the copy destination storage device.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: July 2, 2024
    Assignee: Hitachi, Ltd.
    Inventors: Kazuei Hironaka, Kenta Sato
  • Patent number: 12013786
    Abstract: In some embodiments, a multi-port queueing cache includes a plurality of first ports, a plurality of second ports, a plurality of request handlers respectively coupled to the plurality of first ports, a cache storage unit coupled to the plurality of second ports, a reserve interface configured to exchange at least one address and at least one reserved cache line number, and a request interface configured to exchange the at least one reserved cache line number and at least one data. The reserve interface and the request interface are disposed between the plurality of request handlers and the cache storage unit. The cache storage unit includes a plurality of cache lines configured to store the plurality of data. The cache storage unit is configured to output a portion of the plurality of addresses, and receive a portion of the plurality of data corresponding to the portion of the plurality of addresses.
    Type: Grant
    Filed: December 1, 2022
    Date of Patent: June 18, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Heonsoo Lee, Byungchul Hong, Junseok Park, Jaehun Chung
  • Patent number: 11994984
    Abstract: A computer storage device having a host interface, a controller, non-volatile storage media, and firmware. The firmware instructs the controller to: store a namespace map to map blocks of logical addresses defined in a namespace to first blocks of logical addresses defined in a capacity of the non-volatile storage media; without changing a size of the namespace, adjust the namespace map to map the blocks of the logical addresses defined in the namespace to second blocks of the logical addresses defined in the capacity of the non-volatile storage media (e.g., to consolidate blocks for performance improvement); and translate the logical addresses in the namespace to physical addresses for the non-volatile storage media using the namespace map.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: May 28, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Alex Frolikov
  • Patent number: 11977483
    Abstract: Provided are a computer program product, integrated cache manager, and method for maintaining data in a first level memory and buckets representing regions of memory devices to extend data cache. A plurality of buckets represent distinct regions of memory devices. The buckets are associated with different threshold access count ranges. Data having an access count is stored in one of the buckets associated with a threshold access count range including the access count of the data to store. Data evicted from a first level memory is copied to an initial bucket comprising one of the buckets. Data is moved from a source bucket comprising one of the buckets, including the initial bucket, to a target bucket of the buckets having a target threshold access count range including an access count of the data to move.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: May 7, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Subashini Balachandran, Frank Schmuck, Owen T. Anderson, Wayne A. Sawdon
  • Patent number: 11977496
    Abstract: A system, method and processor that mitigates security vulnerabilities using context-dependent address space hiding. In some embodiments, a hardware mechanism allows a more-privileged software component managing multiple less-privileged software components to blind itself against “out-of-context” less-privileged software components. The hardware mechanism can allow the more-privileged software component to dynamically hide a portion of the more-privileged address space related to the “out-of-context” less-privileged software components, based on knowledge of the “in-context” less-privileged software component. A context register is set with a value from which an address range, within the address space of the more-privileged software component, can be determined, where the address range is associated with a first less-privileged software component can be determined.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: May 7, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Nathan Yong Seng Chong, Karimallah Ahmed Mohammed Raslan
  • Patent number: 11966628
    Abstract: A memory device, includes a memory array for storing a plurality of vector data each of which has an MSB vector and a LSB vector. The memory array includes a plurality of memory units each of which has a first bit and a second bit. The first bit is used to store the MSB vector of each vector data, the second bit is used to store the LSB vector of each vector data. A bit line corresponding to each vector data executes one time of bit-line-setup, and reads the MSB vector and the LSB vector of each vector data according to the bit line. The threshold voltage distribution of each memory unit is divided into N states, where N is a positive integer and N is less than 2 to the power of 2, and the effective bit number stored by each memory unit is less than 2.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: April 23, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Wei-Chen Wang, Han-Wen Hu, Yung-Chun Li, Huai-Mu Wang, Chien-Chung Ho, Yuan-Hao Chang, Tei-Wei Kuo
  • Patent number: 11954034
    Abstract: A system, method, and storage medium are provided. The system includes a real-time domain including a real-time cache and a non-real-time domain including a non-real-time cache. The system is configured to implement a cache coherency protocol by indicating that a cache line may be shared between the real-time cache and the non-real-time cache.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: April 9, 2024
    Assignee: WOVEN BY TOYOTA, INC.
    Inventor: Jean-Francois Bastien
  • Patent number: 11947453
    Abstract: An example memory sub-system includes: a plurality of bank groups, wherein each bank group comprises a plurality of memory banks; a plurality of row buffers, wherein two or more row buffers of the plurality of row buffers are associated with each memory bank; a cache comprising a plurality of cache lines; a processing logic communicatively coupled to the plurality of bank groups and the plurality of row buffers, the processing logic to perform operations comprising: receiving an activate command specifying a row of a memory bank of the plurality of memory banks; fetching data from the specified row to a row buffer of the plurality of row buffers; and copying the data to a cache line of the plurality of cache lines.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: April 2, 2024
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Sean S. Eilert, Ameen D. Akel, Shivam Swami
  • Patent number: 11941300
    Abstract: Methods, systems, and devices for integrating a pivot table in a logical-to-physical mapping of a memory system are described. The memory system may receive a read command and read a first entry of a first subset of mapping and a second entry of a second subset of mapping. The second entry may include at least a portion of a pivot table associated with physical addresses of a non-volatile memory device. The memory system may retrieve data from a physical address identified in the pivot table, rather than access a different portion of the logical-to-physical mapping. The memory system may transmit, to a host system, the data retrieved from the physical address identified in the pivot table.
    Type: Grant
    Filed: October 21, 2022
    Date of Patent: March 26, 2024
    Inventors: Giuseppe D'Eliseo, Luca Porzio, Stephen Hanna
  • Patent number: 11941274
    Abstract: Various illustrative aspects are directed to a data storage device, comprising: one or more disks; a write mechanism configured to write data to disk surfaces of the one or more disks; and one or more processing devices, which are configured to: encode, based on a distributed sector encoding scheme, data into a plurality of logic blocks of data, wherein the logic blocks of data comprise the data to be written being interleaved across a plurality of sectors; assign at least some of the logic blocks to a plurality of containers of two or more container sizes, the container sizes comprising a relatively larger container size and a relatively smaller container size; and output a write signal to the write mechanism to write the logic blocks in accordance with the assigning of the at least some of the logic blocks to the plurality of containers.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: March 26, 2024
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: Scott Burton
  • Patent number: 11914869
    Abstract: Systems and methods for cognitive encryption of data are disclosed. The methods may include maintaining a plurality of data storage systems in communication with an external metadata management system, operating the metadata management system to store metadata corresponding to data residing on the plurality of data storage systems, identifying a candidate data set residing on at least one of the plurality of data storage systems on which at least one security action should be performed using information included in the metadata management system, and in response to identifying the candidate data set, identifying the at least one security action.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: February 27, 2024
    Assignee: International Business Machines Corporation
    Inventors: Joseph Dain, Nilesh P. Bhosale, Abhishek Jain, Gregory Kishi
  • Patent number: 11899941
    Abstract: A storage device is provided. A storage device includes a non-volatile memory including a plurality of memory segments, and a storage controller connected to the non-volatile memory through a plurality of channels, each of the plurality of channels connected to a respective one of the plurality of memory segments such that each of the plurality of channels has a respective associated memory segment, wherein the storage controller is configured to generate parity according to speed information received from a host with respect to data to be written to the non-volatile memory and store the parity in at least one of the memory segments.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: February 13, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Soo-Young Ji
  • Patent number: 11886720
    Abstract: Methods, apparatus, and processor-readable storage media for determining storage system configuration recommendations based on vertical sectors and size parameters using machine learning techniques are provided herein.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: January 30, 2024
    Assignee: EMC IP Holding Company LLC
    Inventors: Shou-Huey Jiang, Bina K. Thakkar, Deepak Gowda
  • Patent number: 11886705
    Abstract: A system and method for using free space for recovering erasure coding data sets. The method includes segmenting at least one erasure coding data set into at least one stripe based on an erasure coding scheme, wherein each erasure coding data set includes chunks, wherein the chunks include chunks of systematic data and chunks of parity data; distributing the at least one stripe across non-volatile memory nodes based on the erasure coding scheme, wherein each non-volatile memory node is a unit of a non-volatile storage device; and upon a first failure of one of the non-volatile memory nodes: detecting that at least one of the non-volatile memory nodes that is not failed includes a first free space that does not currently store user data; and performing a first recovery process for recovering a first portion of the at least one erasure coding data set, based on the first free space.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: January 30, 2024
    Assignee: VAST DATA LTD.
    Inventor: Yogev Vaknin
  • Patent number: 11874765
    Abstract: A processor may allocate a first buffer segment from a buffer pool. The first buffer segment may be configured with a first contiguous range of memory for a first data partition of a data table. The first data partition comprising a first plurality of data blocks. A processor may store the first plurality of data blocks in order into the first buffer segment. A processor may retrieve the target data block from the first buffer segment in response to a data access request for a target data block of the first plurality of data blocks.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: January 16, 2024
    Assignee: International Business Machines Corporation
    Inventors: Shuo Li, Xiaobo Wang, Sheng Yan Sun, Hong Mei Zhang
  • Patent number: 11868613
    Abstract: A method includes defining a plurality of data storage policies, each of the plurality of data storage policies providing rules for storing data among a plurality of data storage locations, each of the plurality of data storage locations having a data storage cost and a data retrieval cost associated therewith; determining a baseline policy distribution among the plurality of data storage policies for an entity; receiving new data items corresponding to the entity; storing the new data items in the plurality of data storage locations using the plurality of data storage policies based on the baseline policy distribution; and determining, using the artificial intelligence engine, a selected one of the plurality of data storage policies to use in storing the new data items corresponding to the entity based on the data storage cost for each of the plurality of data storage locations, and the data retrieval cost for each of the plurality of storage locations.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: January 9, 2024
    Assignee: CHANGE HEALTHCARE HOLDINGS LLC
    Inventors: Philippe Raffy, Jean-Francois Pambrun, David Dubois, Ashish Kumar
  • Patent number: 11868612
    Abstract: A method is used in managing storage operations in storage systems. Based on a set of criteria, an amount of storage resources required to perform a storage operation is determined. The storage operation is directed to fault tolerant storage devices. The amount of storage resources is allocated prior to start performing the storage operation. The storage operation is performed by using the allocated storage resources.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: January 9, 2024
    Assignee: EMC IP Holding Company LLC
    Inventors: Robert P. Foley, Peter Puhov
  • Patent number: 11861173
    Abstract: A hard disk drive having a single drive arm with multiple read-write heads for synchronous access to data, wherein the multiple read-write heads are used for synchronous access to shorten the access time of the hard disk drive and the data.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: January 2, 2024
    Assignee: Felicity Taiwan Corporation
    Inventors: Wen-Lang Yu, Chia-Chien Yu