Abstract: A computer product, method, and system to generate a virtual subsystem to process read and write requests to storage devices. A virtual controller is configured in a memory device to provide a representation of a controller in a computer system. At least one virtual storage is configured in the memory device. A virtual storage is assigned a quantity of physical storage configured in a plurality of storage devices, wherein the virtual storage maps to addresses in the quantity of physical storage. At least one virtual storage is assigned to a virtual controller. A host is assigned to the virtual storage assigned to the virtual controller. The host assigned the virtual storage is allowed to direct read and write requests to the quantity of physical storage assigned to the virtual storage.

Abstract: A method for dynamically adjusting cache memory partition sizes within a storage system includes computing a read hit ratio for data accessed in each cache partition and an average read hit ratio for all the cache partitions over a time interval. The cache memory includes a higher performance portion (DRAM) and lower performance portion (SCM). The method increases or decreases the partition size for each cache partition by comparing the read hit ratio for the partition to the average read hit ratio for all the partitions. Each cache partition includes maximum and minimum partition sizes, and read hit and read access counters. The SCM portion of the cache memory includes cache partitions reserved for storing data of a specific type, or data used for a specific purpose or with a specific software application. A corresponding storage controller and computer program product are also disclosed.

Abstract: A secure processing system includes a memory having a secure partition and a non-secure partition, a neural network processing unit (NPU) configured to initiate transactions with the memory, and a memory protection unit (MPU) configured to filter the transactions. Each of the transactions includes at least an address of the memory to be accessed, one of a plurality of first master identifiers (IDs) associated with the NPU, and security information indicating whether the NPU is in a secure state or a non-secure state when the transaction is initiated. The MPU is to selectively deny access to the secure partition of the memory based at least in part on the memory address, the first master ID, and the security information associated with each of the transactions.

Abstract: A computer-implemented method, according to one embodiment, includes: sending existing data to a secondary storage volume in a secondary system from a primary storage volume in a primary system. Moreover, in response to receiving a write request at the primary system: a determination is made as to whether existing data corresponding to the write request has already been copied to the secondary storage volume. The write request is performed at the primary system in response to determining that all the existing data corresponding to the write request has already been copied to the secondary storage volume. However, at least a portion of the existing data corresponding to the write request is read from the primary storage volume in response to determining that at least a portion of the existing data corresponding to the write request has not already been sent to the secondary storage volume.

Abstract: A storage device includes an application container containing one or more applications, each of which running in one or more namespaces; a polymorphic storage device (PSD) kernel implemented within the storage device and configured to provide a host-side interface to a host computer and receive a plurality of packets including data, messages, and commands from the host computer via the host-side interface, and route the plurality of packets to an application in the application container based on a namespace associated with the plurality of packets; and a non-volatile memory. The PSD kernel is further configured to provide a key-value interface and a block interface to the non-volatile memory based on the namespace associated with the plurality of packets. The non-volatile memory stores a plurality of block data that is accessible via the block interface, and stores a plurality of key-value data that is accessible via the key-value interface.

Abstract: A computer having a plurality of accounts and a storage device having a host interface, a controller, non-volatile storage media, and firmware. Each account has a namespace identifier that identifies the allocation of a portion of the non-volatile storage media to the account. The storage device stores a namespace map that defines the mapping between the logical addresses in a namespace identified by the namespace identifier and the logical addresses, in a capacity of the storage device, that correspond to the portion of the non-volatile storage media allocated to and accessible to the account. The account accesses the portion of the non-volatile storage media via the logical addresses in the namespace. The firmware of the storage device configures the controller to convert, using the namespace map, the logical addresses in the namespace to the physical addresses of the portion of the non-volatile storage media.

Abstract: The write time is to be shortened in a storage device using memories that require different write times from each other, such as nonvolatile memories. In a memory controller including a plurality of write request holding units and a selection unit, the write request holding units holds a write request with respect to each of a plurality of memory modules that require different write times from one another. The selection unit selects one of the plurality of write request holding units in accordance with memory state information indicating whether each of the plurality of memory modules is in a busy state, and causes outputting of the write request.

Abstract: Some embodiments include apparatuses and methods including memory cells and a control unit to store information in a portion of the memory cells and to generate an entry associated with the information. The information is associated with a logical address recognized by a host. The entry includes an indicator indicating that the information is to be preserved for a creation of an image of information associated with logical addresses in a logical address space recognized by the host.

Abstract: Data is dynamically shared from a first process to a second process by creating a shared memory segment, obtaining a file descriptor referencing the shared memory segment, and mapping the shared memory segment in an address space of a first process. The file descriptor is sent to a second process. Responsive to receiving the file descriptor, the shared memory segment is mapped in an address space of the second process. Via the shared memory segment, data from the first process is shared to the second process.

Abstract: A memory system includes at least one memory device, including plural planes, each capable of storing data; and a controller coupled with the at least one memory device via plural channels and plural ways and suitable for transmitting data to the at least one memory device for a read operation or a write operation in response to a transmission order. The plural planes can include plural blocks respectively. The plural blocks can include multi-level cells respectively. The controller can include a mapping circuitry for determining the transmission order of the data based on a first order of the plural channels, a second order of the plural planes, a third order of the plural ways and a fourth order of bits stored in the multi-level cells.

Abstract: Disclosed is a churn prediction system that predicts with a high level of accuracy which users will and which users will not stop opening the app over a 30-day time period. To this end a model is created using historical event data where the churn-related behavior of each user is known. New event data is then applied to the model to determine the likelihood of each user churning in the future. With these prediction scores a user is then qualified as falling into one of three classifications: low-risk, medium-risk, or high-risk of churn.

Abstract: Provided are a computer program product, system, and method for populating a second cache with tracks from a first cache when transferring management of the tracks from a first node to a second node. Management of a first group of tracks in the storage managed by the first node is transferred to the second node managing access to a second group of tracks in the storage. After the transferring the management of the tracks, the second node manages access to the first and second groups of tracks and caches accessed tracks from the first and second groups in the second cache of the second node. The second cache of the second node is populated with the tracks in a first cache of the first node.

Abstract: Operating a data storage system comprising a plurality of disk drives and a storage controller connected to the disk drives. A first subset and a second subset of the plurality of disk drives are operated as short stroked disk drives and non-short stroked disk drives, respectively. Priority storage spaces are defined including a high priority storage space, a medium priority storage space, and a low priority storage space. Data is received including associated access rates for each portion of the data. One of the priority storage spaces is identified to store a portion of the data, based on the access rates for each portion of the data. Data accessed most frequently is stored in the high priority storage space, data accessed least frequently is stored in the low priority storage space, and the remaining data is stored in the medium priority storage space.

Abstract: A method for operating a storage controller reduces a probability of data loss in a storage system having redundant arrays of independent storage volumes (RAID) by identifying an old storage volume in a first location of a first RAID array of the storage system, and further by exchanging the old storage volume in the first location of the first RAID array with a second storage volume in a second location of a second RAID array of the storage system.

Abstract: In one embodiment, a system, apparatus and a method is described, the system, apparatus and a method including, a storage device and a memory operative to store target content items, a comparator operative to compare one content item of the target content items with the other target content items, and, at least on the basis of comparing the one content item of the target content items with the other content items of the target content items, to develop a correlation graph between each one content item of the target content items and the other content items of the target content items, and a machine learning system operative to receive the correlation graph and to output a decision, on the basis of in the correlation graph, indicating if the content items represented in the correlation graph are pirated content items or not. Related system, apparatuses and methods are also described.

Abstract: A method for identifying, in a system including two or more computing devices that are able to communicate with each other, with each computing device having with a cache and connected to a corresponding memory, a computing device accessing one of the memories, includes monitoring memory access to any of the memories; monitoring cache coherency commands between computing devices; and identifying the computing device accessing one of the memories by using information related to the memory access and cache coherency commands.

Abstract: Operation of a multi-slice processor that includes a plurality of execution slices, a plurality of load/store slices, and one or more page walk caches, where operation includes: receiving, at a load/store slice, an instruction to be issued; determining, at the load/store slice, a process type indicating a source of the instruction to be a host process or a guest process; and determining, in accordance with an allocation policy and in dependence upon the process type, an allocation of an entry of the page walk cache, wherein the page walk cache comprises one or more entries for both host processes and guest processes.

Abstract: A computer system includes a first group of CPU modules operatively coupled to at least one first Programmable ASIC Node Controller configured to execute transactions directly or through a first interconnect switch to at least one second Programmable ASIC Node Controller connected to a second group of CPU modules running a single instance of an operating system.

Abstract: A system and method for using free space to improve erasure code locality. The method includes logically segmenting an erasure coding data set into a stripe based on an erasure coding scheme, wherein the erasure coding data set includes a plurality of chunks, wherein the plurality of chunks includes a plurality of chunks of systematic data and a plurality of chunks of parity data, wherein the stripe includes free user data; and distributing the stripe across a plurality of non-volatile memory nodes based on the erasure coding scheme, wherein the free user data is stored in at least one memory location among the plurality of non-volatile memory nodes, wherein each non-volatile node is a unit of non-volatile memory.

Abstract: In accordance with certain techniques, prefetching operation may be divided into two parts: a trigger part and an execution part, thereby simplifying the prefetching process. Such techniques may further support prefetching of concurrent flows and enhance anti-interference capability. Certain techniques involve receiving a read request for a memory page, and determining whether the read request satisfies a trigger condition of a prefetching operation for the memory page. These certain techniques further involve, in response to the read request satisfying the trigger condition, determining a window size of the prefetching operation based on historical information of historical prefetching operations for the memory page, and triggering, based on the window size, execution of the prefetching operation.