Patents Examined by Bo Fan
  • Patent number: 10692815
    Abstract: A chip on glass package assembly includes a glass substrate, a first type chip, a second type chip and a plurality of connecting lines. The glass substrate includes an active area and a peripheral area connected to the active area. The first type chip is mounted on the peripheral area and including a processor. The second type chip is mounted on the peripheral area and located on a side of the first type chip, wherein the second type chip is different from the first type chip. The connecting lines are disposed on the peripheral area and connecting the first type chip and the second type chip.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: June 23, 2020
    Assignee: Novatek Microelectronics Corp.
    Inventors: Wei-Kuo Mai, Chiao-Ling Huang
  • Patent number: 10686160
    Abstract: Disclosed herein is a display panel including a polarizing emission layer. An organic light emitting device is formed on a first substrate. A polarizing emission layer are formed on a second substrate facing the first substrate. The polarizing emission layer is formed in a subpixel area corresponding to the organic light emitting device. The polarizing emission layer includes quantum rods. The quantum rods are aligned in one direction to be polarized. Accordingly, loss of transmitting light in the display panel including the polarizing layer may be minimized. In addition, since colors are implemented by the quantum rods included in the polarizing emission layer, color filters can be replaced by the quantum rods, and loss of light resulting from the color filters may be minimized.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: June 16, 2020
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Moon Bae Gee, Han Sun Park, Su Hyeon Kim
  • Patent number: 10686423
    Abstract: A phase-shifting circuit 1 includes a signal conductor 2 that transmits signals, and a dielectric body 3 that is disposed to overlap the signal conductor 2, said phase-shifting circuit changing the phase of the signals by changing the area of an overlapping section 5 where the signal conductor 2 and the dielectric body 3 overlap each other. The phase-shifting circuit further includes a transformer unit 7 for matching impedance between the overlapping section 5 and non-overlapping section 6 where the signal conductor 2 and the dielectric body 3 do not overlap each other, said transformer unit being provided at end sections of the dielectric body 3, said end sections being on the input side and output side of the signals.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: June 16, 2020
    Assignee: HITACHI METALS, LTD.
    Inventors: Satoshi Yoshihara, Seiji Kado, Nobuaki Kitano
  • Patent number: 10685831
    Abstract: A semiconductor structure includes providing a substrate including a first surface and a second surface opposite to the first surface. The first surface is a functional surface. The method also includes forming a plastic seal layer on the first surface of the substrate, and performing a thinning-down process on the second surface of the substrate after forming the plastic seal layer. The plastic seal layer provides support for the substrate during the thinning-down process, and thus warping or cracking of the plastic seal layer 240 may be avoided. In addition, the plastic seal layer can also be used as a material for packaging the substrate. Therefore, after the thinning-down process, the plastic seal layer does not need to be removed. As such, the fabrication process is simplified, and the production cost is reduced.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: June 16, 2020
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Fu Cheng Chen, Jian Gang Lu
  • Patent number: 10680171
    Abstract: A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric filed to cause oxygen ionic motion.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: June 9, 2020
    Assignee: Hefei Reliance Memory Limited
    Inventors: Darrell Rinerson, Christophe J. Chevallier, Wayne Kinney, Roy Lambertson, John E. Sanchez, Jr., Lawrence Schloss, Philip Swab, Edmond Ward
  • Patent number: 10677904
    Abstract: An object detection apparatus includes: a transmitter transmitting a radio wave with a predetermined intensity at the radio wave transmission end; a receiver receiving the radio wave, which is to be transmitted when the radio wave is transmitted from the transmitter, at the radio wave reception end; a setter setting a transmission scheme of the transmitter to a plurality of different transmission characteristics; a transmission controller controlling the transmitter to transmit the radio wave with the transmission scheme, which is to be set when the setter sets the transmission scheme; and a detector detecting a presence of the object at a position inside the vehicle, based on a detected reception intensity indicating a respective radio wave reception intensity received by the receiver, the object blocking the radio wave transmitted from the transmitter to the receiver at the position inside the vehicle.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: June 9, 2020
    Assignee: DENSO CORPORATION
    Inventors: Takashi Saitou, Yuuji Kakuya, Takahisa Matsumoto
  • Patent number: 10680025
    Abstract: A semiconductor package includes a package substrate, an image sensor disposed on the package substrate, and a bonding layer disposed between the package substrate and the image sensor, and including a first region and a second region, the second region has a modulus of elasticity lower than that of the first region and is disposed on a periphery of the first region.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: June 9, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong Bo Shim, Cha Jea Jo, Sang Uk Han
  • Patent number: 10677931
    Abstract: A positioning apparatus includes one or more processors; and one or more memories storing instructions that cause the processors to perform the following. Performing first receiving to receive one piece of orbit information showing a position of one positioning satellite and which attempts to receive another piece of orbit information showing a position of another positioning satellite. Performing first obtaining to obtain the another piece of orbit information (i) when receiving the another piece of orbit information is attempted but the another piece of orbit information is not received and the another piece of orbit information is received by the another positioning apparatus or (ii) when, the another piece of orbit information received by the another positioning apparatus is newer than that received in the first receiving. Performing positioning processing based on the one piece of received orbit information and the another piece of obtained orbit information.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: June 9, 2020
    Assignee: CASIO COMPUTER CO., LTD.
    Inventor: Ryuji Shingyoji
  • Patent number: 10679978
    Abstract: A module is disclosed. In one example, the module includes a carrier, an at least partially thermally conductive and electrically insulating body mounted on only a part of a main surface of the carrier, an at least partially electrically conductive redistribution structure on the thermally conductive and electrically insulating body, an electronic chip mounted on the redistribution structure and above the thermally conductive and electrically insulating body, and an encapsulant encapsulating at least part of the carrier, at least part of the thermally conductive and electrically insulating body, at least part of the redistribution structure, and at least part of the electronic chip.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: June 9, 2020
    Assignee: Infineon Technologies AG
    Inventors: Alexander Roth, Juergen Hoegerl, Hans-Joachim Schulze, Hans-Joerg Timme
  • Patent number: 10670699
    Abstract: Embodiments are provided for a radar device and a method for operating a radar device, the radar device having a transmitter and a receiver, the method including: generating a noise signal; mixing the noise signal with a transmitter output radio frequency (RF) signal to produce an intermediate signal, wherein the transmitter output RF signal is a version of a local oscillator (LO) signal having linearly increasing frequency; attenuating the intermediate signal to produce a test signal; adding the test signal to a receiver input RF signal to produce a combined receiver input RF signal; downmixing an amplified version of the combined receiver input RF signal with the LO signal to produce a combined low frequency signal; and correlating the combined low frequency signal with the noise signal to produce an error detection signal.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: June 2, 2020
    Assignee: NXP B.V.
    Inventors: Jan-Peter Schat, Abdellatif Zanati
  • Patent number: 10665474
    Abstract: Embodiments of the present disclosure include a semiconductor device and methods of forming a semiconductor device. An embodiment is a semiconductor device comprising an interconnecting structure consisting of a plurality of thin film layers and a plurality of metal layers disposed therein, each of the plurality of metal layers having substantially a same top surface area, and a die comprising an active surface and a backside surface opposite the active surface, the active surface being directly coupled to a first side of the interconnecting structure. The semiconductor device further comprises a first connector directly coupled to a second side of the interconnecting structure, the second side being opposite the first side.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: May 26, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Wei Chiu, Cheng-Hsien Hsieh, Hsien-Pin Hu, Kuo-Ching Hsu, Shang-Yun Hou, Shin-Puu Jeng
  • Patent number: 10656245
    Abstract: A blockage detection system and methods for use in a radar sensor such as a side object detection (SOD) sensor in an automotive radar system are described. The blockage detection system and method operate in systems including two or more radar sensors having overlapping field-of-views (FOVs). The blockage detection system includes a storage in a first radar sensor having stored therein a tracked object list including detections/tracks for one or more targets made by a second radar sensor and a processor for adjusting an overlap zone associated with the first radar sensor based upon an estimated mounting angle of the first radar sensor.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: May 19, 2020
    Assignee: VALEO RADAR SYSTEMS, INC.
    Inventors: Jan Zelený, Dan Busuioc, Jeffrey Millar, Tomas Vajdiak
  • Patent number: 10658311
    Abstract: Provided is a device for generating an identification key using a process variation during a manufacturing process of a conductive layer. The device for generating an identification key may include a plurality of conductive layers designed so as to be formed in a first region within a semiconductor chip, the density in which the plurality of conductive layers are disposed in the first region being at least a first threshold value and not more than a second threshold value, the first and second threshold values being less than a minimum density according to the design rules for ensuring that all of the plurality of conductive layers are formed in the first region; and a reader which provides an identification key by identifying if, among the plurality of conductive layers, a previously designated first conductive layer has been formed.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: May 19, 2020
    Assignee: ICTK Holdings Co., Ltd.
    Inventors: Byong Deok Choi, Dong Kyue Kim
  • Patent number: 10656234
    Abstract: A method includes determining, on an individual element-by-element basis, a normalized far-field pattern for each radiating element of a plurality of antenna elements. The plurality of antenna elements is associated with a phased array antenna. The method also includes determining an overall electromagnetic far-field pattern for the phased array antenna based on individual normalized element far-field patterns and based on beamforming parameters associated with a location of interest. The overall electromagnetic far-field pattern is usable to determine a signal strength, at the location of interest, of a signal transmitted from the phased array antenna. The method also includes determining an isolation between the phased array antenna and a secondary communication device based on the overall electromagnetic far-field pattern. The method further includes generating an output indicative of the isolation.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: May 19, 2020
    Assignee: THE BOEING COMPANY
    Inventors: Henry Zhenhua Zhang, Ryan Gene From, Ruben Augusto Llamas
  • Patent number: 10658174
    Abstract: Methods and apparatuses for reducing roughness using integrated atomic layer deposition (ALD) and etch processes are described herein. In some implementations, after a mask is provided on a substrate, methods include depositing a conformal layer on the mask by ALD to reduce roughness and etching a layer underlying the mask to form patterned features having a reduced roughness. In some implementations, after a substrate is etched to a first depth to form features at the first depth in the substrate, methods include depositing a conformal layer by ALD on sidewalls of the features to protect sidewalls and reduce roughness during a subsequent etch process. The ALD and etch processes may be performed in a plasma chamber.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: May 19, 2020
    Assignee: Lam Research Corporation
    Inventors: Xiang Zhou, Naveed Ansari, Yoshie Kimura, Si-Yi Yi Li, Kazi Sultana, Radhika Mani, Duming Zhang, Haseeb Kazi, Chen Xu, Mitchell Brooks, Ganesh Upadhyaya
  • Patent number: 10636806
    Abstract: A semiconductor device includes a substrate, a cell stack structure, a channel layer, a peripheral contact plug, and first dummy conductive rings. The substrate may include a first region and a second region. The cell stack structure may include interlayer insulating layers and conductive patterns, which are alternately stacked over the first region of the substrate. The channel layer may penetrate the cell stack structure. The peripheral contact plug may extend in parallel to the channel layer over the second region of the substrate. The first dummy conductive rings may be disposed at the same levels as the conductive patterns, are spaced apart from the peripheral contact plug, and surround the peripheral contact plug.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: April 28, 2020
    Assignee: SK hynix Inc.
    Inventor: Nam Jae Lee
  • Patent number: 10635060
    Abstract: A method of controlling operations of an HVAC system includes measuring temperature within an enclosed space, receiving a setpoint temperature within the enclosed space, calculating a temperature difference between the measured temperature and the received setpoint temperature, and determining whether the temperature difference between the measured temperature and the received setpoint temperature is greater than or equal to a first predetermined temperature differential value. If the temperature difference between the measured temperature and the received setpoint temperature is greater than or equal to the first predetermined temperature differential value, determining whether the temperature difference between the measured temperature and the received setpoint temperature is greater than or equal to a second predetermined temperature differential value.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: April 28, 2020
    Assignee: Lennox Industries LLC
    Inventors: Rosa Maria Leal, Alan Edens Bennett, Krag Wilson Mercer, Farhad Nick Abrishamkar
  • Patent number: 10629665
    Abstract: A semiconductor device includes a base substrate, a first transistor disposed on the base substrate, the first transistor including a first input electrode, a first output electrode, a first control electrode, and a first semiconductor pattern including a crystalline semiconductor, a second transistor disposed on the base substrate, the second transistor including a second input electrode, a second output electrode, a second control electrode, and a second semiconductor pattern including an oxide semiconductor, a plurality of insulating layers disposed on the base substrate, and an upper electrode disposed on the first control electrode with at least one insulating layer of the plurality of insulating layers interposed between the upper electrode and the first control electrode. The upper electrode overlaps the first control electrode and forms a capacitor with the first control electrode.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: April 21, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kyoungseok Son, Dohyun Kwon, Jonghan Jeong, Jonghyun Choi, Eoksu Kim, Jaybum Kim, Junhyung Lim, Jihun Lim
  • Patent number: 10629589
    Abstract: A technique relates to forming resistor fins on a substrate. A shallow trench isolation material is formed on dummy fins and the substrate, and the dummy fins are formed on the substrate. Predefined ones of the dummy fins are removed, thereby forming voids in the shallow trench isolation material corresponding to previous locations of the predefined ones of the dummy fins. A first material is deposited into the voids. The height of the first material is reduced, thereby forming trenches in the shallow trench isolation material. A second material is deposited into the trenches to be on top of the first material, thereby forming the resistor fins of a resistor device. A metal contact layer is formed so as to contact a top surface of the first material at predefined locations.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: April 21, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Zhenxing Bi, Kangguo Cheng, Juntao Li, Peng Xu
  • Patent number: 10629625
    Abstract: To provide a novel resistor. To provide a display device having a novel structure that can improve its reliability. To provide a display device having a novel structure that can reduce electrostatic discharge damages. The resistor includes a semiconductor layer and an insulating layer formed over the semiconductor layer, and the semiconductor layer is an oxide represented by an In-M-Zn oxide that contains at least indium (In), zinc (Zn), and M (M is a metal such as Al, Ga, Ge, Y, Zr, Sn, La, Ce, or Hf) and the insulating layer contains at least hydrogen.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: April 21, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki