Patents Examined by Brandon C Fox
  • Patent number: 11004813
    Abstract: A semiconductor device includes a lower insulating layer formed on a primary surface of a semiconductor substrate; a sealing layer formed in contact with a top surface of the lower insulating layer; and a conductive member including a first conductive member formed on the sealing layer and having a first film thickness and a second conductive member formed on the sealing layer in contact with a first conductive member and having a second film thickness that is smaller than the first film thickness.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: May 11, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Masanori Shindo
  • Patent number: 11005033
    Abstract: A component semiconductor structure having a semiconductor layer, which has a front side and a back side, at least one integrated circuit being formed on the front side and a first oxide layer being formed on the back side, a monolithically formed semiconductor body having a top surface and a back surface being provided, and a second oxide layer being formed on the back surface, and the two oxide layers being integrally connected to each other, and a sensor region formed between the top surface and the back surface and having a three-dimensional isotropic Hall sensor structure being disposed in the semiconductor body, the Hall sensor structure extending from a buried lower surface up to the top surface, and at least three first highly doped semiconductor contact regions being formed on the top surface and at least three second highly doped semiconductor contact regions being formed on the lower surface.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: May 11, 2021
    Assignee: TDK-Micronas GmbH
    Inventors: Martin Cornils, Maria-Cristina Vecchi
  • Patent number: 10998513
    Abstract: A display device is disclosed. In one aspect, the display device includes a flexible substrate capable of being bent in a first direction and an insulating layer including a first opening pattern positioned on the flexible substrate and extending in a second direction crossing the first direction.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: May 4, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae Woong Kim, Hyun Woo Koo, Young Gug Seol
  • Patent number: 10998322
    Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate. The semiconductor device includes a stack structure on the substrate. The stack structure includes a first insulating material and a second insulating material that is on the first insulating material. The semiconductor device includes a spacer that extends from a sidewall of the first insulating material of the stack structure to a portion of a sidewall of the second insulating material of the stack structure. Moreover, the semiconductor device includes a conductive line that is on the spacer. Methods of forming semiconductor devices are also provided.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: May 4, 2021
    Inventors: Daeik Kim, Bong-Soo Kim, Jemin Park, Taejin Park, Yoosang Hwang
  • Patent number: 10998514
    Abstract: A photoelectric device includes a first photoelectric conversion layer including a heterojunction that includes a first p-type semiconductor and a first n-type semiconductor, a second photoelectric conversion layer on the first photoelectric conversion layer and including a heterojunction that includes a second p-type semiconductor and a second n-type semiconductor. A peak absorption wavelength (?max1) of the first photoelectric conversion layer and a peak absorption wavelength (?max2) of the second photoelectric conversion layer are included in a common wavelength spectrum of light that is one wavelength spectrum of light of a red wavelength spectrum of light, a green wavelength spectrum of light, a blue wavelength spectrum of light, a near infrared wavelength spectrum of light, or an ultraviolet wavelength spectrum of light, and a light-absorption full width at half maximum (FWHM) of the second photoelectric conversion layer is narrower than an FWHM of the first photoelectric conversion layer.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: May 4, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung Bae Park, Takkyun Ro, Kiyohiko Tsutsumi, Chul Joon Heo, Yong Wan Jin
  • Patent number: 10998375
    Abstract: Disclosed are light emitting modules and automobile illumination devices including the same. The light emitting module comprises a module substrate, a light emitting device on the module substrate, and a light guide structure apart from the module substrate and in plan view surrounding the light emitting device. The light emitting device comprises a first pixel and a second pixel each including a light emitting diode (LED) chip that emits light whose wavelength falls within a range of blue color or ultraviolet ray, and a wavelength conversion material on a top surface of at least one of the first and second pixels.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: May 4, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Junho Lee, Namhyeok Kwak, Gunduk Kim, Seungwoo Lee, Do-Hun Kim, Heedong Kim
  • Patent number: 10984938
    Abstract: The magnetoresistance effect device includes: a magnetoresistance effect element that includes a first magnetization free layer, a magnetization fixed layer or a second magnetization free layer, and a spacer layer interposed between the first magnetization free layer and the magnetization fixed layer or the second magnetization free layer; and a magnetic material part that applies a magnetic field to the magnetoresistance effect element, wherein the magnetic material part is arranged to surround an outer circumference of the magnetoresistance effect element in a plan view in a stacking direction L of the magnetoresistance effect element.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: April 20, 2021
    Assignee: TDK CORPORATION
    Inventors: Shinji Hara, Akimasa Kaizu
  • Patent number: 10985084
    Abstract: Integrated circuits, wafer level integrated III-V device and CMOS driver device packages, and methods for fabricating products with integrated III-V devices and silicon-based driver devices are provided. In an embodiment, an integrated circuit includes a semiconductor substrate, a plurality of transistors overlying the semiconductor substrate, and an interlayer dielectric layer overlying the plurality of transistors with a metallization layer disposed within the interlayer dielectric layer. The plurality of transistors and the metallization layer form a gate driver circuit. The integrated circuit further includes a plurality of vias disposed through the interlayer dielectric layer, a gate driver electrode coupled to the gate driver circuit, a III-V device electrode overlying and coupled to the gate driver electrode, and a III-V device overlying and coupled to the III-V device electrode.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: April 20, 2021
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventor: Donald Ray Disney
  • Patent number: 10978673
    Abstract: Provided is a display device including: a structure including a display area and a peripheral area surrounding the display area; and an inorganic encapsulation thin film disposed on the display and peripheral areas. The peripheral area includes at least one inorganic surface portion having a closed shape continuously.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: April 13, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventor: Myoung-Seo Park
  • Patent number: 10978531
    Abstract: A transparent display substrate, a manufacturing method thereof and a transparent display panel are provided. The transparent display substrate includes: a base substrate; a plurality of sub-pixels arranged on the substrate, wherein each of the plurality of sub-pixels comprising a light emitting region and a first transparent region, and the light emitting region being provided with an organic light emitting diode (OLED); a driving circuit, located in each of the plurality of sub-pixels and configured to drive the OLED to emit light, the driving circuit comprising a capacitor disposed in the first transparent region.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: April 13, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhen Song, Guoying Wang
  • Patent number: 10978295
    Abstract: Systems, apparatuses, and methods related to epitaxial growth on semiconductor structures are described. An apparatus may include a working surface of a substrate material and a storage node connected to an active area of an access device on the working surface. The apparatus may also include a material epitaxially grown over the storage node contact to enclose a non-solid space between the storage node contact and passing sense lines.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: April 13, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Guangjun Yang, Nicholas R. Tapias
  • Patent number: 10978474
    Abstract: A method of forming a semiconductor device structure comprises forming a stack structure comprising stacked tiers. Each of the stacked tiers comprises a first structure comprising a first material and a second structure comprising a second, different material longitudinally adjacent the first structure. A patterned hard mask structure is formed over the stack structure. Dielectric structures are formed within openings in the patterned hard mask structure. A photoresist structure is formed over the dielectric structures and the patterned hard mask structure. The photoresist structure, the dielectric structures, and the stack structure are subjected to a series of material removal processes to form apertures extending to different depths within the stack structure. Dielectric structures are formed over side surfaces of the stack structure within the apertures. Conductive contact structures are formed to longitudinally extend to bottoms of the apertures.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: April 13, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Roger W. Lindsay, Michael A. Smith, Brett D. Lowe
  • Patent number: 10971410
    Abstract: A base substrate include a first substrate (110) having a first principal surface (110a) and a second principal surface (110b), and a first wiring member placed over the first or second principal surface. A pixel substrate includes a second substrate (201) having a third principal surface (201a) and a fourth principal surface (201b), a plurality of light-emitting elements (202) mounted over the third principal surface, a driver IC (205) mounted over the third principal surface, an external connection terminal mounted over the third principal surface, and a second wiring member (206) placed on the third or fourth principal surface. The driver IC drives the plurality of light-emitting elements. The external connection terminal receives an input signal that is supplied from outside the pixel substrate. The second substrate (201) is disposed to be stacked on top of the first substrate (110) so that the first principal surface and the fourth principal surface face each other.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: April 6, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Katsuji Iguchi
  • Patent number: 10964733
    Abstract: An opto-electronic High Electron Mobility Transistor (HEMT) may include a current channel including a two-dimensional electron gas (2DEG). The opto-electronic HEMT may further include a photoelectric bipolar transistor embedded within at least one of a source and a drain of the HEMT, the photoelectric bipolar transistor being in series with the current channel of the HEMT.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: March 30, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Peter Moens, Piet Vanmeerbeek, Abhishek Banerjee
  • Patent number: 10955301
    Abstract: A location of a center of pressure is determined in two-dimensions by a multi-layer sensor, which has a first sensing layer with a first sensing area and a second sensing layer with a second sensing area. The first sensing area includes one or more first sensing cells, and the second sensing area includes one or more second sensing cells. The first and second sensing areas overlap in plan view. Each of the first and second sensing cells can be respectively defined by a set of linearly-varying sensing aperture patterns. In each of the first and second sensing cells, a combination of the respective set of linearly-varying sensing aperture patterns forms a uniform sensing aperture pattern. The location of the center of pressure can be determined using a maximum of four output signals from the multi-layer sensor.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: March 23, 2021
    Assignee: University of Maryland, College Park
    Inventors: Byungseok Yoo, Darryll J. Pines
  • Patent number: 10950537
    Abstract: A package structure including a capacitor mounted within a cavity in the package substrate is disclosed. The package structure may additionally include a die mounted to a die side surface of the package substrate, and the opposing land side surface of the package substrate may be mounted to a printed circuit board (PCB). The capacitor may be mounted within a cavity formed in the die side surface of the package substrate or the land side surface of the package substrate. Mounting a capacitor within a cavity may reduce the form factor of the package. The die may be mounted within a cavity formed in the die side surface of the package substrate. Solder balls connecting the package to the PCB may be mounted within one or more cavities formed in one or both of the package substrate and the PCB.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: March 16, 2021
    Assignee: Intel Corporation
    Inventors: Md Altaf Hossain, Scott Gilbert
  • Patent number: 10943892
    Abstract: A light-emitting semiconductor chip, a light-emitting component and a method for producing a light-emitting component are disclosed. In an embodiment a light-emitting semiconductor chip includes a light-transmissive substrate having a top surface, a bottom surface opposite the top surface, a first side and a second side surface arranged opposite the first side surface, a semiconductor body arranged on the top surface of the substrate and a contacting including a first current distribution structure and a second current distribution structure, wherein the first current distribution structure and the second current distribution structure are freely accessible from a side of the semiconductor body facing away from the substrate, and wherein the semiconductor chip, on the side of the semiconductor body facing away from the substrate and on the bottom surface of the substrate, is free of any connection point configured to electrically contact the first and second current distribution structures.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: March 9, 2021
    Assignee: OSRAM OLED GMBH
    Inventor: Siegfried Herrmann
  • Patent number: 10937953
    Abstract: A device is disclosed. The device includes a tetragonal Heusler compound of the form Mn3-xCoxGe, wherein 0<x?1, wherein Co accounts for at least 0.4 atomic percent of the Heusler compound. The device also includes a substrate oriented in the direction (001) and of the form YMn1+d, wherein Y includes an element selected from the group consisting of Ir and Pt, and 0?d?4. The tetragonal Heusler compound and the substrate are in proximity with each other, thereby allowing spin-polarized current to pass from one through the other. In one aspect, the device also includes a multi-layered structure that is non-magnetic at room temperature. The structure includes alternating layers of Co and E. E includes at least one other element that includes Al. The composition of the structure is represented by Co1-yEy, with y being in the range from 0.45 to 0.55.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: March 2, 2021
    Assignees: Samsung Electronics Co., Ltd., INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jaewoo Jeong, Mahesh G. Samant, Stuart S. P. Parkin, Yari Ferrante
  • Patent number: 10937936
    Abstract: Provided is a light-emitting diode (LED) display unit group and a display panel. The LED display unit group includes a circuit board, and a pixel unit array located on the circuit board. The pixel unit array includes a plurality of pixel units arranged in n rows and m columns, n and m are both positive integers and greater than or equal to 2. Each of the pixel units includes multiple LED light-emitting chips of at least two colors, each of the LED light-emitting chips includes an electrode A and an electrode B of opposite polarities. The LED light-emitting chip of each of the pixel units includes at least one dual-electrode chip, the dual-electrode chip has the electrode A and the electrode B located on a same side of the dual-electrode chip. All dual-electrode chips in the plurality of pixel units of a same color have connecting lines from the electrode A to the electrode B directed in a same direction.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: March 2, 2021
    Assignee: FOSHAN NATIONSTAR OPTOELECTRONICS CO., LTD.
    Inventors: Feng Gu, Kuai Qin, Yuanbin Lin, Bin Cai
  • Patent number: 10937996
    Abstract: A display apparatus, comprising an element substrate including a display portion formed by arraying a plurality of organic light emitting elements on a base and a connecting portion provided on the base so as to be separated from the display portion, a driving substrate connected to the connecting portion so as to be configured to drive the display portion, and a heat-insulating portion provided between the display portion and the connecting portion in planar view in the base and configured to have lower heat conductivity than the base.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: March 2, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hidemasa Oshige