Abstract: Disclosed are methods for providing a thin film of nanocrystalline diamond grown on 6 nm nanocrystalline diamond powder on the surface of substrates. The thin film of nanocrystalline diamond can be deposited on wide-bandgap semiconducting devices to provide heat dissipation characteristics to the semiconducting devices.

Abstract: An electro-optical device includes a temperature detecting element and an electrostatic protection circuit configured to protect the temperature detecting element from a surge current. The electrostatic protection circuit includes a transistor electrically connected to the temperature detecting element in parallel, a first capacitance element electrically connected to the transistor, and a resistance element electrically connected to the first capacitance element in parallel. The electrostatic capacity of the first capacitance element is greater than a gate capacity between a gate electrode and a semiconductor layer that constitutes the transistor. In addition, a dielectric layer of the first capacitance element is thicker than a gate insulating film of the transistor.

Abstract: FinFET devices and processes to prevent fin or gate collapse (e.g., flopover) in finFET devices are provided. The method includes forming a first set of trenches in a semiconductor material and filling the first set of trenches with insulator material. The method further includes forming a second set of trenches in the semiconductor material, alternating with the first set of trenches that are filled. The second set of trenches form semiconductor structures which have a dimension of fin structures. The method further includes filling the second set of trenches with insulator material. The method further includes recessing the insulator material within the first set of trenches and the second set of trenches to form the fin structures.

Abstract: An electronic circuit comprises a first resistor (1) and a second resistor (2). The first resistor comprises: a first sheet (10) of resistive material; and a first pair (11, 12) of conductive contacts, each arranged in electrical contact with the first sheet, and arranged such that a shortest resistive path in the first sheet between the first pair of contacts passes through the first sheet and has a length equal to a thickness (LI) of the first sheet. The second resistor comprises: a second sheet (20) of resistive material; and a second pair (21, 22) of conductive contacts, each arranged in electrical contact with the second sheet, and arranged such that a shortest resistive path (L2) in the second sheet between the second pair of contacts passes along at least a portion of a length of the second sheet.

Abstract: A mask assembly includes a frame including a frame opening, and a mask disposed on the frame. The mask includes a body portion including an upper surface and a lower surface opposing each other and deposition openings spaced apart from each other, protrusions protruding from the upper surface and surrounding the corresponding deposition openings, and at least one step formation pattern overlapping the protrusions in a plan view and disposed in the body portion.

Abstract: A display device may include a transistor substrate including a driving element, and having a display area, and a non-display area surrounding the display area, a bank layer on the non-display area of the transistor substrate, and exposing an outer area of the non-display area of the transistor substrate that is opposite to the display area, an inorganic insulating layer covering an upper surface of the bank layer, a side surface of the bank layer, and the outer area of the transistor substrate, a low refractive layer on the inorganic insulating layer, and a first color filter layer on the non-display area to cover a portion of an upper surface of the inorganic insulating layer, and a side surface of the inorganic insulating layer.

Abstract: An excellent anti-reflection circular polarizer for preventing the reflection of external light is provided, and thereby an excellent image display device with very little degradation of anti-reflection functionality caused by decreased levels of polarization under conditions of high humidity while having little deformation of an image display panel is provided. In particular, an anti-reflection circular polarizer suitable for an organic EL image display device is provided. The anti-reflection circular polarizer includes a reflection reduction layer, a light-transmissive substrate film, a polarizing element, and a ?/4 phase-difference layer, stacked in this order, wherein the light-transmissive substrate film has a moisture permeability of 100 g/m2·day or less.

Abstract: Disclosed herein are photodetectors using arrays of pixels with single-photon avalanche diodes (SPADs). The pixel arrays may have configurations that include one or more control transistors for each SPAD collocated on the same chip or wafer as the pixels and located on a surface of the wafer opposite to the light gathering surface of the pixel arrays. The control transistors may be positioned or configured for interconnection with a logic chip that is bonded to the wafer of the pixel array. The pixels may be formed in a substrate having doping gradient. The control transistors may be positioned on or within the SPADs, or adjacent to, but isolated from, the SPADs. Isolation between the individual SPADs and the respective control transistors may make use of shallow trench isolation regions or deep trench isolation regions.

Abstract: Various embodiments disclosed relate to methods of making omni-directional semiconductor interconnect bridges. The present disclosure includes semiconductor assemblies including a mold layer having mold material, a first filler material dispersed in the mold material, and a second filler material dispersed in the mold material, wherein the second filler material is heterogeneously dispersed.

Abstract: In some implementations, one or more semiconductor processing tools may form a via for a semiconductor device. The one or more semiconductor processing tools may deposit a metal plug within the via. The one or more semiconductor processing tools may deposit an oxide-based layer on the metal plug within the via. The one or more semiconductor processing tools may deposit a resistor on the oxide-based layer within the via. The one or more semiconductor processing tools may deposit a first landing pad and a second landing pad on the resistor within the via. The one or more semiconductor processing tools may deposit a first metal plug on the first landing pad and a second metal plug on the second landing pad.

Abstract: A method of manufacturing a semiconductor device, includes forming a sacrificial film made of a polymer having a urea bond on a substrate by supplying an amine and an isocyanate to a surface of the substrate, wherein the sacrificial film is provided in a specific region of the substrate; performing a predetermined process on the substrate on which the sacrificial film is formed; and removing the sacrificial film by heating the substrate to depolymerize the polymer, wherein a carbon bonded to a nitrogen atom contained in an isocyanate group of the isocyanate is a secondary or tertiary non-aromatic carbon.

Abstract: A semiconductor device includes a package and a cooling cover. The package includes a first die having an active surface and a rear surface opposite to the active surface. The rear surface has a cooling region and a peripheral region enclosing the cooling region. The first die includes micro-trenches located in the cooling region of the rear surface. The cooling cover is stacked on the first die. The cooling cover includes a fluid inlet port and a fluid outlet port located over the cooling region and communicated with the micro-trenches.

Abstract: A method of forming a ferroelectric random access memory (FeRAM) device includes: forming a layer stack over a substrate, where the layer stack includes alternating layers of a first dielectric material and a word line (WL) material; forming first trenches extending vertically through the layer stack; filling the first trenches, where filling the first trenches includes forming, in the first trenches, a ferroelectric material, a channel material over the ferroelectric material, and a second dielectric material over the channel material; after filling the first trenches, forming second trenches extending vertically through the layer stack, the second trenches being interleaved with the first trenches; and filling the second trenches, where filling the second trenches includes forming, in the second trenches, the ferroelectric material, the channel material over the ferroelectric material, and the second dielectric material over the channel material.

Abstract: A groove is formed in a first semiconductor layer 1, a sidewall of the groove is coated with a first insulating film 2, a first impurity layer 3 and a second impurity layer 4 thereon are disposed in the groove, a second semiconductor layer 7 is disposed on the second impurity layer, a first semiconductor is disposed at the other part, an n+ layer 6a and an n+ layer 6c are positioned at respective ends of the second semiconductor layer 7 and connected to a source line SL and a bit line BL, respectively, a first gate insulating layer 8 is formed on the second semiconductor layer 7, and a first gate conductor layer 9 is connected to a word line WL.

Abstract: A foldable display, includes a display layer with flexibility including a first display region, a second display region, and a third display region located between the first display region and the second display region; a cover with flexibility configured to cover the display layer; a first support substrate with inflexibility configured to support the first display region; a second support substrate with inflexibility configured to support the second display region; a bending part capable of bending including the third display region; and a shock absorbing layer provided between the display layer and the first support substrate and between the display layer and the second support substrate.

Abstract: A display panel includes at least one pixel unit. The pixel unit includes a first sub-pixel, a second sub-pixel, a third sub-pixel and a fourth sub-pixel. The first, second, third and fourth sub-pixels include a first color filter portion, second color filter portion, a third color filter portion and a fourth color filter portion, respectively. The first, second and third color filter portions are configured to emit light of three primary colors. A material of the fourth color filter portion includes at least one light conversion material configured to convert a portion of light directed to the fourth color filter portion into light of at least one primary color. The light of at least one primary color is capable of being mixed with another portion of the light directed to the fourth color filter portion to generate white light.

Abstract: An image sensor includes a substrate including a first region and a second region surrounding the first region, a light sensing element in the substrate, a planarization layer on the light sensing element, a color filter array layer including color filters on the planarization layer on the first region of the substrate, a light blocking metal pattern on the planarization layer on the second region of the substrate, a dummy color filter layer on the light blocking metal pattern on a portion of the second region adjacent to the first region of the substrate, and microlens on the color filter array layer. Active pixels are in the first region, and optical black (OB) pixels are in the second region.

Abstract: A nonvolatile memory device with improved reliability is provided. The nonvolatile memory device comprises a substrate, a mold structure including a plurality of word lines stacked on the substrate, a first word line cut region configured to cut the mold structure, a first channel structure spaced apart from the first word line cut region by a first distance, and disposed in the mold structure and the substrate, and a second channel structure spaced apart from the first word line cut region by a second distance, and disposed in the mold structure and the substrate, wherein the second distance is greater than the first distance, a first width of the first channel structure is different from a second width of the second channel structure, and a first length of the first channel structure is different from a second length of the second channel structure.

Abstract: A magnetoresistive element that has a magnetic material made of an alloy having a stable bcc structure containing Co as a main component, has an excellent tunnel magnetoresistive ratio, and can be put into practical use by mass production, and a magnetic storage device using the magnetoresistive element are provided. The magnetoresistive element includes a first magnetic layer whose magnetization direction is substantially fixed, a second magnetic layer whose magnetization direction is changeable, and a non-magnetic layer arranged between the first magnetic layer and the second magnetic layer. The first magnetic layer and/or the second magnetic layer has an alloy having a bcc structure containing Co as a main component and Co and Mn.

Abstract: A display panel includes: a substrate; a transistor on the substrate; a planarization layer on the transistor, and defining at least one recess; a first pixel electrode and a second pixel electrode on the planarization layer, with the recess therebetween in a plan view; a metal pattern on the planarization layer, and adjacent to the first pixel electrode or the second pixel electrode; a pixel defining layer on the metal pattern and filling the recess; and a spacer on the pixel defining layer and overlapping with the metal pattern.