Patents Examined by Candice Rankin
  • Patent number: 8909888
    Abstract: Method and apparatus for securely erasing data from a non-volatile memory, such as but not limited to a flash memory array. In accordance with various embodiments, an extended data set to be sanitized from the memory is identified. The extended data set includes multiple copies of data having a common logical address and different physical addresses within the memory. The extended data set is sanitized in relation to a characterization of the data set. The data sanitizing operation results in the extended data set being purged from the memory and other previously stored data in the memory being retained.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: December 9, 2014
    Assignee: Seagate Technology LLC
    Inventors: Ryan James Goss, David Scott Seekins, Jonathan W. Haines, Timothy R. Feldman
  • Patent number: 8909892
    Abstract: Embodiments of the invention enable fast context switching of application specific processors having functional units with an architecturally visible state. In example embodiments, a processor allocates memory space to store two process control blocks for two active tasks to be performed by the processor comprising one or more custom functional units having a respective processing state not accessible by the processor. A memory controller stores the processing state of the custom functional units currently running a first active task, in a first process control block, in response to a preemptive task switch requirement. The memory controller loads a second processing state of the custom functional units for a second active task, from a second process control block in the memory, in response to the preemptive task switch requirement. The processor may then perform the second active task, based on the second processing state loaded into the custom functional units.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: December 9, 2014
    Assignee: Nokia Corporation
    Inventors: Tommi Juhani Zetterman, Harri Hirvola
  • Patent number: 8880813
    Abstract: A method and a device for multithread to access multiple copies. The method includes: when multiple threads of a process are distributed to different nodes, creating a thread page directory table whose content is the same as that of a process page directory table of the process, where each thread page directory table includes a special entry which points to specific data and a common entry other than the special entry, each thread corresponds to a thread page directory table, and the specific data is data with multiple copies at different nodes; and when each thread is scheduled and the special entry in the thread page directory table of the each thread does not point to the specific data stored in a node where the thread is located, modifying, based on a physical address of the specific data, the special entry to point to the specific data.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: November 4, 2014
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Wei Wang, Yiyang Liu, Xiaofeng Zhang
  • Patent number: 8880795
    Abstract: Multiple memory devices, such as hard drives, can be combined and logical partitions can be formed between the drives to allow a user to control regions on the drives that will be used for storing content, and also to provide redundancy of stored content in the event that one of the drives fails. Priority levels can be assigned to content recordings such that higher value content can be stored in more locations and easily accessible locations within the utilized drives. Users can control and organize how recorded content is stored between the drives such that an external drive may be removed from a first gateway device and attached to a second gateway device without losing the ability to access the recorded content from the first gateway device at a later time. In this manner, a user is provided with the ability to transport an external drive containing stored content recordings between multiple different gateway devices such that the recordings may be accessed at different locations or user premises.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: November 4, 2014
    Assignee: Comcast Cable Communications, LLC.
    Inventor: Ross Gilson
  • Patent number: 8874868
    Abstract: A method begins by a processing module identifying a memory loading mismatch between a first memory device and a second memory device of a dispersed storage unit, wherein the first memory device is assigned a first range of slice names and the second memory device is assigned a second range of slice names. The method continues with the processing module determining an estimated impact to reduce the memory loading mismatch and when the estimated impact compares favorably to an impact threshold, modifying the first and second ranges of slices names to produce a first modified range of slice names for the first memory device and a second modified range of slice names for the second memory device based on the memory loading mismatch and transferring one or more encoded data slices between the first and second memory devices in accordance with the first and second modified ranges of slice names.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: October 28, 2014
    Assignee: Cleversafe, Inc.
    Inventors: Andrew Baptist, Greg Dhuse
  • Patent number: 8868866
    Abstract: A data archiving apparatus includes an autoloader for automated transfer of data tape cartridges between at least one tape drive and storage locations of at least one cartridge storage magazine. One or more hard disks is mounted within the autoloader apparatus. The hard disk is connected for data transfer between the hard disk and the tape drive so that data caching can be accomplished during the data archiving process. Interface controls for both the tape drive and the one or more hard disks is provided within the housing of the data archiving apparatus to permit simultaneous operation of the hard disk and the tape drive and for data transfer there between. The hard disks may be exchanged by a user to increase data storage capacity.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: October 21, 2014
    Assignee: Tandberg Data ASA
    Inventor: Håvard Hoelsaeter
  • Patent number: 8868835
    Abstract: A cache control apparatus according to the present invention includes a cache allocation control unit which allocates each of a plurality of ways included in a cache memory to one or more of tasks to be executed by a plurality of processors. In the case where a group of ways includes an unallocated way that is not allocated to any of the tasks and a way allocated to one or more of the tasks which is to be executed by one of the processors, the cache allocation control unit allocates the unallocated way included in the group to the one or more of the tasks to be executed by the one of the processors.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: October 21, 2014
    Assignee: Panasonic Corporation
    Inventor: Kunihiko Hayashi
  • Patent number: 8868862
    Abstract: A primary-backup replication capability is disclosed. A primary process and a backup process participate in a synchronization process configured to synchronize state information of the primary and backup processes. The synchronization process operates in periods of time referred to as epochs. During the current epoch, the primary process computes state update information representing changes to the state information of the primary process since a previous epoch, and also buffers output messages generated during the current epoch in an associated output buffer dedicated for use in the current epoch. The primary process initiates a new epoch independent of receiving, from the backup process, a state update acknowledgement for the previous epoch. The output messages buffered for the current epoch are released from the associated output buffer after the primary process receives a state update acknowledgment for the current epoch and all output buffers of all previous epochs are empty.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: October 21, 2014
    Assignee: Alcatel Lucent
    Inventors: Kedar Namjoshi, Pramod Koppol, Athansios Stathopoulos, Gordon T. Wilfong
  • Patent number: 8862804
    Abstract: Embodiments of the invention are directed to improving parity determination in a data redundancy scheme. In a block oriented storage system, where the storage element block size is an integer multiple of the block size used on the host interface, parity can be calculated on clean boundaries of the host block. However, this is not always the case and storage inefficiency occurs as a result. Embodiments of the invention optimize RAID parity calculation in a non-volatile solid state device by allowing the RAID stripe depth (also termed a “strip”) to be a non-integer multiple of the size of the individual storage element, i.e., the non-volatile memory program granularity. This enables efficient use of storage space where the host data size does not match the storage element size of the non-volatile memory while providing a straightforward way of handling parity generation and data recovery.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: October 14, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventor: Robert L. Horn
  • Patent number: 8850156
    Abstract: A method for managing Virtual Machine (VM) storage space is provided. In the method, a Storage Balloon Agent (SBA) module deployed in a VM is adopted to directly acquire virtual storage free block information and deliver the acquired virtual storage free block information to a Storage Balloon Daemon (SBD) module deployed in a Virtual Machine Monitor (VMM) layer; and the SBD module releases a part or all of physical storage space corresponding to the virtual storage free block information, and marks virtual storage blocks corresponding to the released physical storage space as unavailable. A corresponding system and a physical host are further provided in the present invention. Through the method of an embodiment of the present invention, use condition of virtual storage space can be acquired in real time, and a large number of read and write operations of a storage system can be avoided.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: September 30, 2014
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Xiaowei Yang, Zhikun Wang
  • Patent number: 8832395
    Abstract: A controller receives new data which is data updated from old data, stores the received new data in a memory, reads the old data from a first storage medium group and stores the old data read into the memory, generates transfer data which is used to replicate in the subsidiary storage system new data with less information than the new data on the basis of a difference between the old data and the new data in the memory and transmits the transfer data to the subsidiary storage system, reads the old parity and stores it in the memory, and generates new parity which is parity updated from the old parity on the basis of the old parity in the memory and XOR data which is the exclusive logical sum of the new data and old data in the memory, and stores the new parity in the first storage medium group.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: September 9, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Yasuo Watanabe, Norio Shimozono, Shunji Kawamura
  • Patent number: 8832402
    Abstract: Method and apparatus for self-initiated secure erasure of data from a non-volatile memory, such as a solid state drive (SSD). In accordance with various embodiments, the memory is operated in communication with a host device. A self-initiated, non-destructive secure erasure of the data stored in the memory is carried out responsive to a detection of an unauthorized power down event associated with the memory.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: September 9, 2014
    Assignee: Seagate Technology LLC
    Inventors: Ryan James Goss, David Scott Seekins
  • Patent number: 8799608
    Abstract: A technique oversees a path between a multipathing driver of a host computer and a volume of a data storage array. The technique involves, while the multipathing driver of the host computer sends input/output requests (IOs) to the volume of the data storage array on the path, generating an IOs-Over-Period metric based on outcomes of the IOs, the IOs-Over-Period metric providing a measure of IOs per failure over a period of path operation. The technique further involves performing a comparison operation which compares the IOs-Over-Period metric to a predefined flaky path range having a predefined lower limit and a predefined upper limit. The technique further involves, after performing the comparison operation, outputting a detection signal indicating that the path is (i) flaky when the IOs-Over-Period metric falls within the predefined flaky path range and (ii) non-flaky when the IOs-Over-Period metric falls outside of the predefined flaky path range.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: August 5, 2014
    Assignee: EMC Corporation
    Inventors: Helen S. Raizen, Michael E. Bappe, Harold M. Sandstrom, Vinay G. Rao, Nihar R. Panda
  • Patent number: 8799569
    Abstract: Various method and system embodiments for facilitating catalog sharing in multiprocessor systems use multiple ECS cache structures to which catalogs are assigned based on an attribute such as SMS storage class or a high level qualifier (HLQ) (e.g. an N-to-1 mapping) or each individual catalog (e.g. a 1-to-1 mapping). When maintenance is performed on an ECS shared catalog, the multiple ECS cache structure requires only those catalogs associated with a particular ECS cache structure be disconnected. Any catalogs in the structure that are not involved in or affected by the maintenance may be temporarily or permanently moved to a different ECS cache structure. As a result, VVDS sharing is only required for those catalogs on which maintenance is being performed or that remain associated with that ECS cache structure during maintenance. This reduces I/O activity to the DASD, and results in a significant overall performance improvement.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: August 5, 2014
    Assignee: International Business Machines Corporation
    Inventors: Eric J. Harris, Franklin Emmert McCune, David Charles Reed, Max Douglas Smith
  • Patent number: 8782336
    Abstract: A hybrid control module includes a host interface control module configured to transfer data to and from a host interface. A first embedded multi-media card (eMMC) interface is configured to (i) connect to a second eMMC interface of a control module embedded solid-state memory (SSM) and (ii) transfer the data between the hybrid control module and the control module embedded SSM. A buffer management module is (i) in communication with the host interface control module, the first eMMC interface and a disk access control module and (ii) configured to buffer the data in volatile memory. The data is received by the buffer management module and from at least one of the host interface control module, the first eMMC interface, or the disk access control module.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: July 15, 2014
    Assignee: Marvell World Trade Ltd.
    Inventors: Sehat Sutardja, Son Hong Ho
  • Patent number: 8775732
    Abstract: A system and method for passing data access information to a disk array are provided. Data access statistics are received from a first source. Thereafter, a determination is made as to whether such data access statistics are to be included in a list of data access statistics. A frequency analysis is then performed by a disk array using the list of data access statistics. An assignment of data to storage blocks within the disk array is then made according to results of the frequency analysis.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: July 8, 2014
    Assignee: Symantec Corporation
    Inventor: Anindya Banerjee
  • Patent number: 8751728
    Abstract: Embodiments of the invention include systems and methods for reducing bus transfers for a storage device. In particular, these systems and methods reduce bus transfers by modifying an interface transfer protocol which designates the size of a multiple block read or write command is transmitted in a separate block transfer size command. Separate block transfer size commands can be omitted where the storage device maintains a record of a previously used block transfer size and reuses the size for subsequent multiple block read or write commands.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: June 10, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventors: Mei-Man L. Syu, Robert L. Horn, Virgil V. Wilkins
  • Patent number: 8751768
    Abstract: Storage systems and methods are presented. In one embodiment, a storage reclamation method comprises performing a potential reclamation identification process, wherein the potential reclamation identification process includes determining if there is the potential for reclaiming storage resources; performing a reclamation process, wherein reclamation is performed on storage resources identified by the potential reclamation identification process as being eligible for reclamation, and wherein the storage resources correspond to free space associated with a data file; and performing a valid free space indication process, wherein a valid free space indication process includes forwarding a valid free space indication recognizable to an application as a valid free space indication when the application attempts to direct a read to the storage spaces reclaimed by the reclamation process.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: June 10, 2014
    Assignee: Symantec Corporation
    Inventors: Ragupathi Malige, Ryan Robert Lefevre, Edwin Frederick Menze, III, Sunil Kumar Tekkatte Subramanya
  • Patent number: 8745338
    Abstract: Overwriting part of compressed data without decompressing on-disk compressed data is implemented by receiving a write request for a block of data in a compression group from a client, wherein the compression group comprises a group of data blocks that is compressed, wherein the block of data is uncompressed. The storage server partially overwrites the compression group, wherein the compression group remains compressed while the partial overwriting is performed. The storage server determines whether the partially overwritten compression group including the uncompressed block of data should be compressed. The storage server defers compression of the partially overwritten compression group if the partially overwritten compression group should not be compressed. The storage server compresses the partially overwritten compression group if the partially overwritten compression group should be compressed.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: June 3, 2014
    Assignee: NetApp, Inc.
    Inventors: Sandeep Yadav, Rickard E. Faith, Subramaniam Periyagaram, Blake Lewis, Ashish Prakash
  • Patent number: 8725954
    Abstract: A memory control apparatus, in a case of receiving from a processor, under a condition where the number of cache memories retaining a copy of data stored in a main storage device is one, a notification to the effect that data retained in the cache memory is purged, updates directory information on a directory cache without accessing the main storage device when the data is not modified by the processor, and the directory information on the directory cache and directory information on the main storage device is determined to be different and the directory information on the main storage device is determined to be in a state indicating that the copy of the data is not retained by any processor in the state of coherence.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: May 13, 2014
    Assignee: Fujitsu Limited
    Inventors: Koichi Maeda, Hiroyuki Wada