Patents Examined by Caridad Everhart
  • Patent number: 11444049
    Abstract: An electronic component module according to an embodiment includes a substrate, an electronic component, and a connection device. The substrate includes an electrode array. The electronic component includes an electrode array. The connection device that includes a plurality of post parts including respective conductive parts and a base for supporting the plurality of post parts. The connection device is interposed between the substrate and the electronic component, and is configured in a manner that the conductive parts electrically connect the electrode array of the substrate and the electrode array of the electronic component to each other via solder.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: September 13, 2022
    Assignee: SONY CORPORATION
    Inventor: Osamu Maki
  • Patent number: 11437600
    Abstract: In the present embodiment, a sealing agent (50) sealing two substates contains a low melting-point glass material and is adhered to each of a first substrate (10) and a second substrate (20), a barrier rib (60), which is formed in such a manner as to surround the outer periphery of an electronic element (30), is disposed between the sealing agent (50) and the electronic element (30), and between the first substrate (10) and the second substrate (20), and the sealing agent (50) is spaced apart from the barrier rib (60). As a result, a deterioration of the electronic element, caused by the heat produced when sealing, may be prevented while the electronic element formed between the two substrates is protected from moisture and oxygen.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: September 6, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yuhki Kobayashi, Shinichi Kawato, Kiyoshi Minoura, Shinji Shimada, Hiroshi Tsuchiya, Masahiro Mitani, Kohzoh Nakamura, Katsuhiko Kishimoto, Yozo Narutaki
  • Patent number: 11417598
    Abstract: Implementations of semiconductor packages may include: a prefabricated electrically conductive section; two or more metal oxide semiconductor field effect transistors (MOSFET) physically coupled together; and a back metal coupled to the two or more MOSFETs; wherein the electrically conductive section may be coupled to the back metal and may be configured to electrically couple the two or more MOSFETs together during operation of the two or more MOSFETs.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: August 16, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yusheng Lin, Yenting Wen, George Chang
  • Patent number: 11404664
    Abstract: An organic light emitting diode (OLED) device and the method of manufacturing thereof. The OLED device comprising a substrate, a display region, a non-display region, and an encapsulation structure; wherein the encapsulation structure comprises: at least one ring of barrier wall on the non-display region; an encapsulating film laminate covering the display region and the non-display region, the encapsulating film laminate comprising an organic film; an organic thin film detecting device surrounding the barrier wall, after detecting that the organic film overflows the barrier wall, the organic thin film detecting device emits an electrical signal indicating overflow.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: August 2, 2022
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Jun Cao
  • Patent number: 11380858
    Abstract: A display device according to an embodiment of the present disclosure may include a substrate, a display element layer on the substrate, an encapsulation layer on the display element layer to seal the display element layer, a polarizing layer on the encapsulation layer, a first protection layer on the substrate and spaced apart from the polarizing layer, and a second protection layer on the substrate and covering a portion of the first protection layer, wherein the first protection layer has a thickness that is greater than a thickness of the second protection layer.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: July 5, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: HyoungWook Lee, Yewon Cho, Hojin Kang, Muhyun Kim, Jinhwan Kim
  • Patent number: 11380875
    Abstract: A display apparatus includes a display panel including an opening area through which light passes, a non-display area including an opening peripheral area that is around a periphery of the opening area, and a display area including at least one pixel, the display area being around a periphery of the opening peripheral area, an optical film layer disposed on the display panel, and a cover window disposed on the optical film layer. The display panel includes a base substrate, a light emitting structure disposed on the base substrate, a planarization insulating layer disposed on the substrate in the opening peripheral area, and a light blocking pattern disposed on the planarization insulating layer in the opening peripheral area.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: July 5, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kwangwoo Park, Junhyuk Woo, Hyeonbum Lee, Eonjoo Lee
  • Patent number: 11335882
    Abstract: The invention relates to an organic light-emitting diode (OLED) display device and a manufacturing method thereof. In the invention, a first retaining wall corresponding to a bending region is configured to include first retaining wall units spaced apart from each other, and a first buffer structure is formed in a gap provided between the first retaining wall units and is alternately connected to a left side and a right side of the first retaining wall units. This can prevent excessive stress concentration on the retaining wall in the bending region due to its special configuration, which causes a phenomenon of film layer detachment. Therefore, a failure of the OLED display device is prevented.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: May 17, 2022
    Inventor: Kun Wang
  • Patent number: 11322721
    Abstract: An encapsulation structure of an organic light emitting diode (OLED) display panel and a manufacturing method thereof are provided. By changing an edge design of a panel encapsulation structure and adding an encapsulation reduction layer to the encapsulation structure, the encapsulation reduction layer can be restored by subsequent processing after the encapsulation reduction layer is eroded by water and oxygen. This prevents an OLED display device from being oxidized, thereby extending a life of a device.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: May 3, 2022
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Lei Zhao, Gaozhen Wang
  • Patent number: 11316139
    Abstract: A manufacturing apparatus is configured to bond a display panel to a cover window having a flat portion between a first curvature portion and a second curvature portion. The manufacturing apparatus comprises a first attachment portion configured to press a first adhesive surface of the display panel to the flat portion of the cover window, and a 3D attachment portion configured to press a first edge adhesive surface and a second edge adhesive surface of the display panel to the first curvature portion and the second curvature portion of the window, respectively, and not press the first adhesive surface of the display panel.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: April 26, 2022
    Assignee: LG Display Co., Ltd.
    Inventors: IkHyun Kuon, Yongsoo Kim, SangEun Han, SungNam Byun, JeongKweon Park, SangGul Lee, Changmin Pyo, Doowon Seo, Bogyung Kang, Sungwook Park, Juyeob Lee, YongMin Ha, SoonBum Shin, MoonGoo Kim, Chan Park, YunMi Lee
  • Patent number: 11316085
    Abstract: A display device and a manufacturing method thereof are provided. The display device includes a circuit substrate, multiple light-emitting elements and a packaging material. The circuit substrate includes a first surface, a second surface opposite the first surface, and multiple through slots penetrating through the first and second surfaces. The through slots each are in a stepped form, and the circuit substrate is divided into a chip mounting area, multiple anodes, and a common cathode. The light-emitting elements include multiple light-emitting elements mounted on the circuit substrate along a straight line and electrically connected with the anodes respectively through wires. The packaging material covers the circuit substrate, the light-emitting elements and the wires. The display device has an excellent performance while achieving a small size.
    Type: Grant
    Filed: January 4, 2020
    Date of Patent: April 26, 2022
    Assignee: KAISTAR LIGHTING (XIAMEN) CO., LTD.
    Inventor: Bin Zhong
  • Patent number: 11264592
    Abstract: An encapsulation structure of an organic electroluminescent device includes a substrate, a first inorganic sealing layer and an organic sealing layer. The first inorganic sealing layer is stacked on the substrate, and the organic sealing layer is stacked on a side of the first inorganic sealing layer that is away from the substrate. The organic sealing layer includes a UV light absorbing material and/or a UV resistant polymer material. An encapsulation method of the encapsulation structure of an organic electroluminescent device and a display panel including the encapsulation structure are further provided.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: March 1, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Dan Wang, Rui Hong, Lei Chen
  • Patent number: 11251332
    Abstract: A method for manufacturing a light-emitting element includes exposing a portion of an insulating layer from under a metal layer and a semiconductor layer by removing, through an opening of a resist layer, a portion of the metal layer and a portion of the semiconductor layer by wet etching using a first etchant, etching rates of the first etchant for the metal layer and the semiconductor layer each being higher than an etching rate of the first etchant for the insulating layer; removing the resist layer by wet etching after the removing of the metal layer portion and the semiconductor layer portion; and after the removing of the resist layer, removing a remaining portion of the metal layer while causing the insulating layer exposed from under the metal layer and the semiconductor layer to remain. The opening of the resist layer is positioned directly on the conductive layer.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: February 15, 2022
    Assignee: Nichia Corporation
    Inventors: Mitsumasa Takeda, Yuya Yamakami
  • Patent number: 11244852
    Abstract: The present invention is a method for manufacturing a bonded SOI wafer, including: preparing, as a base wafer, a silicon single crystal wafer whose initial interstitial oxygen concentration is 15 ppma or more ('79ASTM); forming a silicon oxide film on a surface of the base wafer by heating the base wafer in an oxidizing atmosphere such that a feeding temperature at which the base wafer is fed into a heat treatment furnace for the heat treatment is 800° C. or more, and the base wafer is heated at the feeding temperature or higher; bonding the base wafer to the bond wafer with the silicon oxide film interposed therebetween; and thinning the bonded bond wafer to form an SOI layer. This provides a method for manufacturing a bonded SOI wafer by a base oxidation method which suppresses the formation of oxide precipitates in a base wafer while suppressing slip dislocation.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: February 8, 2022
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Toru Ishizuka, Setsuya Hama
  • Patent number: 11233223
    Abstract: A structure for extracting light, which improves light extraction efficiency by enhancing a scattering effect and improves power efficiency and thus increases the lifetime of an organic electroluminescent lighting device, is provided, and an organic electroluminescent lighting device including the structure for extracting light is also provided.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: January 25, 2022
    Assignee: CHEOMDANLAB INC.
    Inventor: Ha Jun Jang
  • Patent number: 11227908
    Abstract: A flexible organic light-emitting diode (OLED) display substrate and manufacturing method using the same are provided. The flexible OLED display substrate includes a display region, a non-display region, and a bending region connected to the display region and the non-display region. The bending region is provided with multiple liquid conductive wires spaced from each other. Each liquid conductive wire includes a conductive flow channel disposed in the bending region and a pair of metal wire portions connected to two ends of the conductive flow channel. A packaging layer is arranged on each conductive flow channel to store a liquid conductive material. The liquid conductive material is sealed in each conductive flow channel. Therefore, the liquid conductive wires can greatly improve the production yield of the bending region, and overcome a problem that a conventional bending region is prone to break during a bending process.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: January 18, 2022
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Yongzhen Jia
  • Patent number: 11217770
    Abstract: A display panel includes a thin-film transistor (TFT) array substrate, and a passivation layer and an organic planarization layer both disposed on the TFT array substrate. A silicon oxide (SiOx) layer, a silicon nitride (SiNx) layer, and an organic light-emitting diode (OLED) device layer are disposed on the organic planarization layer. The SiOx layer includes a plurality of first SiOx film portions disposed in a consecutive arrangement, and a plurality of second SiOx film portions disposed in a non-consecutive arrangement. The second SiOx film portions have a fuzz surface, and a photonic crystal structure is formed by corresponding portions of the SiNx layer disposed above the second SiOx film portions and the fuzz surface. The display panel of the present invention utilizes the photonic crystal structure disposed on a light-emitting area to effectively improve a light extraction rate of the OLED device.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: January 4, 2022
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Bifen Lin
  • Patent number: 11211579
    Abstract: In the present embodiment, a sealing agent (50) sealing two substates contains a low melting-point glass material and is adhered to each of a first substrate (10) and a second substrate (20), a barrier rib (60), which is formed in such a manner as to surround the outer periphery of an electronic element (30), is disposed between the sealing agent (50) and the electronic element (30), and between the first substrate (10) and the second substrate (20), and the sealing agent (50) is spaced apart from the barrier rib (60). As a result, a deterioration of the electronic element, caused by the heat produced when sealing, may be prevented while the electronic element formed between the two substrates is protected from moisture and oxygen.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: December 28, 2021
    Assignees: SHARP KABUSHIKI KAISHA, SAKAI DISPLAY PRODUCTS CORPORATION
    Inventors: Yuhki Kobayashi, Shinichi Kawato, Kiyoshi Minoura, Shinji Shimada, Hiroshi Tsuchiya, Masahiro Mitani, Kohzoh Nakamura, Katsuhiko Kishimoto, Yozo Narutaki
  • Patent number: 11152303
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip has a plurality of gate structures disposed over a substrate. A plurality of metal structures continuously extend from lower surfaces contacting the plurality of gate structures to upper surfaces contacting one or more interconnects within an overlying conductive interconnect layer. The plurality of metal structures are arranged at a first pitch that is larger than a second pitch of the plurality of gate structures.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: October 19, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Liang-Yao Lee, Tsung-Chieh Tsai, Juing-Yi Wu, Chun-Yi Lee
  • Patent number: 11114500
    Abstract: A display device includes a substrate including a display area having a plurality of pixel areas and a non-display area located around the display area; a circuit element layer including a circuit element in each of the pixel areas and a reference voltage wiring in the non-display area, the reference voltage wiring being electrically coupled to the circuit element; and a display element layer including a first pixel electrode on the circuit element layer in each of the pixel areas, a second pixel electrode located opposite to the first pixel electrode, a plurality of light emitting elements between the first pixel electrode and the second pixel electrode, and a first wiring on the circuit element layer in the non-display area, wherein the first wiring is directly coupled to the reference voltage wiring in the non-display area.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: September 7, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Won Jun Lee, Hyo Chul Lee
  • Patent number: 11114389
    Abstract: A substrate structure includes a chip attach area and an upper side rail surrounding the chip attach area. The upper side rail includes an upper stress relief structure and an upper reinforcing structure. The upper stress relief structure surrounds the upper chip attach area. The upper reinforcing structure surrounds the upper stress relief structure. A stress relieving ability of the upper stress relief structure is greater than a stress relieving ability of the upper reinforcing structure. A structural strength of the upper reinforcing structure is greater than a structural strength of the upper stress relief structure.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: September 7, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Shun Sing Liao