Patents Examined by Carl Arbes
-
Patent number: 9437347Abstract: The invention is achieved by applying a layer of the mixture that contains polymer and conductive particles over a first surface, when the mixture has a first viscosity that allows the conductive particles to rearrange within the layer. An electric field is applied over the layer, so that a number of the conductive particles are aligned with the field and thereafter the viscosity of the layer is changed to a second, higher viscosity, in order to mechanically stabilize the layer. This leads to a stable layer with enhanced and anisotropic conductivity that can be used in the manufacture of ESD devices.Type: GrantFiled: June 22, 2010Date of Patent: September 6, 2016Assignee: CONDALIGN ASInventors: Eldrid Svasand, Mark Buchanan, Matti Knappila, Geir Helgesen, Arnulf Maeland
-
Patent number: 9439300Abstract: An electronic component is provided with two or more component terminals. A mount board is provided with two or more board terminals. The board terminal is provided with an inclined portion on a surface of the board terminal, the inclined portion being the wider as closer to a base end side toward a peripheral edge. A position of the component terminal is offset in relation to a position of the corresponding board terminal. A position of the other component terminal is offset in the opposite side to the direction of the offset in relation to a position of the corresponding board terminal. The component terminal makes contact with the inclined portion of the board terminal to bond the component terminal and the board terminal.Type: GrantFiled: January 17, 2014Date of Patent: September 6, 2016Assignee: RICOH COMPANY, LTD.Inventor: Yuichi Tanida
-
Patent number: 9431274Abstract: Embodiments of the present disclosure are directed to techniques and configurations for an integrated circuit (IC) package having an underfill layer with filler particles arranged in a generally random distribution pattern. In some embodiments, a generally random distribution pattern of filler particles may be obtained by reducing an electrostatic charge on one or more components of the IC package assembly, by applying a surface treatment to filler to reduce filler electrical charge, by applying an electric force against the filler particles of the underfill material in a direction opposite to a direction of gravitational force, by using an underfill material with a relatively low maximum filler particle size, and/or by snap curing the underfill layer at a relatively low temperature. Other embodiments may be described and/or claimed.Type: GrantFiled: December 20, 2012Date of Patent: August 30, 2016Assignee: Intel CorporationInventors: Suriyakala Ramalingam, Manish Dubey, Hsin-Yu Li, Michelle S. Phen, Hitesh Arora, Nisha Ananthakrishnan, Yiqun Bai, Yonghao Xiu, Rajendra C. Dias
-
Patent number: 9431740Abstract: A method of assembling an electrical terminal having a base and a spring member. The base is provided with a plurality of base beams. The spring member is provided with a plurality of spring beams. The spring member defines an axis such that the plurality of spring beams is spaced radially apart from the axis. The spring beams deflected radially outwardly. The base is inserted in the spring member to position the base beams adjacent to the spring beams. The spring beams are released such that the spring beams retract radially inwardly against the base beams.Type: GrantFiled: June 20, 2014Date of Patent: August 30, 2016Assignee: Lear CorporationInventors: Michael Glick, Slobodan Pavlovic, Tulasi Sadras-Ravindra
-
Patent number: 9433105Abstract: An electrically insulating substrate is provided. The electrically insulating substrate includes a set of areas to be formed into a set of printed circuit boards. Each of the set of areas is separated from others of the set of areas by a dicing channel. A set of signal wiring conductors is fabricated onto the set of areas of the electrically insulating substrate so that at least one of the set of signal wiring conductors terminates proximate to the dicing channel. A set of plated through holes is fabricated through at least one of the set of areas such that at least one of the set of plated through holes connects to at least one of the set of signal wiring conductors. The electrically insulating substrate is singulated along a set of singulation lines to form the set of printed circuit boards. The singulation lines intersect with the plated through holes, so that a portion of the plated through holes is exposed along the peripheral edge of the resulting printed circuit boards.Type: GrantFiled: August 25, 2009Date of Patent: August 30, 2016Assignee: International Business Machines CorporationInventors: Richard Stephen Graf, Thomas Edward Lombardi, Sudipta Kumar Ray, David Justin West
-
Patent number: 9431883Abstract: A method of manufacturing a laminated core, having a laminated core body 10a formed by laminating plural core sheets 11 and having magnet insertion holes 13, 14 with openings 17, 18 opening to a inner space 15 or an external side, inserting and resin-sealing permanent magnets 20, 21 in the magnet insertion holes 13, 14, with the openings 17, 18 blocked by a blocking member 23, the method including: temporarily connecting blocking member pieces 32 to be the blocking member 23 in each of the core sheets 11 and removing the blocking member 23 with the laminated core body 10a resin-sealed. By this, without a special blocking member, the permanent magnets 20, 21 are resin-sealed while the magnet insertion holes 13, 14, parts of which have the openings 17, 18, are blocked.Type: GrantFiled: May 7, 2012Date of Patent: August 30, 2016Assignee: MITSUI HIGH-TEC, INC.Inventors: Satoshi Matsubayashi, Akira Nagai, Go Kato
-
Patent number: 9431801Abstract: One aspect is a method of coupling a feedthrough assembly to a surrounding case of an implantable medical device. An insulator having a plurality of conducting elements extending therethrough is provided. The insulator is placed with conducting elements within an opening of a case, thereby defining a narrow space between the insulator and the case. A braze preform is placed adjacent the insulator and case in the narrow space. The insulator is heated with a laser until raising the temperature of the adjacent preform above its melting point such that it fills the space between the insulator and the case.Type: GrantFiled: May 24, 2013Date of Patent: August 30, 2016Assignee: Heraeus Deutschland GmbH & Co. KGInventors: Jacob Markham, Ulrich Hausch, Goran Pavlovic
-
Patent number: 9433108Abstract: A method for fabricating a circuit board structure having at least an embedded electronic element is disclosed, which includes the steps of: providing a substrate and embedding at least an electronic element in the substrate with an active surface and a plurality of electrode pads of the electronic element exposed from a surface of the substrate; forming a plurality of conductive bumps on the electrode pads of the electronic element; and covering the surface of the substrate and the active surface of the electronic element with a dielectric layer and a metal layer stacked on the dielectric layer, wherein the conductive bumps penetrate the dielectric layer so as to be in contact with the metal layer, thereby simplifying the fabrication process, reducing the fabrication cost and saving the fabrication time.Type: GrantFiled: December 5, 2013Date of Patent: August 30, 2016Assignee: Unimicron Technology CorporationInventors: Yung-Ching Lin, Chih-Kuie Yang, Ta-Han Lin
-
Patent number: 9429998Abstract: The present disclosure is related to a method of fabricating display panels, especially to a method of fabricating flexible electronic devices. By means of adding an inorganic membrane with surface roughness between a bonding layer and a PI film, in order to effectively improve the dimensional stability of plastic substrate and the water/oxygen barrier property of flexible substrate during the PI film fabrication and the follow-up process, improving the yield of good products and prolonging the working life thereof.Type: GrantFiled: January 10, 2014Date of Patent: August 30, 2016Assignee: EVERDISPLAY OPTRONICS (SHANGHAI) LIMITEDInventors: QiGuo Zhang, ChengPei Huang, ChuWang Huang
-
Patent number: 9426894Abstract: A wiring structure for improving a crown-like defect and a fabrication method thereof are provided. The method includes the following steps. A substrate, on which a seed layer and a patterned photoresist layer with an opening are formed, is provided. A copper layer, having a bottom covering the seed layer, is formed in the opening. A barrier layer covering at least one top portion of the copper layer is formed on the copper layer. An oxidation potential of the barrier layer is greater than that of the copper layer. The patterned photoresist layer is removed to perform an etching process, wherein the copper layer and a portion of the seed layer exposed are etched to form a wiring layer. An immersion process is performed to form an anti-oxidation layer comprehensively on exposed surfaces of the barrier layer and the wiring layer.Type: GrantFiled: May 20, 2014Date of Patent: August 23, 2016Assignee: XINTEC INC.Inventors: Yi-Ming Chang, I-Min Lin, Po-Shen Lin
-
Patent number: 9425384Abstract: A process for manufacturing a high-temperature ultrasonic transducer, said transducer comprising a steel or metal top electrode, a piezoelectric converter, a steel or metal support ensuring the interface between the converter and the propagation medium of the acoustic waves, a first joint between the support and the piezoelectric crystal, and a second joint between the converter and the top electrode, comprises, to produce said gold-and-indium-based joints, a brazing and diffusing operation comprising the following steps: a first step of increasing temperature to a first temperature comprised between about 150° C. and about 400° C. and of maintaining this first temperature for a first length of time corresponding to a first plateau; and a second step of increasing temperature to a second temperature comprised between about 400° C. and about 1000° C. and of maintaining this second temperature for a second length of time corresponding to a second plateau.Type: GrantFiled: June 29, 2012Date of Patent: August 23, 2016Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventor: Christian Lhuillier
-
Patent number: 9426900Abstract: A method includes fabricating a printed circuit board. The fabricating includes forming at least one conductive layer on top a first dielectric layer. The fabricating includes forming a second dielectric layer on top of the at least one conductive layer. The fabricating includes forming a thermal pad on top of the second dielectric layer. The fabricating includes forming a first through hole through the thermal pad, the second dielectric layer, the at least one conductive layer, and the first dielectric layer. The fabricating includes filling the first through hole with a conductive material to form a plated through hole. The fabricating includes topdrilling the plated through hole to remove a top portion of the conductive material from a top of the plated through hole, wherein a bottom portion of the conductive material remains in the plated through hole after removal of the top portion.Type: GrantFiled: November 13, 2013Date of Patent: August 23, 2016Assignee: GLOBALFOUNDRIES, Inc.Inventor: Phillip D. Isaacs
-
Patent number: 9419399Abstract: A crimping station with a crimping press for producing a crimp connection, the crimping press including a drivable press part movable in vertical direction, with which a cable end of a cable can be connected with a crimp contact, a gripper for supplying the cable end to the crimping press, and a positioning unit for vertically positioning the cable end at the crimping press. During the process of moving the press part the gripper is moved by the positioning unit between a starting position and an end position. The positioning unit is connected via a variable gearbox with the press part whereby during the moving of the press part, the positioning unit is moved in relation to the press part at a speed reduced by a reduction ratio of the gearbox, and the reduction ratio can be adjusted by an adjusting device.Type: GrantFiled: February 6, 2014Date of Patent: August 16, 2016Assignee: Komax Holding AGInventor: Stefan Viviroli
-
Patent number: 9420689Abstract: A circuitized substrate which utilizes at least one internal (embedded) resistor as part thereof, the resistor comprised of a material including resin and a quantity of powders of nano-particle and/or micro-particle sizes. The resistor serves to decrease the capacitance in the formed circuit while only slightly increasing the high frequency resistance, thereby improving circuit performance through the substantial elimination of some discontinuities known to exist in structures like these. An electrical assembly (substrate and at least one electrical component) is also provided.Type: GrantFiled: October 20, 2009Date of Patent: August 16, 2016Assignee: i3 Electronics, Inc.Inventors: Rabindra N. Das, Michael J. Rowlands
-
Patent number: 9413145Abstract: A method for producing a low-induction busbar including providing a tray with a base and a border which projects peripherally from the base so as to form a frame and which is composed of an electrically insulating material, producing a busbar element by arranging a first busbar strips, applying a film with openings which provide access to the first busbar strips, arranging the second busbar strips, on the film, bending regions of the busbar strips forming connections making electrical contact with the capacitors through the openings, inserting the busbar element into the tray and pouring an encapsulation compound into the tray so as to surround the base of the capacitors, while leaving free the connections.Type: GrantFiled: August 3, 2012Date of Patent: August 9, 2016Inventor: Peter Fischer
-
Patent number: 9409011Abstract: An implantable electrode array assembly configured to apply electrical stimulation to the spinal cord. A substantially electrically nonconductive layer of the device has a first portion positionable alongside the spinal cord that includes a plurality of first openings. The layer has a second portion that includes a plurality of second openings. Electrodes and traces are positioned inside a peripheral portion of a body portion of the device and alongside the layer. At least one of the first openings is adjacent each of the electrodes to provide a pathway through which the electrode may provide electrical stimulation to the spinal cord. At least one of the second openings is adjacent each of the traces to provide a pathway through which the trace may receive electrical stimulation. At least one trace is connected to each electrode and configured to conduct electrical stimulation received by the trace(s) to the electrode.Type: GrantFiled: June 30, 2014Date of Patent: August 9, 2016Assignees: California Institute of Technology, University of Louisville Research Foundation, Inc., The Regents of the University of CaliforniaInventors: Yu-Chong Tai, Mandheerej S. Nandra, Joel W. Burdick, Damien Craig Rodger, Andy Fong, Victor Reggie Edgerton, Roland R. Roy, Yury Gerasimenko, Igor Lavrov, Susan J. Harkema, Claudia A. Angeli
-
Patent number: 9403211Abstract: A method for equipping a film material with at least one electrically conductive conductor structure, wherein a dispersion containing metallic nanoparticles in the form of a conductor structure is applied to a thermostable transfer material and the metallic nanoparticles are sintered to form an electrically conductive conductor structure. The electrically conductive conductor structure of sintered metallic nanoparticles is then transferred from the thermostable transfer material to the non-thermostable film material. A method for producing a laminate material using the film material using at least one electrically conductive conductor structure, and to the corresponding film material and laminate material are described.Type: GrantFiled: April 19, 2011Date of Patent: August 2, 2016Assignee: GIESECKE & DEVRIENT GmbHInventor: Ando Welling
-
Patent number: 9396844Abstract: To reduce the total stock of external parts in an assembling factory of a wire harness and to provide a wire harness manufacturing device including a wiring board that wires a plurality of electric wires and a molding machine that forms external parts attached to the plurality of electric wires in the assembling factory of the wire harness, a wire harness manufacturing device 1 includes a molding machine 2 that forms external parts 31, 32, 33, 35 and 44 attached to a wire harness 20 and a wiring board 3 having a binding device that wires a plurality of electric wires 40 to a prescribed form.Type: GrantFiled: June 7, 2013Date of Patent: July 19, 2016Assignee: YAZAKI CORPORATIONInventors: Masataka Yamamoto, Takehiko Uehara, Yoshihiro Murakami, Masahiro Sora
-
Patent number: 9392693Abstract: An exemplary printed circuit board includes a base, solder pads, and signal traces. The base includes outer surfaces. The signal traces having a first height relative to the base are formed on the outer surface of the base. The solder pads having a second height relative to the base are formed on the same surface having the signal traces. The first height of the signal trace is greater than the second height of the solder pad. Exemplary methods for manufacturing the printed circuit board are also provided.Type: GrantFiled: October 24, 2013Date of Patent: July 12, 2016Assignee: SHUNSIN TECHNOLOGY (ZHONG SHAN) LIMITEDInventor: Ai-Hua Liang
-
Patent number: 9387633Abstract: An encapsulated electronic device includes a magnetically permeable core structure which is exposed within and coplanar with a flat top surface of the device. A bottom surface of the core may be exposed within the bottom surface of the device. The bottom core surface may be recessed beneath, coplanar with, or protruding from the bottom surface of the device. Alternatively the bottom surface may be encapsulated within the device. A method for manufacturing the exposed core package includes positioning a first component relative to a second component before encapsulating the device. An improved planar magnetic core structure includes internal bevels having a radius greater than or equal to 15% and preferably 25%, 35%, or as much as 50% of the core thickness to reduce concentration of the magnetic field around the internal corners.Type: GrantFiled: April 22, 2013Date of Patent: July 12, 2016Assignee: VI Chip, Inc.Inventors: Patrizio Vinciarelli, Michael B. LaFleur