Abstract: A high-voltage electronic switch includes first and second transistors defining a current flow path between an input and output of the switch. The transistors have a common point of the current flow path and a common control terminal. A control circuit includes a voltage line receiving a limit operating voltage and first and second branches coupled between the voltage line and the common point and common control terminal, respectively. Further transistors are activated, upon turning-off of the first and second transistors, for coupling the branches to the voltage line. The branches include a parallel connected resistor, diode, and string of diodes with opposite polarities. The diode of the first branch plus string of diodes of the second branch and diode of the second branch plus string of diodes of the first branch provide coupling paths between the voltage line and, respectively, the common point and common control terminal.

Abstract: A Phase-Locked Loop (PLL) has a multi-curve voltage-controlled oscillator (VCO) with a curve-select input that adjusts the capacitance within the VCO and thus the VCO gain. A calibration unit generates a curve-select value to the VCO. Coarse calibration selects a Center Curve CC value using binary search of the curve-select bits. During fine calibration, the number of pulses of the VCO output are counted and stored for all curves in a target window around the center curve. The stored pulse counts are compared to an ideal pulse count for a specified frequency, and the curve-select value for the closest-matching pulse count is applied to the VCO. The target window is much smaller than all possible curves, so calibration is performed only on a few curves, reducing calibration time. A switch before the VCO opens the loop for faster open-loop calibration. Pulses are counted digitally without expensive analog comparators.

Abstract: A magnetoresistive effect device includes at least one magnetoresistive effect element including a magnetization fixed layer, a spacer layer, and a magnetization free layer, a first port, a second port, a first signal line which is connected to the first port and through which high-frequency current corresponding to a high-frequency signal input into the first port flows, a second signal line, and a direct-current input terminal. The magnetoresistive effect element is arranged so that a high-frequency magnetic field occurring from the first signal line is applied to the magnetization free layer. The magnetoresistive effect element is connected to the second port via the second signal line. The direct-current input terminal is connected to the magnetoresistive effect element.

Abstract: Provides is a variable capacitance circuit that is capable of efficiency optimizing antenna transmission effectively by regulating capacitance values of variable capacitance capacitors with use of direct current voltages applied to the variable capacitance capacitors. A variable capacitance circuit (1) includes a series variable capacitance element (2) and a parallel variable capacitance element (4) connected in series with the series variable capacitance element (2). The series variable capacitance element (2) includes two variable capacitance capacitors (CS1, CS2) (2a, 2b) connected in series. The parallel variable capacitance element (4) includes two variable capacitance capacitors (CP1, CP2) (4a, 4b) connected in series and a variable capacitance capacitor (CP3)(6) connected in parallel with the variable capacitance capacitors (CP1, CP2) (4a, 4b). The variable capacitance circuit (1) further includes three direct current terminals (7a, 7b, 7c).

Abstract: A buffer circuit may include an amplification circuit, a main load circuit, and a sub-load circuit. The amplification circuit and the main load circuit may generate first and second output signals by amplifying first and second input signals. The sub-load circuit may compensate mismatch between rising timing and falling timing of the first output signal based on the first input signal.

Abstract: A self-checking emergency light unit includes a power input terminal coupleable to an external power supply for receiving power therefrom, an illumination circuit coupled to the power input terminal, a discharge circuit coupled to the emergency power source, and an operational check module coupled to the emergency power source.

Abstract: A radio frequency (RF) energy harvesting device including a scalable metamaterial resonator antenna and a rectifying circuit formed on a flexible plastic substrate. The metamaterial resonator antenna includes a metal (e.g., silver) structure that is conformally fixedly disposed (i.e., either printed or deposited/etched) on the flexible substrate and configured to resonate at RF frequencies using primary and secondary antenna segments connected by linking segments such that captured RF signals are generated at two antenna end points that are 180° out-of-phase with each other. The rectifying circuit including additional metal structures that are also printed or otherwise formed on the flexible substrate, and one or more circuit elements that are configured to pass positive voltage pulses from the captured RF signals to an output node. Various metamaterial resonator antenna configurations are disclosed.

Abstract: This disclosure relates to methods and devices for generating electron dense air plasmas at atmospheric pressures. In particular, this disclosure relate to self-contained toroidal air plasmas. Methods and apparatuses have been developed for generating atmospheric toroidal air plasmas. The air plasmas are self-confining, can be projected, and do not require additional support equipment once formed.

Abstract: An apparatus for synchronizing operation of one or more appliances to an amount of energy produced by a local power generator comprises a controller for reducing the power consumed by the one or more appliances in relation to an amount of power being generated by the local power generator. In one embodiment, the operation of the appliance(s) is controlled by the controller so that the system of appliance(s) and the local power generator does not consume any external energy (e.g., from a commercial power grid), despite variations in the amount of power delivered by the local power generator.

Abstract: A power storage device includes an outer casing and two battery units housed in the outer casing. Each battery unit includes a battery casing formed with a top casing and a bottom casing. The battery casing houses a battery block group in which battery lines are arranged in parallel in a direction substantially perpendicular to the battery line extending direction, and are arranged like stacked straw bags. The battery casing also houses partition plates that are inserted between adjacent battery lines facing one another, and are secured between the top casing and the bottom casing.

Abstract: A method of controlling a plurality of DC/AC converters in cascade configuration, each being arranged to receive an input direct current and voltage from a respective photovoltaic panel and to deliver an electric output. The method includes receiving information representing at least one of frequency, phase, amplitude and harmonics of a required AC, and receiving information on the input direct current and voltage to each one of the plurality of DC/AC converters. Based on the received information, each one of the plurality of DC/AC converters is individually controlled in such manner that the combined output from the plurality of DC/AC converters produces an AC matching the required AC.

Abstract: A circuit that detects the power supply voltage requirement of each voltage domain in an IC includes 1) a ring oscillator in each voltage domain, and 2) a power module. Two different circuit implementations of the power module may provide a precise reference voltage to on-chip voltage regulators (LDO or DC-DC switching buck converter). The power module supports DVFS and can provide the desired power supply voltage for advanced CMOS technology nodes (45 nm and beyond) in less than 100 ns. The voltage detection circuit clamps the voltage to the desired level to address power supply voltage variations due to PVT and ageing. The proposed technique has minimal power and area overhead to compensate for the power supply voltage variation, thus reducing power supply voltage margins which yields higher power saving.

Abstract: A processing apparatus includes a detector, a control section, and the processing section. The detector is configured to detect a position of a device which is a target of a process. The control section is configured to determine a priority of the device based on determining, using the position of the device, whether or not the device is moved according to a predetermined movement pattern. The processing section is configured to perform the process on the device based on the priority of the device.

Abstract: Apparatuses are provided for a quadra-phase clock signal generator. An example apparatus includes a first delay circuit configured to receive a first input clock signal generating a first delayed clock signal. A first phase mixer is provided communicatively coupled to the first delay circuit and configured to receive the first delayed clock signal at a first input and a second input clock signal at a second input. The first phase mixer may then generate a first output clock signal at a first output node responsive, at least in part, to mixing of the first delayed clock signal and the second input clock signal.

Abstract: Embodiments described herein include a quadrature phase corrector (QPC) which includes multiple differential amplifies for correcting the phase of one or more clock signals. In one embodiment, the differential amplifiers are arranged in an input stage, cross-coupled stage, and ring stage. The input stage receives and buffers the input clock signal (or signals). The cross-coupled stage includes one or more latches that force one clock signal high and another low which causes the QPC to oscillate. The ring stage outputs four clock signals with adjusted phases relative to the input clock signals. In one example, the ring stage outputs a quadrature clock signal that includes four clock signals phase shifted by 90 degrees.

Abstract: Articles and related methods, the article having an enclosed area at least partially surrounded by a visible light-transmissive protective film comprising a first visible light-transmissive flexible film, a second visible light-transmissive flexible film, and a visible light-transmissive patterned conductive layer interposed between the first visible light-transmissive flexible film and the second visible light-transmissive flexible film, the visible light-transmissive conductive layer comprising a dispersion of metal nanowires within a polymeric matrix having an average pore size among metal nanowires that is impenetrable by electromagnetic radiation having a wavelength greater than 1 mm.

Abstract: A circuit for controlling a collector current of a substrate bipolar junction transistor (BJT) is provided. The circuit includes a first current mirror configured to generate a first mirroring base current corresponding to a replicate current of a base current of the substrate BJT, a current transmitter configured to transmit the first mirroring base current, a second current mirror configured to generate a second mirroring base current corresponding to a replicate current of the first mirroring base current received from the current transmitter and configured to supply the second mirroring base current to an emitter of the substrate BJT, and a current source configured to supply a drive current corresponding to a collector current of the substrate BJT to the emitter of the substrate BJT.

Abstract: The invention relates to devices and methods of maintaining the current starved delay at a constant value across variations in voltage and temperature to increase the speed of operation of the sequential logic in the radiation hardened ASIC design.

Abstract: Nanoscale efuses, antifuses, and planar coil inductors are disclosed. A copper damascene process can be used to make all of these circuit elements. A low-temperature copper etch process can be used to make the efuses and efuse-like inductors. The circuit elements can be designed and constructed in a modular fashion by linking a matrix of metal columns in different configurations and sizes. The number of metal columns, or the size of a dielectric mesh included in the circuit element, determines its electrical characteristics. Alternatively, the efuses and inductors can be formed from interstitial metal that is either deposited into a matrix of dielectric columns, or left behind after etching columnar openings in a block of metal. Arrays of metal columns also serve a second function as features that can improve polish uniformity in place of conventional dummy structures. Use of such modular arrays provides flexibility to integrated circuit designers.

Abstract: The invention provides an array substrate and activation method for TFT elements in the array substrate. The array substrate comprises a shielding metal layer (10) and a TFT layer (20) disposed on the shielding metal layer (10); by connecting the shielding metal blocks (11) on the shielding metal layer (10) to electricity to heat up the shielding metal blocks (11) for pre-heating the TFT layer (20) to accelerate activating the TFT elements in the TFT layer (20). The activation method, by connecting the shielding metal blocks (11) on the shielding metal layer (10) to electricity to heat up the shielding metal blocks (11) for pre-heating the TFT layer (20) before activating the TFT elements in the TFT layer (20), accelerates activating the TFT elements in the TFT layer (20). The method is applicable to activating the TFT elements in array substrate in low temperature environment.