Abstract: A semiconductor device and method of manufacturing the same are provided. A device can include an LDMOS region and a high side region on a semiconductor substrate. The device can further include an insulating region separating the LDMOS region from the high side region and the insulating region can include a plurality of second conductive type wells, a plurality of second conductive type buried layer patterns, or both.

Abstract: In one embodiment, a method of manufacturing a semiconductor device includes oxidizing a substrate to form local oxide regions that extend above a top surface of the substrate. A membrane layer is formed over the local oxide regions and the top surface of the substrate. A portion of the substrate under the membrane layer is removed. The local oxide regions under the membrane layer is removed.

Abstract: A display apparatus and an organic display apparatus are disclosed. In one aspect, the display apparatus includes a display substrate divided into a display region for displaying an image via a plurality of pixels for emitting light and a non-display region around the display region. It includes a pad unit formed on the non-display region. It also includes a fan-out unit for connecting the display region and the pad unit. It further includes a plurality of line groups sequentially formed, wherein each line group includes a first fan-out line, a second fan-out line insulated from the first fan-out line by a first insulating layer, and a third fan-out line insulated from the second fan-out line by a second insulating layer, and wherein the third fan-out line at least partially overlaps with at least one of the first and second fan-out lines.

Abstract: A semiconductor component is provided with a semiconductor substrate, in the upper face of which an active region made of a material of a first conductivity type is introduced by ion implantation. A semiconducting channel region having a defined length and width is designed within the active region. Each of the ends of the channel region located in the longitudinal extension is followed by a contacting region made of a semiconductor material of a second conductivity type. The channel region is covered by an ion implantation masking material, which comprises transverse edges defining the length of the channel region and longitudinal edges defining the width of the channel region and which comprises an edge recess at each of the opposing transverse edges aligned with the longitudinal extension ends of the channel region, the contacting regions that adjoin the channel region extending all the way into said edge recess.

Abstract: A lighting element, comprising: a first substrate; a first and second conductive elements located on the first substrate; a light-emitting element having first and second contacts that are both on a first surface of the light-emitting element, the first contact being electrically connected to the first conductive element, the second contact being electrically connected to the second conductive element, and the light-emitting element emitting light from a second surface opposite the first surface; a top layer adjacent to the second surface; and an affixing layer located between the first substrate and the top layer, the affixing layer affixing the top layer to the first substrate; and a heat spreading layer having a third surface and a fourth surface opposite the third surface, the heat spreading layer being affixed beneath the first flexible substrate at the third surface, wherein the flexible top layer is substantially transparent to light.

Abstract: A method for manufacturing a chip arrangement in accordance with various embodiments may include: placing a chip on a carrier within an opening of a metal structure disposed over the carrier; fixing the chip to the metal structure; removing the carrier to thereby expose at least one contact of the chip; and forming an electrically conductive connection between the at least one contact of the chip and the metal structure.

Abstract: A microelectronic assembly may include a substrate containing a dielectric element having first and second opposed surfaces. The dielectric element may include a first dielectric layer adjacent the first surface, and a second dielectric layer disposed between the first dielectric layer and the second surface. A Young's modulus of the first dielectric layer may be at least 50% greater than the Young's modulus of the second dielectric layer, which is less than two gigapascal (GPa). A conductive structure may extend through the first and second dielectric layers and electrically connect substrate contacts at the first surface with terminals at the second surface. The substrate contacts may be joined with contacts of a microelectronic element through conductive masses, and a rigid underfill may be between the microelectronic element and the first surface. The terminals may be usable to bond the microelectronic assembly to contacts of a component external to the microelectronic assembly.

Abstract: Various embodiments of light emitting devices with efficient wavelength conversion and associated methods of manufacturing are described herein. In one embodiment, a light emitting device includes a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The active region is configured to produce a light via electroluminescence. The light emitting device also includes a conversion material on the second semiconductor material, the conversion material containing aluminum gallium indium phosphide (AlGaInP) doped with an N-type dopant.

Abstract: High-density semiconductor memory is provided with enhancements to gate-coupling and electrical isolation between discrete devices in non-volatile memory. The intermediate dielectric between control gates and charge storage regions is varied in the row direction, with different dielectric constants for the varied materials to provide adequate inter-gate coupling while protecting from fringing fields and parasitic capacitances. Electrical isolation is further provided, at least in part, by air gaps that are formed in the column (bit line) direction and/or air gaps that are formed in the row (word line) direction.

Abstract: An epitaxial substrate for electronic devices, in which current flows in a lateral direction and of which warpage configuration is properly controlled, and a method of producing the same. The epitaxial substrate for electronic devices is produced by forming a bonded substrate by bonding a low-resistance Si single crystal substrate and a high-resistance Si single crystal substrate together; forming a buffer as an insulating layer on a surface of the bonded substrate on the high-resistance Si single crystal substrate side; and producing an epitaxial substrate by epitaxially growing a plurality of III-nitride layers on the buffer to form a main laminate. The resistivity of the low-resistance Si single crystal substrate is 100 ?·cm or less, and the resistivity of the high-resistance Si single crystal substrate is 1000 ?·cm or more.

Abstract: Integrated circuit (IC) packages with an inter-die thermal spreader are disclosed. A disclosed IC package includes a plurality of stacked dies disposed on a package substrate. A heat spreader is disposed on a top die of the plurality of stacked dies. The IC package further includes a thermal spreader layer disposed adjacent to at least one die of the plurality of stacked dies. The thermal spreader layer may extend out of a periphery of the plurality of stacked dies and may be attached to the heat spreader through a support member.

Abstract: A light emitting device package is provided. The light emitting device package comprises a package body comprising a first cavity, and a second cavity connected to the first cavity; a first lead electrode, at least a portion of which is disposed within the second cavity; a second lead electrode, at least a portion of which is disposed within the first cavity; a light emitting device disposed within the second cavity; a first wire disposed within the second cavity, the first wire electrically connecting the light emitting device to the first lead electrode; and a second wire electrically connecting the light emitting device to the second lead electrode.

Abstract: In various embodiments, a photodetector includes a semiconductor substrate and a plurality of pixel regions. Each of the plurality of pixel regions comprises an optically sensitive layer over the semiconductor substrate. A pixel circuit is formed for each of the plurality of pixel regions. Each pixel circuit includes a pinned photodiode, a charge store, and a read out circuit for each of the plurality pixel regions. The optically sensitive layer is in electrical communication with a portion of a silicon diode to form the pinned photodiode. A potential difference between two electrodes in communication with the optically sensitive layer associated with a pixel region exhibits a time-dependent bias; a biasing during a first film reset period being different from a biasing during a second integration period.

Abstract: Various embodiments of light emitting devices with high quantum efficiencies are described herein. In one embodiment, a light emitting device includes a first contact, a second contact spaced apart from the first contact, and a first active region between the first and second contacts. The first active region is configured to produce a first emission via electroluminescence when a voltage is applied between the first and second contacts, and the first emission having a first center wavelength. The light emitting device also includes a second active region spaced apart from the first active region. The second active region is configured to absorb at least a portion of the first emission and produce a second emission via photoluminescence, and the second emission having a second center wavelength longer than the first center wavelength.

Abstract: The present invention discloses a diode and a manufacturing method thereof and a display apparatus. The diode comprises a composite anode, a transparent metal oxide layer, a basic stack layer, and a composite cathode. The composite anode comprises a transparent anode layer and a first transparent metal layer. The first transparent metal layer is formed on the transparent anode layer. The transparent metal oxide layer is formed on the first transparent metal layer. The basic stack layer is formed on the transparent metal oxide layer. The composite cathode comprises two second transparent metal layers. The two second transparent metal layers are formed on the basic stack layer. Both transmittance and efficiency of the diode are significantly improved. The reliability of the diode is improved to elongate the lifetime of the diode.

Abstract: A semiconductor device has a semiconductor wafer with a plurality of semiconductor die including a plurality of contact pads. An insulating layer is formed over the semiconductor wafer and contact pads. An under bump metallization (UBM) is formed over and electrically connected to the plurality of contact pads. A mask is disposed over the semiconductor wafer with a plurality of openings aligned over the plurality of contact pads. A conductive bump material is deposited within the plurality of openings in the mask and onto the UBM. The mask is removed. The conductive bump material is reflowed to form a plurality of bumps with a height less than a width. The plurality of semiconductor die is singulated. A singulated semiconductor die is mounted to a substrate with bumps oriented toward the substrate. Encapsulant is deposited over the substrate and around the singulated semiconductor die.

Abstract: A microelectronic package includes a microelectronic unit and a substrate. The microelectronic unit includes a microelectronic element having contacts on a front face. A dielectric material has a first surface substantially flush with the front face of the microelectronic element. Conductive traces have at least portions extending along the front face away from the contacts, at least some of which also extend along the first surface of the dielectric material. Contacts are connected with the traces, at least some of which are disposed at the first surface of the dielectric material. The substrate has first and second opposed surfaces and an edge extending therebetween, the first surface facing the front face of the microelectronic unit, and the second surface having a plurality of terminals thereon configured for electrical connection with at least one external component. Masses of conductive matrix material join the terminals with the redistribution contacts.

Abstract: A semiconductor device includes an IGBT, a constant voltage circuit, and protection Zener diodes. The IGBT makes/breaks a low-voltage current flowing in a primary coil. The constant voltage circuit and the protection Zener diodes are provided between an external gate terminal and an external collector terminal. The constant voltage circuit supplies a constant gate voltage to the IGBT to thereby set a saturation current value of the IGBT to a predetermined limiting current value. The IGBT has the saturation current value in a limiting current value range of the semiconductor device.

Abstract: An object of the invention is to provide a method for producing a conductive member having low electrical resistance, and the conductive member is obtained using a low-cost stable conductive material composition that does not contain an adhesive. In the semiconductor device, silver arranged on a semiconductor element and silver arranged on a base are bonded. No void is present or a small void, if any, is present at an interface between the semiconductor element and the silver arranged on the semiconductor element, no void is present or a small void, if any, is present at an interface between the base and the silver arranged on the base, and one or more silver abnormal growth grains and one or more voids are present in a bonded interface between the silver arranged on the semiconductor element and the silver arranged on the base.

Abstract: A display apparatus including an organic light emitting display including a terminal portion, a battery disposed on a surface of the organic light emitting display, and a flexible printed circuit board (PCB) bent to cover the organic light emitting display and the battery, a side of the flexible PCB being connected to the terminal portion and another side of the flexible PCB extending outside and attached to the battery.