Patents Examined by Cheri Harrington
  • Patent number: 9760150
    Abstract: A method of entering a power conservation state comprises selecting and entering one of a plurality of low power states for the computer system in response to a detected system idle event. The plurality of low power states comprise a first low power state and a second low power state for the computer system. A memory of the computer system is self refreshed during the first low power state. A baseband module of the computer system remains powered, and the memory is accessible to the baseband module during the second low power state. The one low power state is selected depending upon baseband module activity. The method also includes exiting from the one of a plurality of low power states when a wake event is detected.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: September 12, 2017
    Assignee: NVIDIA Corporation
    Inventors: Sagheer Ahmad, Pete Cumming, Brad Simeral, Matthew Longnecker, Sudeshna Guha
  • Patent number: 9740235
    Abstract: An interface adapter for facilitating the data communication among computation modules in a Network-on-Chip SoC comprises 1) a FIFO block having certain number of storage cells for temporarily storing the data to be transported between two communicating modules; 2) a TAF-DPS clock generator and a multi-phase generator attached at the FIFO write side for generating the write clock for FIFO and the driving clock for the transmitter, a TAF-DPS clock generator and a multi-phase generator attached at the FIFO read side for generating the read clock for FIFO and the driving clock for the receiver; 3) a write pointer controller and a read pointer controller for reading the FIFO status and controlling the TAF-DPS clock generators at the write side and at the read side, respectively. A design scheme of using said interface adapters in Network-on-Chip SoC design includes a plurality of computation modules, routing modules, said interface adapters, a network of communication link, a network of global clock distribution.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: August 22, 2017
    Inventor: Liming Xiu
  • Patent number: 9733690
    Abstract: According to an embodiment, a communication device includes a register and a controller. The register receives data from an external device via an input data line. In a first state in which the communication device is able to receive the data, when a condition in which the data is not sent to the input data line continues for a certain period of time, the controller controls to switch state of the communication device to a second state in which power consumption is less than in the first state.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: August 15, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Koichi Fujisaki, Tetsuro Kimura, Tatsunori Kanai, Junichi Segawa, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Yusuke Shirota, Akihiro Shibata, Shiyo Yoshimura
  • Patent number: 9721104
    Abstract: A measured boot process for an electronic device includes taking a measurement of the early system start up instructions of the electronic device upon a reboot or start-up of the device. A representation of the measurement is stored in a trusted platform module of the electronic device prior to initialization of the trusted platform module. Access is granted to the representation of the measurement stored in the trusted platform module prior to initialization of the trusted platform module thereby enabling the representation of the measurement to serve as the core root of trust for measurement.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: August 1, 2017
    Assignee: Intel Corporation
    Inventors: Daniel Nemiroff, Ben Furman
  • Patent number: 9690596
    Abstract: Approaches for firmware-based runtime operating system switch. UEFI firmware receives a request to switch an active operating system on a device from a first operating system to a second operating system. The UEFI firmware changes the operational state of the first operating state to an ACPI S3 state. The UEFI firmware performs a set of ACPI S3 resume boot path operations on the second operating system to cause the second operating system to become the active operating system. The set of ACPI S3 resume boot path operations may be performed while the second operating system is loaded into a memory area inaccessible to the first operating system and the first operating system remains in the ACPI S3 state.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: June 27, 2017
    Assignee: Phoenix Technologies Ltd.
    Inventor: Franklin Chuang
  • Patent number: 9678554
    Abstract: A power management circuit is provided. The power management circuit includes a power switch, a current/voltage detector, a current setting unit, and a control unit. The power switch is coupled to a power supply of the computer system. When the power switch is turned on, it supplies an output current and an output voltage of the power supply to an external device. The current/voltage detector detects the magnitudes of the output current and the output voltage. The current setting unit sets a plurality of current thresholds. When the computer system is in a power-saving state and when the output current is greater than a first current threshold and smaller than a second current threshold or the output voltage is smaller than a first voltage threshold and larger than a second voltage threshold, the control unit issues a notification signal to execute a predetermined operation on the power supply.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 13, 2017
    Assignee: Nuvoton Technology Corporation
    Inventors: Chun-Yi Wu, Ping-Ying Chu, Shih-Hsuan Yen, Shih-Hsuan Hsu
  • Patent number: 9628764
    Abstract: An electronic device includes: a storage battery; a residual quantity detection section that detects an electrical storage residual quantity of the storage battery; a setting member for receiving an input of a user setting including a plurality of options; a permission/prohibition deciding member that decides whether or not selection of each of the options corresponding to the user setting received by the setting member is permitted on the basis of the electrical storage residual quantity detected by the residual quantity detection section; and an indicating member that indicates an option which is prohibited from being selected by the permission/prohibition deciding member and an option which is permitted to be selected by the permission/prohibition deciding member so that each of the option prohibited from being selected and the option permitted to be selected is distinguishable.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: April 18, 2017
    Assignee: CASIO COMPUTER CO., LTD.
    Inventor: Takeo Ishizu
  • Patent number: 9619377
    Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: April 11, 2017
    Assignee: Apple Inc.
    Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
  • Patent number: 9535484
    Abstract: Methods of extending runtime with battery ripple cancellation in a CPU based system by providing a CPU that includes an input pin capable of throttling the power consumed by the CPU responsive to the input of a throttling signal, sensing a ripple in the form of a decrease in voltage or an increase in current responsive to a load on a CPU power supply, and when the ripple exceeds a predetermined limit, providing a throttling signal to the input pin to throttle the CPU to reduce the ripple.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: January 3, 2017
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Jason Allen Wortham
  • Patent number: 9529403
    Abstract: A method and apparatus for providing telemetry for use in power control functions is disclosed. A system includes an integrated circuit (IC) having a first power management circuit. The IC also includes a number of functional circuit blocks within a number of different power domains. A second power management circuit is implemented external to the IC and includes a number of voltage regulators. Each of the power domains is coupled to receive power from one voltage regulators. During operation, the first power management circuit may send commands requesting the change of one or more voltages provided to the IC. The second power management circuit may respond by performing the requested voltage change(s), and may also provide telemetry data to the first power management circuit. The second power management circuit may also provide telemetry data responsive to receiving a no operation command from the first power management circuit.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: December 27, 2016
    Assignee: Apple Inc.
    Inventors: Manu Gulati, Parin Patel, Keith Cox, Derek Iwamoto, Cyril de la Cropte de Chanterac, Christopher J. Young
  • Patent number: 9477300
    Abstract: A bridging device and a power saving method thereof are disclosed. When a bridging chip of the bridging device receives a power saving command transferred from a host and thereby enters a power saving state, a voltage converter of the bridging device is disabled accordingly and a selection circuit selects to couple a bus voltage to the bridging chip to power the bridging chip. The bus voltage is transferred from the host through a power pin of a connector of the bridging device. The connector is coupled to the host.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: October 25, 2016
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Yen-Chang Chen, Hui-Chih Lin
  • Patent number: 9459682
    Abstract: A method includes receiving, at a first connectivity device, a first wake-up signal from an electronic device associated with a first class of devices. The first connectivity device is coupled to provide communications between the electronic device and a gateway device that provides access to an external network. The method includes determining a length of time that the first connectivity device is to remain in an active power mode based on a usage pattern defined for the first class of devices. The method includes updating the first connectivity device to be in the active power mode for at least the length of time.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: October 4, 2016
    Assignee: QUALCOMM Incorporated
    Inventor: Purva R. Rajkotia
  • Patent number: 9442668
    Abstract: Adaptive power management for a data storage device (DSD). A command rate is determined for service requests received by the DSD and a latency is determined for the DSD in performing service requests. The command rate and the latency are used to determine a probability of receiving no service requests within a time interval and power states of the DSD are managed based on the probability of receiving no service requests.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: September 13, 2016
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: Donald E. Adams
  • Patent number: 9436240
    Abstract: An electronic device is provided that includes a base, a processor, and a tablet having a front surface, a rear surface and a bottom edge surface. A processor may operate at a first operating condition when the tablet is coupled to the base, and the processor may operate at a second operating condition when the tablet is not coupled to the base. The tablet may include a heat conducting device and an active edge. The heat conducting device may conduct heat from the processor to the active edge where the heat may be dissipated using supplemental cooling.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: September 6, 2016
    Assignee: Intel Corporation
    Inventor: Mark MacDonald
  • Patent number: 9436481
    Abstract: Various embodiments concern reprogramming an implantable medical device by an external programmer to operate using a second program version, the second program version replacing a first program version in controlling operation of the implantable medical device. It can be determined whether the implantable medical device will be able to operate using the first program version to deliver therapy according to the first program version if the implantable medical device was to revert back to using the first program version. The implantable medical device can then revert to operational programming from the second program version to the first program version, the first program version saved in memory of the implantable medical device as a restore point while the implantable medical device operates according to the second program version between the reprogramming and reverting of the implantable medical device.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: September 6, 2016
    Assignee: Medtronic, Inc.
    Inventor: Touby A. Drew
  • Patent number: 9432941
    Abstract: A method and apparatus for performing wake-up control are provided, where the method is applied to an electronic device, and the method may include the steps of: detecting whether a predetermined wake-up action is input into the electronic device, wherein the predetermined wake-up action is a user action for wake-up control; and when it is detected that the predetermined wake-up action is input into the electronic device, sending a wake-up packet carrying predetermined wake-up information to allow an internal circuit of another electronic device to be woken up in response to detection of the predetermined wake-up information.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: August 30, 2016
    Assignee: MEDIATEK INC.
    Inventors: Chiu-Wan Li, Juei-Ting Sun, Shuo-Jen Hsu
  • Patent number: 9419807
    Abstract: A Powered Device (PD) in a PoE system has two input channels, each being coupled to a separate Power Sourcing Equipment (PSE) for increased reliability. A first PD controller is coupled to the first channel to perform hand-shaking and closes a first Power Good (PWRGD) switch when the PoE voltage is detected on the first channel. A second PD controller is coupled to the second channel to perform hand-shaking and closes a second PWRGD switch when the PoE voltage is detected on the second channel. A diode bridge couples both channels to a single regulating power supply that supplies power to a load. Auxiliary switches are controlled by the PWRGD signals so that only the first channel or the second channel is coupled to the diode bridge in the event that both channels receive the respective PoE voltages. Therefore, hot standby is provided using only one power supply.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: August 16, 2016
    Assignee: Linear Technology Corporation
    Inventors: Ryan Charles Huff, Jeffrey Lynn Heath, Kaung Zin Htoo, Kirk Tzukai Su
  • Patent number: 9367112
    Abstract: A method and apparatus to monitor architecture events is disclosed. The architecture events are linked together via a push bus mechanism with each architectural event having a designated time slot. There is at least one branch of the push bus in each core. Each branch of the push bus may monitor one core with all the architectural events. All the data collected from the events by the push bus is then sent to a power control unit.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: June 14, 2016
    Assignee: INTEL CORPORATION
    Inventors: Yen-Cheng Liu, P. Keong Or, Krishnakanth V. Sistla, Ganapati Srinivasa
  • Patent number: 9348400
    Abstract: A method for turning a multi-channel link into a power saving mode may include detecting one or more events including a drop in a data throughput of the multi-channel link. In response to the detection of one or more events, data communication through one or more channels of the multi-channel link may be transferred to one or more other channels. The characteristics of the one or more channels may be adjusted to achieve power saving. Data communication through the one or more channels may be resumed at a reduced rate. Some of the one or more other channels of the multi-channel link may be configured to operate in a low-power or shut-down mode while the channels with adjusted characteristics are communicating data at the reduced rate.
    Type: Grant
    Filed: April 15, 2013
    Date of Patent: May 24, 2016
    Assignee: Broadcom Corporation
    Inventor: André Lejeune
  • Patent number: 9311209
    Abstract: Associating processor and processor core energy consumption with a task such as a virtual machine is disclosed. Various events cause a trace record to be written to a trace buffer for a processor. An identifier associated with a task using a processor core of the processor is read. In addition, one or more values associated with an energy consumption of the processor core are read. In response to the event, the one or more values associated with the energy consumption of the processor core and the identifier are written to the trace buffer memory.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: April 12, 2016
    Assignee: International Business Machines Corporation
    Inventors: Bishop Brock, Tilman Gloekler, Charles R. Lefurgy, Karthick Rajamani, Gregory S. Still, Malcolm S. Allen-Ware