Abstract: A system and process of adjusting units coupled to a control element which includes, installing the unit at a selected location. A parameter can be entered from a displaced user operable device. The unit can be directed to carry out a selected function. Performance can be evaluated whether an additional parameter alteration is required based on a predetermined criterion.

Abstract: A method for synchronizing transactions between components of a system on chip includes monitoring a partial sequence of transactions that use AXI communication protocol for a stream of address calls and a streams of transfer batches. For each of the address calls and transfer batches identified by the same unique identifier, extracting an anticipated an anticipated number of transfers per batch from each of the address calls of the stream of address calls, and recursively, comparing the anticipated numbers of transfers extracted from the address calls of the stream of address calls with the number of transfers in the transfer batches of the stream of batches. Pairing a predetermined number of consecutive address calls of the stream of address calls with consecutive batches of the stream of batches based on the comparison.

Abstract: Communicating transaction-specific attributes in a peripheral component interconnect express (PCIe) system is disclosed. A PCIe system includes a host system and at least one PCIe endpoint. The PCIe endpoint is configured to determine one or more transaction-specific attributes that can improve efficiency and performance of a predefined host transaction. In this regard, in one aspect, the PCIe endpoint encodes the transaction-specific attributes in a transaction layer packet (TLP) prefix of at least one PCIe TLP and provides the PCIe TLP to the host system. In another aspect, a PCIe root complex (RC) in the host system is configured to detect and extract the transaction-specific attributes from the TLP prefix of the PCIe TLP received from the PCIe endpoint. By communicating the transaction-specific attributes in the TLP prefix of the PCIe TLP, it is possible to improve efficiency and performance of the PCIe system without violating the existing PCIe standard.

Abstract: A method for controlling bandwidth in a direct memory access (DMA) unit of a computer processing system, the method comprising: assigning a DMA job to a selected DMA engine; starting a source timer; and issuing a request to read a next section of data for the DMA job. If a sufficient amount of the data was not obtained, allowing the DMA engine to wait until the source timer reaches a specified value before continuing to read additional data for the DMA job.

Abstract: A method of compiling causal rules into continuations for use in root cause analysis of a system comprising a plurality of inter-related elements, comprising defining observable events occurring on system elements; defining at least one of a cause and a result of each of the events; defining causal rules, each rule describing a causal relationship between an event and one of its cause and its result; and compiling the causal relationships as continuations in a continuation passing style (CPS) for use in analyzing the root cause of subsequent observed events symptomatic of at least one problem on the system.

Abstract: Embodiments of the present invention relate to a (e.g., hybrid) redundant array of independent disks (RAID)-based storage control board having a fiber channel interface controller. Specifically, the present invention relates to a storage control board having a RAID controller with a peripheral component interconnect express (PCI-e) interface and a fiber channel interface controller. In one embodiment, the RAID controller is coupled to an input/output (I/O) hub and a set (at least one) of PCI-e slots, which themselves can receive cards such as a fiber channel (FC) add-on card, a serial attached small component system interface (SAS) add-on card, or a PCI-e bridge add-on card. The I/O hub can be coupled to a set of processors, each of which can be coupled to a main memory module or the like.

Abstract: Techniques for controlling a touch input device using an accessory communicatively coupled to the device are disclosed. In one aspect, an accessibility framework is launched on the device. An accessory coupled to the device is detected. Receipt of input from the accessory is enabled. An accessibility packet is received from the accessory. The accessibility packet includes an accessibility command and one or more parameters. The accessibility packet is processed to extract the first accessibility command and the one or more parameters. Input is generated for the accessibility framework based on the accessibility command and the one or more parameters. In some implementations, the device also sends accessibility commands to the accessory, either in response to accessibility commands received from the accessory or independent of any received accessibility commands.

Abstract: In a system-on-chip (SoC) including a processor, a method is provided for stashing packet information that prevents cache thrashing. In operation, an Ethernet subsystem accepts a plurality of packets and sends the packets to an external memory for storage. A packet descriptor is derived for each accepted packet and is added to an ingress queue. Packet descriptors are transferred from the ingress queue to an egress queue supplying the packet descriptors to a processor. A context manager monitors the fill level of packet descriptors in the egress queue. In response to monitoring the fill level, the context manager stashes packets from the external memory into a cache, where each stashed packet is associated with a packet descriptor in the egress queue. Packet descriptors are transferred from the ingress queue to the egress queue in response to a number of packet descriptors in the egress queue falling below the fill level.

Abstract: A configuration performing processing of dividing a file into a plurality of pieces and transmitting the same even when a size of the file is large in transfer of files (input/output) between computers on a network is provided. A multi-thread file input/output system includes a first module performing processing of reading data from an input file, dividing the data into a plurality of pieces, and transmitting the plurality of pieces to a network by multi-thread processing in a transmitter computer; and a second module performing processing of receiving the plurality of pieces from the network and integrating and writing the same to an output file 5 in a receiver computer.

Abstract: Circuits, methods, and apparatus for testing media player accessories. One example includes an accessory validation system including hardware, firmware, and software. This example provides two test modes, referred to a sniff mode and an emulation mode. In the sniff mode, a test box may be inserted between an accessory and a media player. Traffic between the accessory and media player may be monitored and the presence of errors may be determined. In the emulation mode, the accessory validation system hardware emulates a media player. The emulator provides various types of responses to the accessory that would otherwise occur infrequently with an actual media player. The tests to be completed in these modes are compiled based on the category of functions that an accessory maker wishes to claim for the accessory. These category claims are then converted into a number of rules. From these rules, specific tests are generated.

Abstract: Peripherals and data processing systems are disclosed which can be configured to interact based upon sensor data. In one embodiment, a peripheral, which is configured to be used with a data processing system, includes an interface to couple the peripheral to the data processing system, and at least one sensor, such as a proximity sensor, to sense a user of the peripheral, and a processor coupled to the interface and to the at least one sensor, wherein the processor configures the peripheral in response to data from the at least one sensor. The peripheral may communicate sensor data from its sensors to the data processing system, which may be a wireless PDA, and the data processing system analyzes the sensor data from its sensors and from the peripheral's sensors to decide how to configure the peripheral and/or the data processing system based on the sensor.

Abstract: A storage router and method for providing virtual local storage on remote storage devices to devices are provided. A plurality of devices, such as workstations, are connected to a first transport medium, and a plurality of storage devices are connected to a second transport medium. In one embodiment, the storage router maintains a map to allocate storage space on the remote storage devices to devices connected to the first transport medium by associating representations of the devices connected to the first transport medium with representations of storage space on the remote storage devices, wherein each representation of a device connected to the first transport medium is associated with one or more representations of storage space on the remote storage devices and receives and processes native low level block protocol requests from the devices connected to the first transport medium to access allocated storage.

Abstract: A storage router and method for providing virtual local storage on remote storage devices to devices are provided. Devices are connected to a first transport medium, and a plurality of storage devices are connected to a second transport medium. In one embodiment, the storage router maintains a map to allocate storage space on the remote storage devices to devices connected to the first transport medium by associating representations of the devices connected to the first transport medium with representations of storage space on the remote storage devices, wherein each representation of a device connected to the first transport medium is associated with one or more representations of storage space on the remote storage devices and controls access from the devices connected to the first transport medium to the storage space on the remote storage devices in accordance with the map and using native low level block protocol.

Abstract: Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.

Abstract: An application analyzing method includes extracting a variable corresponding to a particular input data item and information regarding a value of the variable by analyzing a plurality of source programs constituting an application, record information of a database used by the application, and execution control information of the application, and outputting, based on the variable and the information regarding the value of the variable extracted in the extracting, information regarding a presumed value with respect to the input data item as presumed requirement information.

Abstract: The subject matter discloses a method for enabling computerized extensions, comprising receiving data concerning an extension required to a computerized application utilizing a process model, detecting an event received from the external entity and executing the computerized extension according to the event. The extension may be activated before after or during operation of the computerized application.

Abstract: A dynamic A-MSDU enabling method is disclosed. The method enables the recipient of an aggregate MAC service data unit (A-MSDU) under a block ACK agreement to reject the A-MSDU. The method thus distinguishes between A-MSDU outside of the block ACK agreement, which is mandatory, from A-MSDU under the block ACK agreement, which is optional. The method thus complies with the IEEE 802.11n specification while enabling the recipient to intelligently allocate memory during block ACK operations.

Abstract: A method includes executing a multi-threaded, object-oriented application (OOA) on a device; receiving, by multiple threads of the OOA, an object from an out-of-process cache memory; mutating one or more fields of the object, wherein the one or more fields correspond to one or more attributes of the object; and applying an update of the one or more fields that have been mutated to the out-of-process cache memory, wherein the applying the update updates the one or more fields mutated at a field level and not at an object level.

Abstract: methods and systems for monitoring data activity may include various operations, including, but not limited to: modifying a value of at least one counter in response to one or more input/output requests directed to at least one data storage region during a first time interval; storing a first cumulative value of the counter modified in response to one or more input/output requests directed to at least one data storage region during the first time interval following the expiration of the first time interval; modifying a value of at least one counter in response to one or more requests directed to the at least one data storage region during a second time interval; storing a second cumulative value of the counter modified in response to one or more requests directed to the at least one data storage region during the second time interval following the expiration of the second time interval; and computing at least one activity index for the at least one data storage region from at least the first cumulative value

Abstract: A memory system with serialized data transfer. The memory system includes within a memory controller and a plurality of memory devices. The memory controller receives a plurality of write data values from a host and outputs the write data values as respective serial streams of bits. Each of the memory devices receives at least one of the serial streams of bits from the memory controller and converts the serial stream of bits to a set of parallel bits for storage.