Abstract: An output compare system and method for automatically controlling multiple outputs in a data processor includes an output compare mask register for holding a set bit therein. An output compare data register is coupled to a control output of the output compare mask register for holding a data bit therein. Apparatus for initiating an output compare function are coupled to a control input to the output compare mask register whereby the data bit will be transferred to an output of the data processor if the set bit is present. The system and method allow for simultaneous utilization of multiple output compare functions to achieve one-cycle-wide pulses on a timer output pin.