Abstract: Some aspects of the present disclosure provide for a method of automatically balancing mask misalignment for multiple patterning layers to minimize the consequences of mask misalignment. In some embodiments, the method defines a routing grid for one or more double patterning layers within an IC layout. The routing grid has a plurality of vertical grid lines extending along a first direction and a plurality of horizontal grid lines extending along a second, orthogonal direction. Alternating lines of the routing grid in a given direction (e.g., the horizontal and vertical direction) are assigned different colors. Shapes on the double patterning layers are then routed along the routing grid in a manner that alternates between different colored grid lines. By routing in such a manner, variations in capacitive coupling caused by mask misalignment are reduced.

Abstract: A pattern from a patterning device is applied to a substrate by a lithographic apparatus. The applied pattern includes product features and metrology targets. The metrology targets include large targets and small targets which are for measuring overlay. Some of the smaller targets are distributed at locations between the larger targets, while other small targets are placed at the same locations as a large target. By comparing values measured using a small target and large target at the same location, parameter values measured using all the small targets can be corrected for better accuracy. The large targets can be located primarily within scribe lanes while the small targets are distributed within product areas.

Abstract: In one or more embodiments, the disclosure relates to a method of setting a photolithography exposure machine, comprising: forming on a photolithography mask test patterns and circuit patterns, transferring the patterns to a resin layer covering a wafer, measuring a critical dimension of each test pattern transferred, and determining a focus setting error value of the photolithography machine from the measure of the critical dimension of each pattern, the test patterns formed on the mask comprising a first reference test pattern and a second test pattern forming for a photon beam emitted by the photolithography machine and going through the mask, an optical path having a length different from an optical path formed by the first test pattern and the circuit patterns formed on the mask.

Abstract: A process for use in lithography, such as photolithography for patterning a semiconductor wafer, is disclosed. The process includes receiving an incoming semiconductor wafer having various features and layers formed thereon. A unit-induced overlay (uniiOVL) correction is received and a deformation measurement is performed on the incoming semiconductor wafer in an overlay module. A deformation-induced overlay (defiOVL) correction is generated from the deformation measurement results by employing a predetermined algorithm on the deformation measurement results. The defiOVL and uniiOVL corrections are fed-forward to an exposure module and an exposure process is performed on the incoming semiconductor wafer.

Abstract: In a method for fracturing or mask data preparation or mask process correction for charged particle beam lithography, a plurality of shots are determined that will form a pattern on a surface, where shots are determined so as to reduce sensitivity of the resulting pattern to changes in beam blur (?f). At least some shots in the plurality of shots overlap other shots. In some embodiments, ?f is reduced by controlling the amount of shot overlap in the plurality of shots, either during initial shot determination, or in a post-processing step. The reduced sensitivity to ?f expands the process window for the charged particle beam lithography process.

Abstract: A method for repairing a defect, such as a pinhole, on a photomask is described. In an example, a laser beam is used to form a matrix of laser burn spots in a substrate of the photomask proximate a defect, such as a pinhole, of the photomask. Each laser burn spot is formed at a focal point of the laser beam inside the substrate by melting a material of the substrate proximate to the defect. In an example, the defect is surrounded and covered by the matrix of laser burn spots. The matrix of laser burn spots can attenuate or block light from passing through the defect, such as the pinhole. The matrix of laser burn spots may repair the defect of the photomask without removing a pellicle and pellicle frame mounted on the photomask.

Abstract: A method including loading a blank reticle; projecting an electron beam; moving a second aperture plate having a first and second pattern aperture so the first pattern aperture is overlapped by a first aperture of a first aperture plate, the electron beam passing through the first pattern aperture after passing the first aperture; exposing the blank reticle with the electron beam that passes the first pattern aperture to form a first exposure pattern; moving the second aperture plate so the second pattern aperture is overlapped by the first aperture of the first aperture plate, the electron beam passing through the second pattern aperture after passing the first aperture; exposing the blank reticle with the electron beam after passing the second pattern aperture, to form a second exposure pattern; and developing the blank reticle having the first and second exposure patterns to form the reticle having first and second patterns.

Abstract: A hard mask spacer structure includes a first spacer on a device layer, the first spacer defining a plurality of hole patterns and at least an asteriated hole pattern between the hole patterns; and a second spacer on the first spacer and inlaid into the asteriated hole pattern, thereby rounding the asteriated hole pattern.

Abstract: An optical mask for forming a pattern is provided. The optical mask includes: a substrate including a light blocking pattern formed on portions of the substrate, wherein the light blocking pattern includes a halftone layer and a light blocking layer formed on the halftone layer, and the halftone layer and the light blocking layer overlap such that at least an edge portion of the halftone layer is exposed. A pitch of the light blocking pattern may about 6 ?m, and a transmission ratio of the halftone layer may range from about 10% to about 50%.

Abstract: A method for fabricating a patterned layer is disclosed. Firstly, a semiconductor substrate is provided. Then, a precursory gas on the semiconductor substrate is formed. Finally, a patterned layer on the semiconductor substrate is deposited by reacting the precursory gas with at least one electron beam or at least one ion beam. The present invention not only fabricates a patterned layer on the substrate in a single step but also achieves a high lithographic resolution and avoids remains of contaminations by using the properties of the electron beam or the ion beam and the precursory gas.

Abstract: There is disclosed a lithography method and system implemented by a charged particle beam passed through a shaping slit member having plural circular apertures of different diameters. The method and system operate to delineate a circular pattern by shooting the shaped circular beam passed through the desired circular aperture onto a workpiece. The method and system consists of causing circular beams shaped using different ones of the circular apertures to be shot onto the workpiece such that the circular beams are coincident with each other in center position to thereby delineate a circular pattern of a desired size. Consequently, circular patterns in a wide range of sizes can be obtained, although a limited number of circular apertures are used.

Abstract: A method for manufacturing a photomask includes forming a photoresist film on a substrate, and forming a defect detecting pattern on the photoresist film. The defect detecting pattern has a first pattern elongated in a first direction and a second pattern overlapping one end of the first pattern and elongated in a second direction different from the first direction. The first pattern and the second pattern are formed using electron beams (e-beam) diffracted by a same amplifier.

Abstract: In the field of semiconductor production using shaped charged particle beam lithography, a method and system for fracturing or mask data preparation or proximity effect correction is disclosed, wherein a series of curvilinear character projection shots are determined for a charged particle beam writer system, such that the set of shots can form a continuous track, possibly of varying width, on a surface. A method for forming a continuous track on a surface using a series of curvilinear character projection shots is also disclosed. Methods for manufacturing a reticle and for manufacturing a substrate such as a silicon wafer by forming a continuous track on a surface using a series of curvilinear character projection shots is also disclosed.

Abstract: A lithographic apparatus includes an illuminator for receiving a beam of EUV radiation from a radiation source apparatus and for conditioning the beam to illuminate a target area of a patterning device, such as a reticle. The reticle forms a patterned radiation beam. A projection system transfers the pattern from said patterning device to a substrate by EUV lithography. Sensors are provided for detecting a residual asymmetry in the conditioned beam as the beam approaches the reticle, particularly in a non-scanning direction. A feedback control signal is generated to adjust a parameter of said radiation source in response to detected asymmetry. The feedback is based on a ratio of intensities measured by two sensors at opposite ends of an illumination slit, and adjusts the timing of laser pulses generating an EUV-emitting plasma.

Abstract: Some embodiments include methods for correcting for variation across substrates. A difference map is created to indicate differences between a desired pattern that is to be formed across the substrates utilizing photolithographic processing and a signature pattern representing the actual pattern formed with an initial setting of illumination optics. Modifications to the illumination optics are determined for improving problematic regions identified in the difference map, and the illumination optics are then modified. Substrates are photolithographically processed utilizing the modified illumination optics.

Abstract: The present application describes a method and a device for keeping the mask dimensions of a mask (6) constant in the mask plane in lithography. The mask (6) is heated due to the exposure during lithography. By means of thermal and/or mechanical methods, the dimensions of the mask (6) are kept constant. It is possible to use additional methods or devices, e.g. an air cooler (17) or an air heater (17), in order to prevent a change in the mask dimensions in the mask plane.

Abstract: A method of optimizing a die size in a method of manufacturing devices using a lithographic apparatus, wherein the lithographic apparatus is arranged to expose an image field of variable size in a single exposure step, the image field having a certain maximum size, the method comprising: receiving a desired area for the die; and calculating a target aspect ratio for the die, wherein the target aspect ratio is determined so as to maximize the number of good dies that can be imaged per hour using the lithographic apparatus. Desirably, calculating a target aspect ratio comprises finding a first target aspect ratio that maximizes a figure of merit MF, where MF is the ratio of the number of dies exposed in each image field divided by the number of exposures on each substrate.

Abstract: A resist pattern forming method including in the following order, (1) a step of forming a film by using a negative chemical-amplification resist composition capable of undergoing negative conversion by a crosslinking reaction, (2) a step of exposing the film, and (4) a step of developing the exposed film by using a developer containing an organic solvent; a developer and a negative chemical-amplification resist composition used therefor; and a resist pattern formed by the pattern forming method.

Abstract: A method for manufacturing a semiconductor device is disclosed, wherein during the physical design process, a curvilinear path is designed to represent an interconnecting wire on the fabricated semiconductor device. A method for fracturing or mask data preparation (MDP) is also disclosed in which a manhattan path which is part of the physical design of an integrated circuit is modified to create a curvilinear pattern, and where a set of charged particle beam shots is generated, where the set of shots is capable of forming the curvilinear pattern on a resist-coated surface.

Abstract: Disclosed are systems and methods for time differential reticle inspection. Contamination is detected by, for example, determining a difference between a first signature of at least a portion of a reticle and a second signature, produced subsequent to the first signature, of the portion of the reticle.