Abstract: A method of fabricating a buried local interconnect in a substrate and an integrated circuit incorporating the same are provided. The method includes the steps forming a trench in the substrate and forming a first insulating layer in the trench. A conductor layer is formed on the first insulating layer. A portion of the conductor layer is removed to define a local interconnect layer and a second insulating layer is formed in the trench covering the local interconnect layer. The method provides for a local interconnect layer buried beneath a dielectric layer of an integrated circuit, such as a shallow trench isolation layer. Areas of a substrate above the silicon-silicon dioxide interface formerly reserved for local interconnect layers in conventional processing may now be used for additional conductor lines.

Abstract: A process for forming an array of vertical cavity optical resonant structures wherein the structures in the array have different detection or emission wavelengths. The process uses selective area growth (SAG) in conjunction with annular masks of differing dimensions to control the thickness and chemical composition of the materials in the optical cavities in conjunction with a metalorganic vapor phase epitaxy (MOVPE) process to build these arrays.