Abstract: An integrated circuit (IC) device includes a substrate, a pair of fin-type active regions protruding from the substrate to define a trench region on the substrate, the fin-type active regions extending in a first lateral direction, a pair of source/drain regions on the fin-type active regions, respectively, a device isolation film in the trench region, the device isolation film apart from the substrate in a vertical direction, an etch stop structure filling at least a portion of the trench region between the substrate and the device isolation film, a via power rail between the pair of fin-type active regions and between the pair of source/drain regions, the via power rail passing through at least a portion of the etch stop structure, and a backside power rail passing through the substrate, the backside power rail in contact with one end of the via power rail.

Abstract: The first conductive part includes a first surface layer part and a first inner layer part constituting a layer different from the first surface layer part in the substrate. The second conductive part includes a second surface layer part facing the first surface layer part with a creeping distance therebetween, and a second inner layer part constituting a layer different from the second surface layer part in the substrate. The electronic apparatus is provided with at least one of a first protruded configuration and a second protruded configuration. The first protruded configuration is configured such that the first inner layer part includes a first conductive protrusion protruding towards the second conductive part from the first surface layer part. The second protruded configuration is configured such that the second inner layer part includes a second conductive protrusion protruding towards the first conductive part from the second surface layer part.

Abstract: Conductive contacts, methods for forming the same, and semiconductor devices including the same are disclosed. In an embodiment, a semiconductor device includes a first interlayer dielectric (ILD) layer over a transistor structure; a first contact extending through the first ILD layer, the first contact being electrically coupled with a first source/drain region of the transistor structure, a top surface of the first contact being convex, and the top surface of the first contact being disposed below a top surface of the first ILD layer; a second ILD layer over the first ILD layer and the first contact; and a second contact extending through the second ILD layer, the second contact being electrically coupled with the first contact.

Abstract: A device includes a carbon nanotube having a channel region and dopant-free source/drain regions at opposite sides of the channel region, a first metal oxide layer interfacing a first one of the dopant-free source/drain regions of the carbon nanotube, a second metal oxide layer interfacing a second one of the dopant-free source/drain regions of the carbon nanotube and a gate structure over the channel region of the carbon nanotube, and laterally between the first metal oxide layer and the second metal oxide layer.

Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the semiconductor processing chamber. The methods may include forming a silicon-containing material on the substrate. The silicon-containing material may be characterized by a stress of greater than or about ?200 MPa. The methods may include annealing the substrate at a temperature of greater than or about 700° C.

Abstract: A package structure includes a semiconductor die, an insulating encapsulant, a first redistribution layer, a second redistribution layer, antenna elements and a first insulating film. The insulating encapsulant is encapsulating the at least one semiconductor die, the insulating encapsulant has a first surface and a second surface opposite to the first surface. The first redistribution layer is disposed on the first surface of the insulating encapsulant. The second redistribution layer is disposed on the second surface of the insulating encapsulant. The antenna elements are located over the second redistribution layer. The first insulating film is disposed in between the second redistribution layer and the antenna elements, wherein the first insulating film comprises a resin rich region and a filler rich region, the resin rich region is located in between the filler rich region and the second redistribution layer and separating the filler rich region from the second redistribution layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes an epitaxial structure over a substrate and a cap element over the epitaxial structure. The cap element has a first thickness measured between a top surface of the cap element and a top surface of the epitaxial structure. The cap element has a second thickness measured between a side surface of the cap element and a side surface of the epitaxial structure. The first thickness and the second thickness are different from each other.

Abstract: An increase in voltage of a light-emitting device manufactured through a step of forming an aluminum oxide film in contact with an organic compound layer is inhibited. An organic compound film is formed over a first electrode. An organic mask film containing an organic compound which has low solubility to water or a chemical solution including water as a solvent is formed over the organic compound film. An inorganic mask layer is formed over the organic mask film. Shapes of the organic mask film and the organic compound film are processed with the use of the inorganic mask layer, whereby an organic mask layer and an organic compound layer are formed. At least parts of the inorganic mask layer and the organic mask layer are removed with the use of water or a liquid including water as a solvent.

Abstract: A semiconductor device has a semiconductor base substrate, a first electrode disposed on the surface of the semiconductor base substrate, a protective film covering an end portion of the first electrode, and a second electrode disposed on the first electrode, in an opening of the protective film. The protective film has an end portion where the protective film and the second electrode overlap. In a plan view of the semiconductor device, the end portion has a convex portion with a first radius of curvature and a concave portion with a second radius of curvature. The convex portion protrudes in a direction away from the opening, and the convex portion is recessed toward the opening. The first radius of curvature is larger than the second radius of curvature.

Abstract: In one aspect, a preparation method for a solar cell includes the following steps: sequentially forming a first silicon oxide layer, an intrinsic amorphous silicon layer, a phosphorosilicate glass layer and a second silicon oxide layer on the back surface of an n-type silicon substrate; removing the phosphorosilicate glass layer and the second silicon oxide layer in a partial region of the back surface of the n-type silicon substrate; subjecting the back surface of the n-type silicon substrate to boron diffusion; forming an isolation groove at the boundary between the boron-doped polycrystalline silicon layer and the phosphorus-doped polycrystalline silicon layer; and preparing a first electrode connected to the boron-doped polycrystalline silicon layer and a second electrode connected to the phosphorus-doped polycrystalline silicon layer.

Abstract: A method for forming an interconnect structure in an element is disclosed. The method can include patterning a cavity in a non-conductive material. The method can include exposing a surface of the cavity in the non-conductive material to a surface nitriding treatment. The method can include depositing a conductive material directly onto the treated surface after the exposing.

Abstract: Disclosed are methods and systems for depositing layers comprising a Group 13 element on a surface of a substrate via contacting the substrate with at least a vapor-phase first precursor and a vapor-phase second precursor comprising an alkyl halide. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, and metal-insulator-metal (MIM).

Abstract: A method includes receiving, by a processing device, first data generated by a first sensor of a substrate processing system. The first data is generated responsive to the first sensor receiving electromagnetic radiation from a substrate held by a robot arm of a transfer chamber in the substrate processing system. The method further includes processing the first data to obtain second data. The second data includes a first indication of performance of the substrate processing system. The method further includes causing, in view of the second data, performance of a corrective actions associated with the substrate processing system.

Abstract: A method of manufacturing a semiconductor device includes: forming a silicon oxide film covering each of a first main surface and a second main surface of a semiconductor substrate; forming a redistribution wiring on the first main surface side of the semiconductor substrate; and grinding the second main surface of the semiconductor substrate. This grinding step is performed in a state in which a thickness of the silicon oxide film positioned on the second main surface is equal to or larger than 10 nm and equal to or smaller than 30 nm.

Abstract: The present disclosure relates to a method for manufacturing a semiconductor light emitting device through non-wire bonding, the method comprising the steps of: preparing a semiconductor light emitting die and a support substrate; attaching the semiconductor light emitting die to the support substrate while a second electrical path is exposed, the semiconductor light emitting die being attached such that a conductive bonding structure covering the entire second semiconductor region is tightly bonded to a bonding layer; removing the substrate; and electrically connecting the second electrical path to the remaining semiconductor region among a first semiconductor region and the second semiconductor region through electrical connection through deposition.

Abstract: Provided is a display device including: a capacitor having a first electrode, a first insulating film over the first electrode, and a second electrode over the first insulating film; and a first transistor over the capacitor. The first transistor includes the second electrode, a second insulating film over the second electrode, an oxide semiconductor film over the second insulating film, and a first source electrode and a first drain electrode over the oxide semiconductor film. The first source electrode and the first drain electrode are electrically connected to the oxide semiconductor film.

Abstract: A method for fabricating semiconductor devices is disclosed. The method includes forming a stack on a first substrate. A laser liftoff layer is interposed between the stack and the first substrate. The method includes forming a plurality of first interconnect structures over a first side of the stack. The method includes attaching a second substrate to the stack on the first side, with the plurality of first interconnect structures interposed between the stack and the second substrate; removing the first substrate by applying radiation on the laser liftoff layer. The method includes forming a plurality of second interconnect structures on a second side of the stack opposite to the first side.

Abstract: The present disclosure relates to a display panel and a display device thereof. The display panel includes: a substrate; an organic light-emitting device located on the substrate; a cover layer located on the organic light-emitting device; a light extraction layer located on the cover layer; an optical functional layer located on the light extraction layer; and an encapsulation layer located on the optical functional layer. A refractive index of the light extraction layer is less than a refractive index of the cover layer and less than a refractive index of a portion of the encapsulation layer closest to the optical functional layer. A refractive index of the optical functional layer is less than the refractive index of the portion of the encapsulation layer closest to the optical functional layer and not equal to the refractive index of the light extraction layer.

Abstract: A semiconductor device comprises a III-N device including an insulating substrate. The insulating substrate includes a first side and a second side. The device further includes a III-N material structure on a first side of the insulating substrate, and a gate electrode, a source electrode, and a drain electrode on a side of the III-N material structure opposite the substrate. A backmetal layer on the second side of the insulating substrate, and a via hole is formed through the III-N material structure and the insulating substrate. A metal formed in the via-hole is electrically connected to the drain electrode on the first side of the substrate and electrically connected to the backmetal layer on the second side of the substrate.

Abstract: A semiconductor apparatus having a staggered structure, a method of manufacturing a semiconductor apparatus, and an electronic device including the semiconductor apparatus. The semiconductor apparatus includes a first element and a second element on a substrate. The first element and the second element each include a comb-shaped structure. The comb-shaped structure includes a first portion extending in a vertical direction relative to the substrate, and at least one second portion extending from the first portion in a lateral direction relative to the substrate and spaced from the substrate. A height of the second portion of the first element in the vertical direction is staggered with respect to a height of the second portion of the second element in the vertical direction. A material of the comb-shaped structure of the first element is different from a material of the comb-shaped structure of the second element.