Abstract: An antenna-in-package system and a mobile terminal are provided. The mobile terminal includes a main board. The antenna-in-package system includes a substrate, a metal antenna provided on a side of the substrate facing away from the main board, an integrated circuit chip provided on a side of the substrate close to the main board, and a circuit provided in the substrate and connecting the metal antenna to the integrated circuit chip. The circuit is connected to the main board. The metal antenna is a patch antenna simultaneously fed with power by two feeding points. The two feeding points are used to excite electromagnetic waves in different bands. The antenna-in-package system provided by the present disclosure achieves dual-band coverage of 28 GHz and 39 GHz, and a size is reduced to 18×5 mm, so that an occupied area is greatly reduced, and a gain reduction is small.

Abstract: An integrated circuit includes a first active region, a second active region, a third active region, a first contact and a second contact. The first active region and the second active region are separated from each other in a first direction, and are located on a first level. The third active region is located on the first level and is separated from the second active region in a second direction different from the first direction. The first contact extends in the second direction, overlaps the first active region, and is located on a second level different from the first level. The second contact extends in the first direction and the second direction, overlaps the first contact and the third active region, is electrically coupled to the first contact, and is located on a third level different from the first level and the second level.

Abstract: This disclosure is directed to circuits for controlling voltage from a voltage source to one or more light emitting diodes. The circuit includes a first transistor comprising a power switch that is configured to define a load current path from the voltage source to the one or more light emitting diodes. The circuit also includes a second transistor, which can be controlled based on the light emitting diodes, wherein the second transistor is configured to turn off when one or more of the lights emitting diodes exhibit an electoral short. The first transistor is configured to turn off in response to the second transistor turning off so as to provide short circuit protection for the circuit.

Abstract: A programmable logic device (“PLD”) contains programmable digital signal processing (“DSP”) blocks operable to be selectively programmed to perform one or more logic functions. The PLD, in one embodiment, includes configurable logic blocks (“LBs”), an input and output (“I/O”) block, and programmable DSP blocks. The configurable LBs are able to be selectively programmed to perform one or more logic functions. The I/O block includes I/O ports for facilitating data transfer. The programmable DSP blocks are configured to perform various predefined logic functions. Each of the programmable DSP blocks, in one aspect, includes at least one configurable DSP which, in one embodiment, includes a 27×18 multiplier and a 12×12 multiplier.

Abstract: Disclosed herein are flexible metal-free antenna systems using fabric coated with electrically conductive polymers.

Abstract: A holographic antenna including a transmission line structure having a traveling wave mode along a length of the transmission line structure, and a plurality of reconfigurable radiating elements located along the length of the transmission line structure.

Abstract: An improved level shifter is disclosed. The level shifter is able to achieve a switching time below 1 ns using a relatively low voltage for VDDL, such as 0.75 V. The improved level shifter comprises a coupling stage and a level-switching stage. A related method of level shifting is also disclosed.

Abstract: An information handling system to wirelessly transmit and receive data at an antenna may include a base housing metal chassis containing components of the information handling system, the base housing metal chassis including a C-cover and D-cover housing the components; and an antenna cavity formed within the C-Cover and D-cover including: a first aperture formed through a portion of the D-cover; a second aperture formed through a portion of the C-cover; and a grounding wall formed within the antenna cavity to operatively couple currents associated with the antenna such that the currents travel from the first aperture to the send aperture causing emitted electromagnetic radiation to be emitted towards the second aperture.

Abstract: Methods and apparatus for optimizing a quantum circuit. In one aspect, a method includes identifying one or more sequences of operations in the quantum circuit that un-compute respective qubits on which the quantum circuit operates; generating an adjusted quantum circuit, comprising, for each identified sequence of operations in the quantum circuit, replacing the sequence of operations with an X basis measurement and a classically-controlled phase correction operation, wherein a result of the X basis measurement acts as a control for the classically-controlled correction phase operation; and executing the adjusted quantum circuit.

Abstract: Various embodiments may include a dimmer system for controlling the power consumption of a load that can be connected with parallel-connected galvanically isolated dimming channels. The dimmer system may include a plurality of dimming channels, each dimming channel including a sensor for monitoring a temperature of associated switch elements; and a control unit for each dimming channel, the control units configured to shift a respective dimming edge based at least in part on the temperature to distribute power dissipation of the connected load substantially equally across the plurality of dimming channels.

Abstract: An output buffer circuit includes an output terminal, a transistor, and a resistor. The transistor includes a first terminal coupled to the output terminal, a second terminal coupled to a ground rail, and a third terminal coupled to an output signal source. The resistor includes a first terminal coupled to a fourth terminal of the transistor, and a second terminal coupled to the ground rail.

Abstract: In one embodiment, a filament for LED filament lamp is presented, that includes a light-transmissive substrate; at least one LED die mounted on the light-transmissive substrate; and at least one current regulator mounted on the light-transmissive substrate, wherein the current regulator is connected in series with the at least one LED. In another embodiment, an LED filament lamp is presented, that includes a dimmable LED driver circuit; a first channel LED array with at least two LED die and a first forward voltage drop; and a second channel LED array with at least one LED dies and at least one current regulator to cause a second forward voltage drop of the second channel LED array to increase as current through the second channel LED array increases, wherein the second channel LED array is connected in parallel with the first channel LED array.

Abstract: Configurable termination circuits for use with programmable logic devices are disclosed. In one implementation, the termination circuit may include one or more components to couple unused inputs of one or more configurable logic blocks to a fixed voltage. In another implementation, the termination circuit may include one or more components to couple unused inputs of one or more configurable logic blocks to an output of the one or more configurable logic blocks. In some implementations, the programmable logic device may include a platform management controller to configure the termination circuits based on configuration data.

Abstract: The present disclosure provides an ultra-wideband multiple-input multiple-output (MIMO) antenna, including a printed circuit board (PCB) and four mirror-symmetrical antenna components having a same structure and disposed on the PCB. The PCB includes a system ground and a circuit region, and an orthographic projection of the antenna components on the PCB falls within the system ground. The radiation portion is disposed parallel to and separately from the PCB. The connection portion includes a first grounding pin, a second grounding pin, and an antenna feed point pin respectively extending from the radiation portion toward the PCB and disposed separately from each other, the first grounding pin and the second grounding pin are connected to the system ground, and the antenna feed point pin is connected to an external power supply. The present disclosure further provides a terminal. The ultra-wideband MIMO antenna and the terminal have good antenna performance.

Abstract: An example device is configured to emit a first light having a first luminous flux and a peak intensity at a first wavelength that is greater than or equal to 400 nanometers (nm) and less than or equal to 480 nm. The first luminous flux is variable and/or the emission of the first light is interrupted one or more times. The device is also configured to emit a second light having a second luminous flux and a peak intensity at a second wavelength that is greater than or equal to 500 nm and less than or equal to 630 nm. The second luminous flux is variable and/or the emission of the second light is interrupted one or more times. The first luminous flux is at a maximum at least during a time at which the second luminous flux is not at a maximum.

Abstract: A field-programmable-gate-array (FPGA) IC chip includes multiple first non-volatile memory cells in the FPGA IC chip, wherein the first non-volatile memory cells are configured to save multiple resulting values for a look-up table (LUT) of a programmable logic block of the FPGA IC chip, wherein the programmable logic block is configured to select, in accordance with its inputs, one from the resulting values into its output; and multiple second non-volatile memory cells in the FPGA IC chip, wherein the second non-volatile memory cells are configured to save multiple programming codes configured to control a switch of the FPGA IC chip.

Abstract: An antenna structure includes a border frame, a first feed portion, a second feed portion, and two ground portions. The border frame includes a first gap and a second gap passing through the border frame, thereby defining a first radiating portion and a second radiating portion. The first feed portion is electrically coupled to the first radiating portion to supply an electric current to the first radiating portion. The second feed portion is electrically coupled to the second radiating portion to supply an electric current to the second radiating portion. The two ground portions are disposed between the first feed portion and the second feed portion and separated from each other. The two ground portions are electrically coupled to the first radiating portion or the second radiating portion.

Abstract: An LED lighting system is disclosed. In an example, an LED lighting system includes at least one lighting device, at least one driver, an LED circuit, and a switch. The driver has at least one bridge rectifier. The driver has a first voltage input from a mains power source and provides a second lower voltage output to the at least one lighting device. The LED circuit has two or more LEDs integrated in the at least one lighting device. The switch is integrated in the at least one lighting device and controllable by an end user. Additionally, the lighting device is configured to provide multiple brightness levels and/or color levels in response to control of the switch by the end user.

Abstract: A multichip package comprising: a first chip package comprising a first semiconductor IC chip, a first polymer layer in a space beyond and extending from a sidewall of the first semiconductor IC chip, a first through package via in the first polymer layer, and a first interconnection scheme under the first semiconductor IC chip, first polymer layer and first through package via, wherein the first semiconductor IC chip comprises a plurality of volatile memory cells configured to store first data associated with a plurality of resulting values for a look-up table (LUT) and a selection circuit configured to select, in accordance with a first input data set thereof, a data from a second input data set thereof as an output data for the logic operation; a first metal bump under the first chip package; and a non-volatile memory IC chip over the first chip package, wherein the non-volatile memory IC chip comprises a plurality of first non-volatile memory cells configured to store second data associated with the plura

Abstract: A system comprises an electromagnetic pulse generation system that comprises a first pulse generation circuit, a second pulse generation circuit, and a mixing circuit. The electromagnetic pulse generation system is operable to output a first pulse generated by the first pulse generation circuit onto a first signal path, output a second pulse generated by the second pulse generation circuit onto the first signal path, generate a third pulse by mixing, via the mixing circuit, a fourth pulse generated by the first pulse generation circuit and a fifth pulse generated by the second pulse generation circuit, and output the third pulse on the first signal path.