Abstract: An apparatus and method for stabilizing the frequency of a piezoelectric crystal resonator, especially useful in common emergency positioning radio beacons. A temperature compensated crystal oscillator circuit (TCXO) is mounted on one surface of a thin substrate. The TCXO includes a piezoelectric device such as a quartz resonator and a capacitor thermistor compensation network to reduce the frequency fluctuations of the crystal through variations in temperature. A heating circuit is mounted to the opposing surface of the substrate, thereby providing a thermal connection between the two circuits. The heating circuit includes a temperature sensor for sensing changes in ambient temperatures and a heater control amplifier for adjusting the power of a heating element. The substrate with the two circuits disposed thereon is suspended within a hermetically sealed enclosure by a plurality of support pins.

Abstract: In a three-band switching oscillator, a switching circuit is provided to switch the operating conditions of a first and second voltage-controlled oscillator and to switch an oscillation frequency band of the first voltage-controlled oscillator. The switching circuit switches a first switch in accordance with a switching voltage inputted to a first switching terminal and switches an oscillation frequency band in accordance with a switching voltage inputted to a second switching terminal. Only when a high-level switching voltage is inputted to the second switching terminal, the second switch is placed into an open condition by a high-level switching voltage inputted to the first switching terminal and placed into a closed condition by a low-level switching voltage inputted thereto, and when a low-level switching voltage is inputted to the second switching terminal, the second switch is placed into the open condition irrespective of the switching voltage inputted to the first switching terminal.

Abstract: An oscillating circuit removes a phase difference from between an input signal variable in frequency and a free-running oscillation signal through a two-step voltage-to-frequency control, wherein a frequency comparator, a detector, a flip flop circuit cooperates with a counter so as to vary a control range of the voltage-controlled oscillator in the vicinity of the input frequency, and, thereafter, a phase comparator makes the free-running oscillation signal synchronous with the input signal through the phase comparison therebetween, even if the voltage-to-frequency characteristics of the voltage-controlled oscillator is deviated from a design range, the deviation is taken up through the first-step control so that the manufacturer can delete an external regulator from the oscillating circuit.

Abstract: System and method for providing low noise signal having a broad tuning range (1 GHz to 10 GHz, or larger), with associated jitter no more than about 10 percent of the selected period of a target output signal. In a first stage, a ring-based VCO phase locked loop system provides a broad tuning range with some associated noise, and a second stage in a first state is relatively transparent, with no substantial differential attenuation based on frequency. After phase lock is achieved, the second stage is switched to a second state with low associated noise and high differential attenuation based on input signal frequency.

Abstract: An oscillator is described which exhibits low phase noise characteristics. The oscillator circuit of the invention includes an inductor in series with a low value capacitor, this series combination of an inductor and a capacitor, in parallel with a low value inductor forms a resonator whose inductive and capacitive reactances are a very low value. This causes the loaded Q to be very close to the resonator's unloaded Q.

Abstract: Phase port gain compensating circuitry is coupled to the phase modulation summing circuit and voltage controlled oscillator (VCO) gain compensating circuitry is coupled to the frequency control terminal of the VCO. Compensator control circuitry utilizes divider ratio control information to control the characteristics of the two compensators to compensate for otherwise undesirable effects on the phase-locked loop response parameters caused by changes in the divider ratio and in the VCO gain.

Abstract: A signal level detector including a diode envelope detector has a characteristic having both square-law and linear-law ranges separated by an intermediate transition range of variable-law operation. The detector is provided with circuits (38, 47, 48) to extend the linear-law range of the characteristic to overlap at least a part of the variable-law transition range. A circuit (66) is provided to detect operation through an input signal level transition point between said square-law range and the extended linear-law range for automatically modifying (39) the level detector circuit so that the voltage output thereof is continuously indicative of input power level through all of said ranges.

Abstract: A quadrature type FM demodulator device used, for example, in a television receiver, includes a band pass filter for filtering a sound intermediate frequency (SIF) signal input to the device. The output of the band pass filter is coupled through a filter circuit to an integrated circuit having a limiter amplifier and an FM detector to output a sound signal from the SIF signal.

Abstract: An electronic arrangement for generating an amplitude and phase-modulated carrier signal having a phase modulation stage with two inputs for receiving two modulation signals, which modulation stage generates two different phase-modulated signals having the same carrier frequency and substantially the same amplitude, and an output stage to which the phase-modulated signals are applied for assembling by means of summation of the phase-modulated signals to produce the amplitude and phase-modulated carrier, the amplitude of which is modulated in dependence on the phase difference of the phase-modulated signals and the phase of which is modulated in dependence on the sum of the phases of the phase-modulated signals.

Abstract: A 2.sup.N -phase phase modulator is formed from a plurality of series-connected 2-phase phase modulators. Each of the 2-phase phase modulators includes an Exclusive OR gate receiving at one input terminal one of a plurality of digital data sets. The first phase modulator receives a carrier signal at its other input terminal, and all subsequent phase modulators receive an output from a previous phase modulator through a 1/2 frequency divider.

Abstract: Methods and apparatus for rapidly and automatically syntonizing the frequency of a passive atomic resonator of an atomic clock with a reference frequency which corresponds to the frequency of an external reference signal. Any difference between the hyperfine transition frequency of the resonator and the reference frequency generates an error signal which is used as a basis for automatically determining the magnitude of a quantity which adjusts the actual hyperfine transition frequency of the resonator.

Abstract: An improvement in a frequency synthesizer comprising a voltage-controlled oscillator (VCO) for generating an output signal S.sub.VCO of frequency F.sub.VCO, a divider for dividing F.sub.VCO in division cycles with each division cycle consisting of the division of F.sub.VCO by N, Y times, and by (N+M), Z times, in an iterative manner to produce a divided output signal S.sub.N of frequency F.sub.N, where the division ratio is ##EQU1## and where N, Y, M and Z are integers, a reference signal generator for generating a reference signal S.sub.R of frequency F.sub.R, and a phase detector responsive to S.sub.N and S.sub.R to produce an output signal whose amplitude is representative of the phase therebetween. The improvement is a control circuit comprising logic for detecting and averaging the output signal from the phase detector during each division of F.sub.VCO in each division cycle to produce a d.c.

Abstract: A linear sweep frequency modulator for a varactor tuned transistor microwave oscillator used in an FM/CW radio altimeter where the oscillator-frequency v. varactor bias characteristic is non-linear. A linear triangular wave is converted by means of a function generator to the non-linear wave required for varactor bias to cause linear frequency modulation of the oscillator. Linearity of modulation is tested by measuring variations in the period of a calibration signal derived from a delay line. Variations in the period of the calibration signal are measured by determining the difference between the average and the instantaneous calibration period and sampling the difference during each cycle of the triangular wave, once during the upswing thereof when the oscillator is at low frequency and once during the down swing thereof when the oscillator is at high frequency and separately integrating the up swing and down swing samples.

Abstract: A phase-locked loop provides an output frequency, locked to a multiple N of a reference frequency, responsive to a frequency-control voltage supplied to the output-frequency-generating voltage-controlled oscillator from the output of a differential amplifier. The differential amplifier inputs are provided with voltages sampled from the output of a pair of integrators respectively enabled for integration during complementary, and substantially identical, portions of the phase detector output waveform. Output-frequency-control voltage ripple is substantially reduced, with concomitant reduction of frequency modulation of the output freqeuncy, over the reference frequency period.

Abstract: An improvement in a digital frequency synthesizer comprising a voltage-controlled oscillator (VCO) for producing a signal S.sub.VCO having a frequency f.sub.VCO, a first signal generator for generating a plurality of signals S.sub.AS having a spectrum of frequencies f.sub.AS, all exceeding a given minimum frequency f.sub.M, a mixer responsive to S.sub.VCO and to S.sub.AS to produce an output signal having a frequency (f.sub.VCO .+-.f.sub.AS), a divide-by-N divider responsive to (f.sub.VCO .+-.f.sub.AS) to produce a signal S.sub.N having a frequency f.sub.N, a second signal generator for generating a first reference signal S.sub.R1 having a frequency f.sub.R1, a phase detector responsive to S.sub.N and S.sub.R1 to produce a d.c. control signal E.sub.c whose amplitude varies with the phase relation of S.sub.N and S.sub.R1, and a filter for supplying E.sub.c back to said VCO, the VCO being responsive to E.sub.c to produce an output signal S.sub.VCO of frequency f.sub.VCO where (f.sub.VCO .+-.f.sub.AS )=Nf.sub.

Abstract: An improvement in a phase locked loop comprising a VCO for generating a signal S.sub.VCO of frequency f.sub.VCO, a divider for dividing f.sub.VCO to produce a signal S.sub.N of frequency f.sub.N, a reference signal generator for generating a reference signal S.sub.R of frequency f.sub.R, and with said VCO responsive to a particular value E.sub.c of a variable control signal e.sub.c to cause f.sub.N =f.sub.R for a given value of N, the improvement consisting of a phase/frequency detector for detecting and correcting frequency and phase differences between S.sub.N and S.sub.R to cause f.sub.N =f.sub.R and comprising a three stage left/right shift register responsive to one of signals S.sub.N or S.sub.R to shift binary O's into the first stage thereof in the right direction and responsive to the other of signals S.sub.N or S.sub.R to shift binary 1's into the third stage thereof in the left direction.

Abstract: A clock recovery system including a VCO responsive to a voltage signal for generating a clock signal. A phase detector includes a register and a PROM, the register counting the clock signal to derive the output clock signal. The PROM is responsive to input data and the count in the register to detect and store information concerning relative phase relationships. A counter contains a count from which the control voltage for the VCO is derived. The PROM is operable to alter the count in the counter, thereby performing frequency adjustments, and to alter the count in the register to perform phase adjustments. Also, a converter, operable by the phase detector, may also derive a voltage signal for damping purposes.

Abstract: A method for temperature compensating the output of an oscillator circuit and apparatus for performing the method. This method employs fractional cycle synthesis to maintain the output frequency of a voltage-controlled oscillator at a desired value, the reference frequency of the circuit being derived from a crystal oscillator. To calibrate the circuit, the crystal oscillator is cycled in temperature. The frequency output of the crystal oscillator is accurately counted while a digital signal representing temperature is generated by an analog-to-digital converter from a temperature sensor. A signal representing the relationship between crystal frequency and temperature is stored in a memory and is available during actual operation of the oscillator for temperature compensation.

Abstract: A signal processor circuit including a plurality of similar cascaded stages, each of which is capable of locking onto and tracking a different frequency of a multiple-frequency composite signal applied to the processor. Each of the stages may comprise a frequency locked loop plus a variable frequency stop, wherein the tuning of the variable frequency stop tracks the output of the frequency locked loop. The variable frequency stop circuit passes the non-locked components to the next similar stage which locks onto one of the remaining components.