Patents Examined by David L. Stewart
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Patent number: 4058682Abstract: An incoming bit stream of a first bit frequency, divided into a succession of n-bit words, is converted into an outgoing bit stream of a second bit frequency with the aid of two n-stage buffer registers alternately loaded by two sets of interleaved writing pulses, on every n.sup.th cycle of the first bit frequency, with incoming words which are alternately read out on every n.sup.th cycle of the second bit frequency by two sets of interleaved reading pulses. A logic network detects the coincidence of a reading pulse from one set with either of two guard pulses immediately preceding and succeeding, respectively, each writing pulse of the corresponding set; upon such coincidence, a switching network transposes the two sets of writing pulses to restore an original relative pulse position in which the reading pulses of each set occur substantially midway between writing pulses of the same set.Type: GrantFiled: June 4, 1976Date of Patent: November 15, 1977Assignee: Societa Italiana Telecomunicazioni Siemens S.p.A.Inventors: Roberto Delle Donne, Luigi Musumeci
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Patent number: 4056686Abstract: A multiplexed signal reference level equalizer is arranged to provide an output signal which is a function of different selectable input signals wherein the input signals have respective reference, or common, signal levels. An input signal multiplexer is used to select an input signal from a plurality of remote variable signals or known local calibration signals. The selected remote signal has a common mode signal, represented by the difference between the remote signal common and a local common, superimposed on it. The combined signal is applied to the non-inverting input of a first operational amplifier. Concurrently, the common mode signal is amplified by a second operational amplifier and is applied to the inverting input of the first operational amplifier to be subtracted from the combined signal. A selected local input signal has the common mode signal superimposed on it before it is applied to the first operational amplifier for a similar common mode signal subtraction process.Type: GrantFiled: October 12, 1976Date of Patent: November 1, 1977Assignee: Honeywell Inc.Inventor: Martin Zielinski
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Patent number: 4054755Abstract: A method of providing a multi-port conference circuit for use in a telephone switching system employing pulse coded modulated signals for transmission and supervision. Samplings of coded information are employed as a source of conference data and comparison with the digital information contained therein is employed to choose the speaker in a conference group. Included circuitry provides compensation for degradation caused by speech clipping and noise.Type: GrantFiled: October 14, 1976Date of Patent: October 18, 1977Assignee: GTE Automatic Electric Laboratories IncorporatedInventors: David Quon Lee, Donald W. McLaughlin
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Patent number: 4054753Abstract: A TDMA system in which each station times its respective data burst from a reference sync burst transmitted by a designated primary reference station over the satellite link. Another station transmits a secondary sync burst timed from the primary stations sync burst. To maintain synchronism at the satellite each station has a burst synchronizer operated by receipt of the primary reference sync burst. The secondary sync burst is also received by each of the stations and is capable of ensuring synchronization in case of failure of the primary stations's sync burst.Type: GrantFiled: October 20, 1975Date of Patent: October 18, 1977Assignee: Digital Communications CorporationInventors: Pradman Kaul, Ova Gene Gabbard, John M. Husted
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Patent number: 4053715Abstract: A stuff system for converting a 50 KBS pulse train to standard 64 KBS provides a 3 bit 101 and 5 bit 01001 control bit stuffing code which tolerates both single and double errors without producing an out-of-frame condition.Type: GrantFiled: March 22, 1976Date of Patent: October 11, 1977Assignee: TRW Inc.Inventor: Paul E. Drapkin
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Patent number: 4053714Abstract: This invention relates to data transmission system of the type where a plurality of transmitters are located at a location remote from a receiver and are adapted to transmit information from their location in turn to the receiver. The transmitters in the case of this invention are each self-powered and have their own transmitter timer associated with them. They are all set to operate from time zero by a master timer and their individual power sources are recharged for the power dissipated in each of their transmissions by a charging pulse that is received over the transmission line. The resetting of the transmitter timers to cause them to transmit in sequence is done during the recharging period which follows the transmissions of the series of transmitters.Type: GrantFiled: April 6, 1976Date of Patent: October 11, 1977Assignee: Canadian PGL Electronics Inc.Inventor: Robert G. Long
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Patent number: 4053713Abstract: The sum and difference signals of a pair of data channels are applied to a pair of roll-off filters, respectively. The outputs of said roll-off filters are modulated by a pair of carrier signals which have the phase difference (.pi./2) to each other. The modulated signals are added to each other in an adder and a single output signal is provided from the output of said adder. Said output signal and another output signal relating to another pair of data channels, and some pilot signals are applied to an adder, the output of which is transmitted to a receiving station in the form of a multi-channel multiplex data signal. At the receiving station, the received signal is demodulated with the inverse process of the above modulation steps and the demodulated data signals are applied to an automatic equalizer. The present invention described above provides high speed data transmission through a narrow-band-line which has only almost the Nyquist band width.Type: GrantFiled: February 2, 1976Date of Patent: October 11, 1977Assignee: Oki Electric Industry Co., Ltd.Inventor: Kazuhiko Nitadori
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Patent number: 4052566Abstract: A multiplexer transmitter terminator is disclosed for connection to a multiplexer transmitter in a system having a plurality of multiplexer transmitters connected on a common communication line. Each of the multiplexer transmitters is assigned a time period for transmission relative to a multiplexer time clock. The improvement includes a counter circuit connected to the multiplexer time clock for providing a counter output upon counting a preselected number of clock pulses which output corresponds to the time period assigned for transmission of the multiplexer transmitter. A line receiver is connected to the communication line for providing an output upon detecting a predetermined period of signal absence on the communication line. The line receiver output is connected to the counter circuit to reset the counter after the predetermined period of signal absence.Type: GrantFiled: December 24, 1975Date of Patent: October 4, 1977Assignee: D.D.I. Communications, Inc.Inventor: William Allan MacKay
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Patent number: 4052567Abstract: A multiplexer receiver terminator is disclosed for connection to a multiplexer receiver in a system having a plurality of multiplexer receivers connected on a common communication line. Each of the multiplexer receivers is assigned a time period for reception relative to a multiplexer time clock. The improvement includes a counter circuit connected to the multiplexer time clock for providing a counter output upon the clock counter counting between two preselected clock counts which correspond to the time period assigned for reception of the multiplexer receiver. A line receiver is connected to the communication line for providing an output upon detecting a predetermined period of signal absence on the communication line. The line receiver output is connected to the counter for resetting the counter after the predetermined period of signal absence. The counter circuit is connected to the multiplexer receiver for enabling reception from the communication line only during an output of the counter circuit.Type: GrantFiled: December 24, 1975Date of Patent: October 4, 1977Assignee: D.D.I. Communications, Inc.Inventor: William Allan MacKay
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Patent number: 4051328Abstract: A digital time division multiplex communication network wherein the subscriber terminals are disposed in a fixed order on a TDM trunk going out from and ending in the terminal exchange is described. The data intended for the subscriber terminals are sent out by the terminal exchange together with an unmodulated carrier byte in the order of the connection of the subscriber terminals. After receiving the information intended therefor and after modulation of the carrier byte with the information to be supplied, the subscriber terminals are no longer capable of reception until the next pulse frame. The carrier bytes sent which are transmitted further and now modulated pass without hindrance through succeeding subscriber terminals.Type: GrantFiled: August 5, 1975Date of Patent: September 27, 1977Assignee: Siemens AktiengesellschaftInventor: Alfred Mattern
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Patent number: 4049917Abstract: A transmitting terminal, communicating via a PCM link with a remote receiving terminal, processes two simultaneously arriving bit streams consisting of recurrent frames of 32 time slots, 29 of these time slots containing 8-bit code words which represent voice samples from as many PCM channels. The two arriving bit streams are transcoded by an ADPCM (adaptive differential pulse-code modulation) technique to convert the 8-bit words into substantially equivalent 4-bit words which are then combined, in interleaved relationship, into a single bit stream sent to the receiving terminal, each frame of this composite bit stream having 29 of its 32 time slots occupied by two four-bit words respectively taken from the original bit streams. At the receiving terminal a complementary procedure is followed to separate the two groups of 4-bit code words from each other and to reconvert each of them into an 8-bit word, with substantial reconstitution of the original bit streams.Type: GrantFiled: April 23, 1976Date of Patent: September 20, 1977Assignee: CSELT - Centro Studi e Laboratori Telecomunicazioni S.p.A.Inventors: Maurizio Copperi, Luciano Nebbia
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Patent number: 4048446Abstract: A plurality of subscriber stations and a plurality of switching points are connected in series in a loop circuit transmitting signals in one direction, parallel line sections disposed in parallel with the loop circuit are each connected with two switching points and each switching point contains a switch controlled by a failure detector and adapted for switching between a loop circuit section and a parallel line section. The transmission direction of the parallel line sections corresponds to the direction of the loop circuit; an incoming parallel line section which by-passes one or two immediately preceding switching points and an out-going parallel line section which by-passes one or two immediately succeeding switching points are connected to each switching point.Type: GrantFiled: December 3, 1975Date of Patent: September 13, 1977Assignee: Hasler AGInventors: Emanuel R. Hafner, Zdenek Nenadal
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Patent number: 4048445Abstract: A digital data switch of the time-space-time (TST) type for switching pulse code modulated (PCM) data is disclosed. The switch combines a parity bit with each PCM word being switched in a conventional way to supervise the internal operation of the switch. The invention consists of a method of using such a switch for checking that a correct or intended connection is made through the switch by inserting incorrect parity with PCM words to the input in question immediately after the connection is established and checking the outlets of the switch to determine the output/s having incorrect parity. The check is made by the central control of the switch which compares the output/s having incorrect parity with the intended output/s. A simple circuit arrangement for distinguishing deliberately introduced wrong parity from through connection faults is also disclosed.Type: GrantFiled: August 11, 1975Date of Patent: September 13, 1977Assignee: L.M. Ericsson Pty. Ltd.Inventor: Walter Ghisler
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Patent number: 4046963Abstract: A time slot association arrangement for a high quality connection in a time multiplex system. An input time slot reserved for high quality lines is associated with an output time slot. Samples written in the "In" slot are read during the "Out" slots in the order in which they were entered. The quality slots are detected and the reference code is incremented by one on an "Out" slot, and the code on an "In" slot is decreased by one. As the next step, the output slot providing maximum results is identified and associated with the input time slots following the maximum result output slot.Type: GrantFiled: February 9, 1976Date of Patent: September 6, 1977Assignee: International Standard Electric CorporationInventor: Hans Helmut Adelaar
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Patent number: 4045618Abstract: The invention comes within the field of digital transmission and concerns e synchronization of two bit trains in relation to the beginning of a frame. According to the invention, one of the trains crosses a memory of the FIFO type, whose writing speed corresponds to the frequency of that train and whose reading is controlled by a detector of the locking word in that frame and by a signal indicating the synchronization of the two trains. Application: digital PCM terminals comprising thirty telephone channels.Type: GrantFiled: January 29, 1976Date of Patent: August 30, 1977Assignee: Compagnie Industrielle des Telecommunications CIT-ALCATEL S.A.Inventors: Jean-Louis Lagarde, Gilles Gauriat
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Patent number: 4042780Abstract: A serial data communication loop system includes single input-output controllers and/or dual message transmission with a novel adaptor unit for converting from a single to dual message frame and/or from a dual to single message frame. The message frames are multiple bit binary coded signals. The adaptor unit includes first and second converting sections, the first converting from a single input to dual output message frames and the second from a pair of identical messages to a single message output. The first section includes an amplifier connected to a polarity and level sensor and to a time delay which activates a disable timer to the amplifier and a strobe timer to operate a pair of transmitters to transmit the dual message frames. The second section includes a pair of receivers connected to a logic selector in combination with individual monitors which encode the status at the receivers to normally transmit from one receiver and automatically change to the second if the first fails.Type: GrantFiled: July 23, 1975Date of Patent: August 16, 1977Assignee: Johnson Controls, Inc.Inventor: Frederick J. Wolters
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Patent number: 4039767Abstract: A method of calibrating acoustic emission transducers. The sensitivity of a standard transducer is first determined utilizing a reciprocity calibration technique, and the standard transducer and the acoustic emission transducer are then connected to a bounded acoustic medium. Random acoustic white noise is transmitted into the acoustic medium thereby establishing a multi-mode reverberant sound field, and the output responses from the standard transducer and the acoustic emission transducer to the reverberant sound field are obtained and compared to determine the sensitivity of the acoustic emission transducer.Type: GrantFiled: July 14, 1975Date of Patent: August 2, 1977Assignee: Westinghouse Electric CorporationInventor: Walter C. Leschek
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Patent number: 4034159Abstract: A switching exchange of the space switching type is adapted to provide interconnection of the lines of a communication network, each line being able to provide several multiplex channels, each channel being different from the other ones in the frequency domain, in the time domain or in any other way. The control unit of a switching exchange of the space switching type is adapted to enable the system to interconnect more than two lines of the multiplex type together, by the provision of complementary logic which determines for any new connection of multiplex lines whether the required connection is possible or not in accordance with the state of the network when this request occurs. This operation is carried out by checking what are the lines which would be interconnected should the required connection be made, and whether the use of the transmission channels in the assembly of said lines, as it is in the initial state, will cause interference between the channels when the required connection is made.Type: GrantFiled: July 19, 1974Date of Patent: July 5, 1977Assignee: International Business Machines CorporationInventor: Rene Henri Buron
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Patent number: 4032716Abstract: A measure of the noise performance of an FDM system can be made by making measurements when the system is carrying traffic. The technique consists of creating a quiet channel in the system, and measuring the noise level in this quiet channel. The tester operates by Teeing off the broad band incoming signal, automatically attenuating the broad band signal to a predetermined level, and then measuring the power level in a narrow bandwidth lying within a single channel. The measurement is performed using an automatic attenuator controlled by a feedback loop containing, band pass filters, superhetrodyne detectors, a comparator controlling a counter, which in turn controls the automatic attenuator.Type: GrantFiled: May 23, 1975Date of Patent: June 28, 1977Assignee: The Post OfficeInventor: Edgar Robert Allen
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Patent number: 4032719Abstract: Up to k (e.g. 4) slot interchange memory/switch modules operate under common control to provide varied time interchange connective pairing associations between space divided telephone and data lines and time divided channels of digital trunks. A high scanning rate combined with dot-OR'ed (commoned) busing of addresses and outputs of all interchange modules permits in-service expansion of interchange switching capacity, from the capacity of 1 module to that of k modules, with minimal re-work of existing circuits and common control programs. The interchange slot locations of the aggregate array are thereby linkable in paired randomly ordered time interchange associations, over the entire addressing range of the aggregate. Additional interchange spaces are available in each switch module for interchanging activity bits in association with information traffic. These bits are useful for companding control, echo cancellation, TASI and network routing.Type: GrantFiled: June 26, 1975Date of Patent: June 28, 1977Assignee: International Business Machines CorporationInventor: Herman Blasbalg