Patents Examined by Dharti Patel
  • Patent number: 9847624
    Abstract: In one embodiment an ionic airflow system comprises an anode, a cathode platform having an elongated surface, and a first ultrasonic transducer to direct ultrasonic waves into the cathode platform. Other embodiments may be described.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: December 19, 2017
    Assignee: Intel Corporation
    Inventors: Johan Ploeg, David Pidwerbecki
  • Patent number: 9847623
    Abstract: The present disclosure is directed to ion generators and their enclosures that include a base, a non-linear wall projecting from the base, a top connected to the non-linear wall a top connected to the non-linear wall, wherein the base, the non-linear wall and the top form a closed space, and at least one ionizing element extending from the device, wherein the at least one ionizing element is configured to receive a voltage capable of producing ions from a power source in the closed space.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: December 19, 2017
    Assignee: PLASMA AIR INTERNATIONAL, INC
    Inventor: Lawrence T. Sunshine
  • Patent number: 9842716
    Abstract: A set of circuit interrupters and electrical enclosures that are configured to permit an electrical enclosure having a current rating to have connected therewith a circuit interrupter having a current carrying rating no greater than the current rating. However, a current interrupter having a current carrying rating less than the current rating of the electrical enclosure potentially may be connected therewith. Such electrical interruption equipment employs threaded studs on bus bars that are of varying sizes and/or are separated by varying distances in order to resist an electrical enclosure having a current rating from being electrically connected with a circuit interrupter having a current carrying rating greater than the current rating.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: December 12, 2017
    Assignee: EATON CORPORATION
    Inventors: James Gerard Maloney, Tony Ray Benson, Eric Alan Samuelson
  • Patent number: 9842781
    Abstract: An electrostatic chuck system includes an electrostatic chuck with a plurality of unit chucks supporting a display substrate, an optical photomask on the display substrate, the optical photomask having a material to be transferred onto the display substrate, a light source on the optical photomask, a gap measuring meter for measuring a gap between the display substrate and the optical photomask, a power source unit for applying power to each of the plurality of unit chucks through variable resistance units respectively connected to the plurality of unit chucks, and a control unit electrically connected to the gap measuring meter, the variable resistance units, and the power source unit, and transmits a signal for adjusting the gap.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: December 12, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Duckjung Lee, Jaesik Kim, Hyunsung Bang, Jungsun Park
  • Patent number: 9843183
    Abstract: An ESD protection circuit is disclosed, in which an RC trigger circuit and a transmission gate are used for determination of ESD protection triggering, and a silicon-controlled rectifier for ESD current conductance. The RC trigger circuit and the transmission gate allow improved trigger efficiency. In addition, the silicon-controlled rectifier incorporates first and second resistors, which can be implemented to have very low resistance values and are therefore able to effectively prevent the occurrence of latch-up during normal operation, as well as pull-up and pull-down transistors which can make an additional contribution to latch-up inhibition when turned on.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: December 12, 2017
    Assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corporation
    Inventor: Bin Lv
  • Patent number: 9837813
    Abstract: A surge protector for providing electricity to an electronic device. The surge protector including a housing defining a module slot and including a module connector positioned within the module slot and a module insertable into the module slot and including at least one connector port and a housing connector. The housing connector can be operably connectable to the module connector when the module is inserted into the module slot. The cable can be connected to the module and housing such that the module can be positioned at a location remote from the housing.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: December 5, 2017
    Assignee: Core Brands, LLC
    Inventors: Steven H. Newell, Gerald B. Hoopes
  • Patent number: 9831665
    Abstract: A sensing transistor is provided to supply a detection current in proportion to a current flowing to an output transistor. A shunt resistor is connected between a source of the sensing transistor and the ground. A voltage follower circuit receives a terminal voltage of the shunt resistor and have a base-emitter path of each of transistors in a path between its input and its output. An output voltage of the voltage follower circuit is applied to a current generation resistor. A current drawing circuit draws a control current, which corresponds to a current flowing in the current generation resistor, from a gate control line extending from a gate control circuit to a gate of the output transistor.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: November 28, 2017
    Assignee: DENSO CORPORATION
    Inventor: Junichi Yoshida
  • Patent number: 9831666
    Abstract: Apparatus and methods for electrostatic discharge (ESD) protection of radio frequency circuits are provided. In certain configurations, an integrated circuit includes a first pin, a second pin, a forward ESD protection circuit, and a reverse ESD protection circuit. The forward ESD protection circuit includes one or more P+/N-EPI diodes, one or more ESD protection devices, and one or more P-EPI/N+ diodes electrically connected in series between the first pin and the second pin. A first P+/N-EPI diode of the one or more P+/N-EPI diodes includes an anode electrically connected to the first pin. The reverse ESD protection circuit comprising one or more P+/N-EPI diodes, one or more ESD protection devices, and one or more P-EPI/N+ diodes electrically connected in series between the second pin and the first pin. A first P-EPI/N+ diode of the one or more P-EPI/N+ diodes includes a cathode electrically connected to the first pin.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: November 28, 2017
    Assignee: ANALOG DEVICES, INC.
    Inventors: Srivatsan Parthasarathy, Javier Alejandro Salcedo, Rodrigo Carrillo-Ramirez
  • Patent number: 9825452
    Abstract: An apparatus may include a sensor housing, a light sensor disposed within the sensor housing, the light sensor arranged to generate a detection signal when light impinges on the light sensor, a sensor lens disposed at least partially outside the sensor housing, wherein a distal portion of the sensor lens extends a first distance above the sensor housing, the sensor lens being transparent, wherein light received from outside the sensor housing is transmitted to the light sensor; and a light emitter assembly disposed outside the sensor housing at a second distance above the housing less than the first distance.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: November 21, 2017
    Assignee: Littelfuse, Inc.
    Inventors: Niels Holmgaard, Jakob Seedorff
  • Patent number: 9826611
    Abstract: An ESD protection device includes: a first insulating layer (2a); a second insulating layer (2b) stacked on the first insulating layer (2a); a first via conductor (6a) extending through the first insulating layer (2a) in a thickness direction; a discharge gap portion (10) provided so as to be in contact with the first via conductor (6a), between the first insulating layer (2a) and the second insulating layer (2b); a first wiring line (7a) that is arranged on a surface of the first insulating layer (2a) opposite to the discharge gap portion (10) and that is electrically connected to the first via conductor (6a); and a second wiring line (7b) that is arranged on one surface of the second insulating layer (2b) and that includes a portion facing the first via conductor (6a) with at least the discharge gap portion (10) interposed therebetween.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: November 21, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yoshihito Otsubo
  • Patent number: 9811712
    Abstract: Provided is a intensified sensor array for static electricity having a structure in which a static electricity preventing wiring covers an upper surface of a pixel circuit to cut off static electricity, so when static electricity of a high voltage is momentarily generated, the static electricity induced through the static electricity preventing wiring is discharged, thereby being capable of effectively protecting the pixel circuit of a lower part from the static electricity.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: November 7, 2017
    Assignee: SILICON DISPLAY TECHNOLOGY
    Inventors: Moon Hyo Kang, Ji Ho Hur, Hyo Jun Kim, Bong Yeob Hong
  • Patent number: 9812269
    Abstract: A system for detecting arc faults in a solar array generally comprises a plurality of solar panels connected in series, where each solar panel comprises a positive and negative output. A panel monitoring device is connected between the positive and negative output of each solar panel. The panel monitoring device comprises a switching device configurable to disconnect an output from the solar panel. The panel monitoring device comprises logic configured to scan a frequency spectrum of the solar panel and log locations of a plurality of valleys in the spectrum, monitor the plurality of valleys to determine if the plurality of valleys rise above a threshold value, report a fault status when the plurality of valleys rise above the threshold value, and automatically disable the output of the solar panel upon the determination of a fault status.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: November 7, 2017
    Assignee: Synapse Wireless, Inc.
    Inventors: Eric Joseph Ibarra, Jeremy Jacob Zoller
  • Patent number: 9814121
    Abstract: A semi-wireless electric switch system controls power to electrical fixtures by multiplexing to remote solid state relays installed in the wiring junction of the fixtures. A mobile application is provided which may be downloaded and installed on the user's smartphone, tablet, laptop, or other electronic device. The application may be used to control the switch system. Wall switches are replaced by small flat-screen visual displays with touchscreen capability, which enable an installation technician to install additional lights, wall outlets, and other fixtures using existing wiring. Each relay has a preprogrammed three-digit code prefix, and receives and executes a simple digital command to turn on or turn off power to the fixture through the existing wiring.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: November 7, 2017
    Inventor: Richard L. Langdon, II
  • Patent number: 9812437
    Abstract: Provided is a semiconductor integrated circuit device including: an output buffer circuit having a P channel transistor connected between a first power supply terminal and a signal terminal; a potential control circuit that supplies potential from the first power supply terminal or the signal terminal to a back gate of the P channel transistor according to the potential of the signal terminal; a first protection diode having an anode connected to the signal terminal; a common discharge line connected to a cathode of the first protection diode; an electrostatic discharge protection circuit connected between the common discharge line and a second power supply terminal; and a second protection diode having an anode connected to the second power supply terminal and a cathode connected to the signal terminal.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: November 7, 2017
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Hideyuki Kakubari
  • Patent number: 9812439
    Abstract: An electrostatic discharge (ESD) device for protecting an input/output terminal of a circuit, the device comprising a first transistor with an integrated silicon-controlled rectifier (SCR) coupled between the input/output (I/O) terminal of the circuit and a node and a second transistor with an integrated silicon-controlled rectifier coupled between the node and a negative terminal of a supply voltage, wherein the silicon-controlled rectifier of the first transistor triggers in response to a negative ESD voltage and the silicon-controlled rectifier of the second transistor triggers in response to a positive ESD voltage.
    Type: Grant
    Filed: October 14, 2014
    Date of Patent: November 7, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Timothy Patrick Pauletti, Sameer Pendharkar, Wayne Tien-Feng Chen, Jonathan Brodsky, Robert Steinhoff
  • Patent number: 9805965
    Abstract: Implementations described herein provide a chucking circuit for a pixilated electrostatic chuck which enables both lateral and azimuthal tuning of the RF coupling between an electrostatic chuck and a substrate placed thereon. In one embodiment, a chucking circuit for an electrostatic chuck (ESC) has one or more chucking electrodes disposed in a dielectric body of the ESC, a plurality of pixel electrodes disposed in the dielectric body, and a chucking circuit having the one or more chucking electrodes and the plurality of pixel electrodes, the chucking circuit operable to electrostatically chuck a substrate to a workpiece support surface of the ESC, the chucking circuit having a plurality of secondary circuits, wherein each secondary circuit includes at least one capacitor of a plurality of capacitors, each secondary circuit is configured to independently control an impedance between one of the pixel electrodes and a ground.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: October 31, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Reza Sadjadi, Wendell Glen Boyd, Jr., Vijay D. Parkhe, Maxim Mikhailovich Noginov
  • Patent number: 9800042
    Abstract: A controller configured to detect fault conditions in a circuit that operates an electrical-load includes a gate-driver and a voltage-detector. The gate-driver is configured to control a gate-current to a switching-device. The gate-current is controlled such that the switching-device is operated in a linear-state when the switching-device transitions from an on-state to an off-state. The voltage-detector is configured to determine a voltage-drop across the switching-device. The controller is configured to indicate a no-fault condition when the voltage-drop is greater than a voltage-threshold for more time than a no-fault interval after the switching device is operated from the on-state to the linear-state.
    Type: Grant
    Filed: February 16, 2015
    Date of Patent: October 24, 2017
    Assignee: DELPHI TECHNOLOGIES, INC.
    Inventors: Marc R. Engelhardt, Kevin M. Gertiser, Vijayakumaran Nair Balakrishnan Nair, Peter A. Laubenstein
  • Patent number: 9797941
    Abstract: A DC arc fault detection module includes an LF current section, an LF voltage section, and an HF current section having a plurality of outputs, each output being associated with a respective one of a plurality of frequency sub-bands. The HF current section is structured to, for each of the frequency sub-bands, (i) detect a rise in energy of the frequency sub-band above a first predetermined threshold level for at least a certain amount of time and (ii) cause the associated output to indicate a rise in energy detection in response to detecting the rise in energy above the associated threshold level for at least the associated certain amount of time. The module includes a processing device structured to determine whether a DC arc fault has occurred based on the outputs from the LF and HF current and LF voltage sections.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: October 24, 2017
    Assignee: EATON CORPORATION
    Inventors: David Kolker, Chaitanya Bhalwankar, Birger Pahl, Steven Christopher Schmalz, Archit Agarwal
  • Patent number: 9797940
    Abstract: An AC arc fault detection module includes an LF current section, an LF voltage section, and an HF current section having a plurality of outputs, each output being associated with a respective one of a plurality of frequency sub-bands. The HF current section is structured to, for each of the frequency sub-bands, (i) detect a rise in energy of the frequency sub-band above a first predetermined threshold level for at least a certain amount of time and (ii) cause the associated output to indicate a rise in energy detection in response to detecting the rise in energy above the associated threshold level for at least the associated certain amount of time. The module includes a processing device structured to determine whether an AC arc fault has occurred based on the outputs from the LF and HF current and LF voltage sections.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: October 24, 2017
    Assignee: EATON CORPORATION
    Inventors: David Kolker, Chaitanya Bhalwankar, Birger Pahl, Steven Christopher Schmalz, Archit Agarwal
  • Patent number: 9793702
    Abstract: A circuit interrupting device that includes a line conductor, a load conductor, an interrupting device, a delay circuit, and a fault detection circuit. The interrupting device disconnects the line conductor from the load conductor when the circuit interrupting device is in a tripped condition. The delay circuit includes a first switch, a second switch, and a third switch, and delays the disconnecting of the line conductor from the load conductor. The fault detection circuit detects a fault condition and generates a fault detection signal when the fault condition is detected. The fault detection circuit provides the fault detection signal to the first switch to trigger the first switch, and the delay circuit delays the triggering of the second switch and the third switch. After an amount of time has elapsed, the second switch and the third switch are triggered to place the circuit interrupting device in the tripped condition.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: October 17, 2017
    Assignee: Hubbell Incorporated
    Inventor: Stephen Paul Simonin