Abstract: The invention concerns a sensor with silicon-containing components from whose sensitive detection element electrical signals relevant to a present analyte can be read out by means of a silicon semiconductor system. The invention is characterized in that the silicon-containing components are covered with a layer made of hydrophobic material in order to prevent unwanted signals caused by moisture.

Abstract: A semiconductor photo detecting element includes a PIN-type photo detecting element and window semiconductor layer. The PIN-type photo detecting element has a semiconductor substrate, a first semiconductor layer, a second semiconductor layer and a third semiconductor layer. The first semiconductor layer is provided on the semiconductor substrate, is lattice-matched to the semiconductor substrate, includes a first conductivity type dopant, and has first band gap energy. The second semiconductor layer is provided on the first semiconductor layer, has the first band gap energy, and has a concentration of the first conductivity type dopant lower than that of the first semiconductor layer or is substantially undoped. The third semiconductor layer is provided on the second semiconductor layer. The window semiconductor layer has second band gap energy larger than the first band gap energy at a light-incoming side with respect to the second semiconductor layer and has a thickness of 5 nm to 50 nm.

Abstract: According to an embodiment, there is provided a thin film transistor substrate divided into a display area displaying the image and a non-display besides the display area, the thin film transistor substrate comprising: a common voltage line for MPS (mass production system) test and a grounding line for MPS (mass production system) test formed at the edge of the non-display area in parallel; an insulating layer covering the common voltage line for MPS (mass production system) test and the grounding line for MPS (mass production system) test; and an electrode layer formed on the insulating layer corresponded to the common voltage line for MPS (mass production system) test and the grounding line for MPS (mass production system) test. Thus, the present invention provides a thin film transistor substrate and a fabricating method thereof for minimizing defects due to static electricity.

Abstract: Materials and structures whose index of refraction can be tuned over a broad range of negative and positive values by applying above band-gap photons to a structure with a strip line element, a split ring resonator element, and a substrate, at least one of which is a photoconductive semiconductor material. Methods for switching between positive and negative values of n include applying above band-gap photons to different numbers of elements. In another embodiment, a structure includes a photoconductive semiconductor wafer, the wafer operable to receive above band-gap photons at an excitation frequency in an excitation pattern on a surface of the wafer, the excitation patterns generating an effective negative index of refraction. Methods for switching between positive and negative values of n include projecting different numbers of elements on the wafer. The resonant frequency of the structure is tuned by changing the size of the split ring resonator excitation patterns.

Abstract: A high power light emitting device assembly with electro-static-discharge (ESD) protection ability and the method of manufacturing the same, the assembly comprising: at least two sub-mounts, respectively being electrically connected to an anode electrode and a cathode electrode, each being made of a metal of high electric conductivity and high thermal conductivity; a light emitting device, arranged on the sub-mounts; and an ESD protection die, sandwiched and glued between the sub-mounts, for enabling the high-power operating light emitting device to have good heat dissipating path while preventing the same to be damaged by transient power overload of static surge.

Abstract: A semiconductor chip 36 is mounted on a package substrate 30 with its circuit side facing to a board 38. Heat is dissipated from an upper side of the semiconductor chip 36 opposite to the circuit side. A sealing resin 32 seals around the periphery of the semiconductor chip 36 so that the upper side of the semiconductor chip 36 is exposed to atmosphere. A fixing member 34 is buried in the sealing resin 32 so that a hook 40 formed on the tip of the fixing member 34 extends above the upper side of the semiconductor chip 36. A spreader 10 dissipates heat emitted from the semiconductor chip 36. A guiding slot 12 is formed on the side facing to the package substrate 30 of the spreader 10. The hooks 40 of the fixing members 34 are inserted into the guiding slots 12 respectively, and then the spreader 10 is rotated by predetermined angle against the package substrate 30. Then, the hooks 40 travel along the slots 12.

Abstract: A light emitting diode includes a substrate tilted toward first and second directions simultaneously, a first cladding layer formed with a semiconductor material of a first conductive type on the substrate, an active layer formed on the first cladding layer, and a second cladding layer formed with a semiconductor material of a second conductive type on the active layer, wherein concavo-convexes are formed on the interfaces of the first cladding layer, the second cladding layer, and the active layer, and the (100) substrate is a III-V or a IV-IV group semiconductor substrate, and has a crystal orientation such that a (100) plane of the (100) substrate is inclined 2 to 20° toward the [0-1-1] direction and 1 to 8° toward the [0-11] direction.

Abstract: The present invention provides an involatile memory device that is capable of data writing and erasing at a time other than during manufacturing, and a semiconductor device having the memory device. Also, the present invention provides a compact-sized and inexpensive involatile memory device and a semiconductor device having the memory device. A memory device of the present invention includes a first conductive layer and a second conductive layer of which at least one has a light transmitting property, and an organic compound layer that is in contact with the first conductive layer or the second conductive layer. The organic compound layer includes conductive particles that are dispersed within the layer, and the organic compound included in the organic compound layer has a site that can photoisomerize.

Abstract: It is an object of the present invention to form an organic transistor including an organic semiconductor having high crystallinity without loosing an interface between an organic semiconductor of a channel where carriers are spread out and a gate insulating layer and deteriorating a yield. A semiconductor device according to the present invention has a stacked structure of organic semiconductor layers, and at least the upper organic semiconductor layer is in a polycrystalline or a single crystalline state and the lower organic semiconductor layer is made of a material serving as a channel. Carrier mobility can be increased owing to the upper organic semiconductor layer having high crystallinity; thus, insufficient contact due to the upper organic semiconductor layer can be compensated by the lower organic semiconductor layer.

Abstract: A single plate system color solid-state image pick-up device of a microlens loading type, the device comprising: a semiconductor substrate; a plurality of light receiving portions formed in a two-dimensional array in a surface portion of the semiconductor substrate; color filters each of which is for any of red, green and blue colors; and microlenses, wherein each of the color filters and each of the microlenses are laminated above on each of the light receiving portions, wherein first ones of the microlenses, corresponding to ones of the light receiving portions on which ones for the red color of the color filters are laminated, have smaller light receiving areas than those of second ones of the microlenses, corresponding to ones of the light receiving portions on which ones for the green color of the color filters are laminated.

Abstract: In accordance with the invention, a photonic device comprises a semiconductor substrate including at least one circuit component comprising a metal silicide layer and an overlying layer including at least one photoresponsive component. The metal silicide layer is disposed between the circuit component and the photoresponsive component to prevent entry into the circuit component of light that penetrates the photoresponsive component. The silicide layer advantageously reflects the light back into the photoresponsive element. In addition, the overlying layer can include one or more reflective layers to reduce entry of oblique light into the photoresponsive component. In an advantageous embodiment, the substrate comprises single-crystal silicon including one or more insulated gate field effect transistors (IGFETs), and/or capacitors, and the photoresponsive element comprises germanium and/or germanium alloy epitaxially grown from seeds on the silicon.

Abstract: It is an object to provide a p-type ZnS based semiconductor material having a low resistance which can easily form an ohmic contact to a metallic material. Moreover, the invention provides a semiconductor device and a semiconductor light emitting device which include an electrode having a low resistance on a substrate other than a single crystal substrate, for example, a glass substrate. The semiconductor material according to the invention is used as a hole injecting electrode layer of a light emitting device and has a transparent property in a visible region which is expressed in a composition formula of Zn(1-?-?-?)Cu?Mg?Cd?S(1-x-y)SexTey (0.004???0.4, ??0.2, ??0.2, 0?x?1, 0?y?0.2, and x+y?1).

Abstract: Example embodiments relate to an image sensor and a fabrication method thereof. An image sensor may include a semiconductor substrate. A charge transfer structure may be formed on the semiconductor substrate. The charge transfer structure may include a gate insulating film that may be formed on a channel region in the semiconductor substrate between a photoelectric conversion region and charge detection region, and a transfer gate electrode that may be formed on the gate insulating film that may have a region doped with a first conductivity type impurity-doped region and a second conductivity type impurity-doped region which may be adjacent to each other.

Abstract: An active matrix type display device having a plurality of pixel circuits (1) arranged in a matrix shape. The pixel circuit has: a display device (EL); a drive transistor (M1) of a first conductivity type for controlling a current flowing in the display device; a capacitor (C1) provided at a control electrode of the drive transistor; and a switch (M2a, M2b), connected to the control electrode of the drive transistor, for holding a drive control signal at the capacitor. The switch includes a switching transistor (M2a) of the first conductivity type and a switching transistor (M2b) of a second conductivity type in which one main electrode of the switching transistor of the first conductivity type and one main electrode of the switching transistor of the second conductivity type are connected serially.

Abstract: An electronic component has at least one semiconductor power switch with at least one anode and at least one control electrode positioned on a first surface and at least one cathode positioned on a second surface and a heat sink with a die attach region with an upper surface. The electronic component also comprises a plurality of leads. A control lead has an upper surface which lies in a plane generally coplanar with the upper surface of the die attach region in its inner portion and above the upper surface of the inner portion in its centre portion. The anode of the semiconductor power switch is mounted on the die attach region of the heat sink and at least one control electrode is mounted on the upper surface of the inner portion of the control lead.

Abstract: A semiconductor structure of a high side driver includes an ion-doped junction. The ion-doped junction includes a substrate, a first deep well and a second deep well, a first heavy ion-doped region and a second heavy ion-doped region. The first deep well and second deep well are formed in the substrate, which are separated but partially linked with each other, and the first deep well and the second deep well have the same ion-doped type. The first heavy ion-doped region is formed in the first deep well for connecting to a first high voltage, and the first heavy ion-doped region has the same ion-doped type as the first deep well. The second heavy ion-doped region is formed in the second deep well for connecting to a second high voltage, and the second heavy ion-doped region has the same ion-doped type as the first deep well.

Abstract: Methods of producing electrochemical transistor devices are provided, wherein a solidified electrolyte is arranged in direct contact with at least a portion of an organic material having the ability to electrochemically altering its electrical conductivity through change of redox state thereof, such that a current between a source contact and a drain contact of the transistor is controllable by a voltage applied to a gate electrode. A electrochemical transistor device is also provided, wherein an ion isolative material is provided between a solidified electrolyte and an organic material having the ability to electrochemically altering its redox state, such that a transistor channel of said transistor is defined thereby.

Abstract: The present invention provides an apparatus for enhancing Q factor of an inductor. The apparatus includes a negative resistance generator coupled to the inductor for providing a negative resistance, and a bias circuit coupled to the negative resistance generator for biasing the negative resistance generator.

Abstract: A semiconductor light emitting device of the present invention includes a plurality of light emitting elements, a package body for storing the light emitting elements, wiring patterns being electrically connected to the light emitting elements, and Au wires for electrically connecting the light emitting elements and the wiring patterns, the package body including mounting concave portions for storing the respective light emitting elements, and storing concave portion for storing the mounting concave portions and the Au wires, the mounting concave portions being aligned on a linear line and spaced from each other with an equal pitch.

Abstract: Disclosed is a semiconductor structure, which includes a non-planar varactor having a geometrically designed depletion zone with a taper, as to provide improved Cmax/Cmin with low series resistance. Because of the taper, the narrowest portion of the depletion zone can be designed to be fully depleted, while the remainder of the depletion zone is only partially depleted. The fabrication of semiconductor structure may follow that of standard FinFET process, with a few additional or different steps. These additional or different steps may include formation of a doped trapezoidal (or triangular) shaped silicon mesa, growing/depositing a gate dielectric, forming a gate electrode over a portion of the mesa, and forming a highly doped contact region in the mesa where it is not covered by the gate electrode.