Patents Examined by Dinh Le
  • Patent number: 9209789
    Abstract: Techniques for converting a signal from a small-signal format into a rail-to-rail format are described herein. In one embodiment, a receiver comprises a voltage-level shifter configured to shift a common-mode voltage of a differential signal to obtain a level-shifted differential signal, an amplifier configured to amplify the level-shifted differential signal into an amplified differential signal, and a driver stage configured to convert the amplified differential signal into a rail-to-rail signal. The receiver also comprises a common-mode feedback circuit configured to generate a feedback voltage that is proportional to an output common-mode voltage of the amplifier, and to generate a bias voltage for input to the amplifier based on a difference between the feedback voltage and a reference voltage, wherein the output common-mode voltage of the amplifier depends on the bias voltage.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: December 8, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Miao Li, Xiaohua Kong, Dong Ren
  • Patent number: 9209507
    Abstract: Various embodiments may provide a termination element for a radio frequency (RF) power amplifier module. The termination element may include a resistive body having a first end, a second end, and first and second edges running from the first end to the second end opposite one another. The termination element may further include a first ground contact coupling the first end of the resistive body to a ground potential, and a second ground contact coupling the second end of the resistive body to the ground potential. The termination element may further include a conductive contact extending into the resistive body through the first edge, wherein an end of the conductive contact that is closest to the second edge is remotely disposed from the second edge by a gap.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: December 8, 2015
    Assignee: TriQuint Semiconductor, Inc.
    Inventor: Charles F. Campbell
  • Patent number: 9209784
    Abstract: Switchable capacitive elements are disclosed, along with programmable capacitor arrays (PCAs). One embodiment of the switchable capacitive element includes a field effect transistor (FET) device stack, a first capacitor, and a second capacitor. The FET device stack is operable in an open state and in a closed state and has a plurality of FET devices coupled in series to form the FET device stack. The first capacitor and the second capacitor are both coupled in series with the FET device stack. However, the first capacitor is coupled to a first end of the FET device stack while the second capacitor is coupled to a second end opposite the first end of the FET device stack. In this manner, the switchable capacitive element can be operated without a negative charge pump, with decreased bias swings, and with a better power performance.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: December 8, 2015
    Assignee: RF Micro Devices, Inc.
    Inventors: Christian Rye Iversen, Marcus Granger-Jones
  • Patent number: 9203134
    Abstract: A micromechanical resonator is disclosed. The resonator includes a resonant micromechanical element. A film of annealable material can be deposited on a facial surface of the element. The resonance of the element can be tuned by annealing the deposited film. Also disclosed are methods of applying a film on a resonator and annealing the film, thereby tuning one or more resonant properties of the resonator.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: December 1, 2015
    Assignee: Sandia Corporation
    Inventors: Michael David Henry, Roy H. Olsson, Karl Douglas Greth, Travis Ryan Young, Janet Nguyen, James E. Stevens
  • Patent number: 9203371
    Abstract: An electrical filter structure includes a first filter core structure and a second filter core structure. The first filter core structure includes a plurality of shunt impedance elements. Similarly, the second filter core structure includes a plurality of shunt impedance elements. Shunt impedance elements of the first filter core structure are arranged in different conducting layers of a multi-layer structure, and shunt impedance elements of the second filter core structure are arranged in different layers of the multi-layer structure. Transmission lines used to implement the shunt impedance elements are interleaved.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: December 1, 2015
    Assignee: ADVANTEST CORPORATION
    Inventor: Giovanni Bianchi
  • Patent number: 9204503
    Abstract: In accordance with methods and systems of the present disclosure, an integrated circuit may include an output terminal and a switching circuit. The output terminal may supply charging current to a magnetic storage element for supplying energy to two or more lighting devices coupled to the magnetic storage element. The switching circuit may have an input coupled to an input power source and an output coupled to the output terminal for charging the magnetic storage element during charging intervals, wherein energy is supplied from the magnetic storage element to a first one of the lighting devices during flyback intervals following the charging intervals occurring during a first synchronization phase and to a second one of the lighting devices during flyback intervals following the charging intervals occurring during a second synchronization phase.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: December 1, 2015
    Assignee: Philips International, B.V.
    Inventor: Michael A. Kost
  • Patent number: 9197159
    Abstract: A mixer includes a first node to which an intermediate frequency (IF) signal is input; first and second transistors that respectively have control terminals supplied with local signals having mutually opposite phases and output terminals connected to the first node; a first filter that is connected between the output terminal of the second transistor and the first node and suppresses passage of the IF signal; a second node to which the IF signal is input; third and fourth transistors that respectively have control terminals supplied with local signals having mutually opposite phases and output terminals connected to the second node; a second filter that is connected between the output terminal of the fourth transistor and the second node and suppresses passage of the IF signal; and a combiner combining a signal output from the first node and a signal output from the second node.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: November 24, 2015
    Assignees: Sumitomo Electric Industries, Ltd., Sumitomo Electric Device Innovations, Inc.
    Inventors: Seiji Fujita, Tsuneo Tokumitsu
  • Patent number: 9197186
    Abstract: A duplexer comprising an improved matching circuit for matching between transmitting path and receiving path is specified. In this case, the matching circuit comprises a hybrid and matching elements.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: November 24, 2015
    Assignee: EPCOS AG
    Inventor: Edgar Schmidhammer
  • Patent number: 9196459
    Abstract: An RF impedance matching network includes an RF input; an RF output configured to operably couple to a plasma chamber; a series electronically variable capacitor (“series EVC”), the series EVC electrically coupled in series between the RF input and the RF output; and a shunt electronically variable capacitor (“shunt EVC”), the shunt EVC electrically coupled in parallel between a ground and one of the RF input and the RF output; a control circuit to control the series variable capacitance and the shunt variable capacitance, wherein the control circuit is configured to determine the variable plasma impedance of the plasma chamber, determine a series capacitance value and a shunt capacitance value, and generate a control signal to alter at least one of the series variable capacitance and the shunt variable capacitance; wherein the alteration is caused by at least one of a plurality of switching circuits.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: November 24, 2015
    Inventor: Imran Ahmed Bhutta
  • Patent number: 9197199
    Abstract: A level shifter for converting between voltages of a core voltage range to voltages within a larger I/O voltage range. The level shifter has interconnected transistors implemented as core devices operable within the core voltage range. The level shifter is connected to first and second power connections at the I/O voltage range. A voltage clamping element implemented as a core device has a threshold voltage greater than or equal to the difference between the I/O voltage range and the core voltage range and configured to prevent overstressing the transistors with voltages beyond the core voltage range. The input to the level shifter is within the core voltage range. The level shifter output signal has a high level at the high voltage of the I/O voltage range and a low level at approximately one threshold voltage above the low voltage level of the core voltage range.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 24, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tien-Chien Huang, Ruey-Bin Sheen
  • Patent number: 9190977
    Abstract: A semiconductor device includes a filter circuit operable to pass a desired signal component of a high-frequency signal inputted and operable to attenuate a harmonic component of an integral multiple of the desired signal, wherein the filter circuit includes a first inductor and a second inductor coupled in series to a signal line transmitting the high-frequency signal, a first variable capacitor coupled between a power supply line and a node of the first inductor and the second inductor, and a second variable capacitor coupled between the signal line and the power supply line.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: November 17, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Takao Kihara, Tomohiro Sano
  • Patent number: 9192004
    Abstract: Disclosed are LED driver circuits, and methods of driving LED loads. In one embodiment, an LED driver can include: (i) an SCR coupled to an AC power supply, and configured to generate a DC voltage through a first rectifier circuit; (ii) a first stage conversion circuit having an isolated topology with power factor correction, where the first stage conversion circuit is configured to convert the DC voltage to a first output voltage; (iii) where the first stage conversion circuit includes a transformer having a primary side coupled to the DC voltage, and a secondary side coupled to the first output voltage through a second rectifier circuit; and (iv) a second stage conversion circuit having a non-isolated topology, where the second stage conversion circuit is configured to convert the first output voltage to an output current configured to drive an LED load based on a conducting angle of the SCR.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: November 17, 2015
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventor: Wei Chen
  • Patent number: 9172354
    Abstract: Apparatus and methods for high-frequency low-pass filtering are disclosed. A first resistor is operatively coupled between a first node and a second node. A second resistor is operatively coupled between the second node and a third node. An amplifier circuit has a first input operatively coupled to the third node and a first output operatively coupled to a fourth node. The first output is configured to provide a first output signal. A first complex impedance network is operatively coupled between the fourth node and the third node. A first feedback path is operatively coupled between the fourth node and the second node. The first feedback path is configured to invert at least a portion of the first output signal. The first feedback path is further configured to provide a first feedback capacitance at the second node.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: October 27, 2015
    Assignee: ANALOG DEVICES, INC.
    Inventor: Alexandru Ciubotaru
  • Patent number: 9173270
    Abstract: A low-temperature LED lighting and power supply device has a low power-consuming power supply control module and an LED lighting module electrically connected therewith. The LED lighting module is composed of at least one light source driver and an LED light source. The low power-consuming power supply control module at least has a surge suppression unit, a voltage-dividing-limiting unit, a current-limiting unit, and a steady voltage filtering unit. Accordingly, the present invention allows LED lighting equipment to be applied in a wider power supply range and operated under a low-temperature and low power-consuming state so as to meet economic and practical demands and environmental protection.
    Type: Grant
    Filed: July 7, 2013
    Date of Patent: October 27, 2015
    Inventor: Shun-An Liao
  • Patent number: 9172360
    Abstract: An emphasis signal generating circuit includes: a branch and delay unit configured to branch an input signal, delay a branched signal, and output a first delayed signal; a high-frequency extraction unit configured to extract at least one of high-frequency components of the input signal and the first delayed signal to output a high-frequency signal; and an addition and subtraction unit configured to add and subtract the input signal, the first delayed signal, and the high-frequency signal.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: October 27, 2015
    Assignee: FUJITSU LIMITED
    Inventor: Yukito Tsunoda
  • Patent number: 9165166
    Abstract: An interpolation circuit includes: a plurality of holding circuits configured to each hold a corresponding input data input chronologically; and a generating circuit configured to generate interpolation data by giving weights, based on an interpolation code, to input data that are chronologically adjacent to each other and are held by the plurality of holding circuits and combining the weighted data together.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: October 20, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Takayuki Hamada, Sanroku Tsukamoto
  • Patent number: 9166268
    Abstract: Embodiments of the present disclosure provide a radio frequency (RF) conductive medium for reducing the undesirable insertion loss of all RF hardware components and improving the Q factor or “quality factor” of RF resonant cavities. The RF conductive medium decreases the insertion loss of the RF device by including one or more conductive pathways in a transverse electromagnetic axis that are immune to skin effect loss and, by extension, are substantially free from resistance to the conduction of RF energy.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: October 20, 2015
    Assignee: Nanoton, Inc.
    Inventor: John Aldrich Dooley
  • Patent number: 9166557
    Abstract: A piezoelectric thin film resonator includes: a substrate; a piezoelectric film located on the substrate; a lower electrode and an upper electrode located to sandwich the piezoelectric film; a load film formed from patterns in a resonance region in which the lower electrode and the upper electrode face each other across the piezoelectric film, wherein the patterns are formed so as to surround a center of the resonance region and intersect with a pathway extending from the center to an outer periphery of the resonance region.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: October 20, 2015
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kenya Hashimoto, Jiansong Liu, Masanori Ueda, Shinji Taniguchi, Tokihiro Nishihara
  • Patent number: 9160046
    Abstract: Embodiments of the present invention provide for a transmission circuit that includes a transmission line and a conductive via. The transmission line is electrically coupled to a first conductive via and a second conductive via. The first conductive via includes a first via stub, wherein the transmission line is configured to transmit a signal that is coupled to the first conductive via, and wherein the first via stub extends beyond the transmission line. The second conductive via includes a second via stub, wherein the transmission line is configured to transmit a signal that is coupled to the second conductive via, and wherein the second via stub extends beyond the transmission line. A transmission line stub is electrically coupled to the transmission line or to at least one of the conductive vias, wherein the length of the transmission line stub is configured to suppress a preselected frequency.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: October 13, 2015
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Eric R. Ao, Donald R. Dignam, Stephen J. Flint, Jian Meng
  • Patent number: 9160302
    Abstract: A method and system for an acoustic wave band reject filter are disclosed. According to one aspect, an acoustic wave band reject filter includes a substrate and a plurality of acoustic wave band reject filter circuit blocks. The substrate includes bonding pads formed on the substrate. Each one of the plurality of acoustic wave band reject filter circuit blocks is fixed on a separate die. Each separate die has solder balls on a side of the die facing the substrate. The solder balls are positioned to electrically connect the bonding pads formed on the substrate to electrodes of the dies.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: October 13, 2015
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Chunyun Jian, Somsack Sychaleun