Abstract: An integrated circuit device comprising at least one voltage supply module arranged to receive at an input thereof at least one control signal and to provide at an output thereof a voltage signal in accordance with the received at least one control signal, and at least one control module comprising at least one feedback loop between the output of the at least one voltage supply module and the input of the at least one voltage supply module, and arranged to generate the at least one control signal based at least partly on the voltage level of the voltage signal output by the at least one voltage supply module. The at least one control module is further arranged to receive at an input thereof at least one instantaneous indication of a load current at the output of the at least one voltage supply module, and apply a compensation to the at least one control signal provided to the at least one voltage supply module based at least partly on the received at least one indication of the load current.

Abstract: A power combiner includes a primary winding and a secondary winding, wherein at least the primary winding comprises a center-tap; and a termination module operably coupled to the center-tapped primary winding and arranged to provide harmonic terminations on a plurality of frequencies. In addition, there is provided a radio frequency transmitter having a power combiner, where the power combiner includes a primary winding and a secondary winding, wherein at least the primary winding includes a center-tap; and a termination module operably coupled to the center-tapped primary winding and arranged to provide harmonic terminations on a plurality of frequencies.

Abstract: A high frequency power amplifier includes an FET chip, a wire connected at a first end to the FET chip, an input-side matching circuit substrate, a resistive element on the input-side matching circuit substrate and connected in series with the FET chip, a transmission portion of a conductive material on the input-side matching circuit substrate, in contact with one end of the resistive element, and connected to an input electrode, a wire connection portion of a conductive material on the input-side matching circuit substrate, in contact with a second end of the resistive element, and connected to a second end of the wire, and a shorting portion of a conductive material having a smaller width than the resistive element and on the resistive element, connecting the transmission portion to the wire connection portion.

Abstract: An analog filter is presented that comprises a chain of filter stages, a feedback resistor for providing a negative feedback, and a feedback capacitor for providing a positive feedback. Each filter stage has an input node and an output node. The output node of a filter stage is connected to the input node of an immediately succeeding filter stage through a resistor. The feedback resistor has a first end connected to the output node of the last filter stage along the chain of filter stages, and a second end connected to the input node of a first preceding filter stage. The feedback capacitor has a first end connected to the output node of one of the chain of filter stages, and a second end connected to the input node of a second preceding filter stage.

Abstract: A semiconductor integrated circuit includes a user circuit and a power supply noise suppression circuit. The user circuit includes a plurality of circuit modules each containing an operation ratio control circuit. The power supply noise suppression circuit judges an amount of current fluctuation occurring in the user circuit by monitoring an operation ratio of each of the plurality of circuit modules, and controls, via each of the operation ratio control circuits, the operation ratio of a corresponding one of the circuit modules in accordance with a result of the judgment of the amount of current fluctuation.

Abstract: The present invention pertains to an inductor current detection circuit in a switching mode power supply, and a light-emitting diode (LED) driver thereof. In one embodiment, an inductor current detection circuit configured in a switching mode power supply under discontinuous conduction mode, can include: (i) a voltage detection circuit configured to generate a sampling voltage based on a drain-source voltage of a power switch in the switching mode power supply; (ii) a voltage holding circuit configured to receive the sampling voltage, and to generate a holding voltage through a sampling and holding operation; and (iii) a comparison circuit configured to compare the sampling voltage against the holding voltage, and to generate a zero-crossing signal when the sampling voltage is less than the holding voltage, where the zero-crossing signal is configured to represent an inductor current ending time of the switching mode power supply.

Abstract: Apparatuses and methods for suppressing power supply noise harmonics are disclosed. A method includes selecting at least one flip-flop of a plurality of data paths of an integrated circuit based on a slack associated with the at least one flip-flop. The method also includes providing at least one delay circuit at an output of at least one flip-flop. The at least one delay circuit is configured to delay the output of the at least one flip-flop by a threshold clock cycle for managing current at a positive edge of a clock input and current at a negative edge of the clock input, thereby suppressing power supply noise harmonics of the integrated circuit.

Abstract: Disclosed are light-emitting diode (LED) driver circuits, methods, and a switch mode power supply. In one embodiment, an LED driver can include: (i) a silicon-controlled rectifier (SCR) and a rectifier bridge configured to receive an AC voltage, and to generate a phase-loss half sine wave voltage signal; (ii) a threshold voltage control circuit configured to receive a threshold voltage and an input voltage signal that represents the phase-loss half sine wave voltage signal, and to determine whether to output the threshold voltage based on angle information of the input voltage signal; (iii) a first control circuit configured to compare the input voltage signal against the threshold voltage output by the threshold voltage control circuit, and to generate a first control signal; and (iv) a power switch controllable by the first control signal to be off until an absolute value of the AC voltage is reduced to zero.

Abstract: A quick-release clamp that is placed over a pair of waveguide flanges and then locked into place. The device eliminates the need for laborious removal and reinstallation of numerous small nuts and bolts from the waveguide flanges, which are a time consuming component of every maintenance job done on the waveguides. The device consists of a formed clamp that conforms the to the shape and size of a particular waveguide flange pair. The clamp is hinged in one corner and has a securing mechanism in the opposite corner. The inside of the clamp has gaskets than ensure a tight secure fit for the clamp. In this way, a variety of waveguide flanges can be opened and sealed quickly and easily.

Abstract: Devices and methods capable of correcting for distortion are disclosed. For example, a method for compensating for non-idealities in a frequency-conversion circuit having a high-frequency input side separated from a baseband side by a passive mixer is presented. The method includes injecting a plurality of calibration signals in the baseband side to determine cross-talk between an In-phase (I) portion of the baseband side and a Quadrature (Q) portion of the baseband side to produce a first measurement ?+ and a second measurement ??, synthesizing a crosstalk compensation filter g(?) based on the first measurement ?+ and the second measurement ??, and applying the crosstalk compensation filter g(?) to an output of the frequency-conversion circuit.

Abstract: A frequency converter, capable of obtaining resonance characteristics having a high Q factor and a high multiplication signal and having a narrow-band frequency selectivity function, is provided by the following configuration. A magnetoresistance effect element includes a pinned magnetization layer, a free magnetization layer, and a non-magnetic spacer layer disposed between the pinned magnetization layer and the free magnetization layer. In response to an input of a high frequency signal and a local signal, the magnetoresistance effect element generates a voltage signal (multiplication signal) by multiplying the signals by each other using a magnetoresistance effect. A magnetic field generated by a magnetic-field applying unit is applied to the free magnetization layer of the magnetoresistance effect element in a direction perpendicular to a film surface direction or by tilting an angle of the magnetic field from the film surface direction toward a direction perpendicular to the film surface direction.

Abstract: A compact microwave distributed-element dual-mode bandpass filter is provided, comprising a dual-mode resonator and a signal input port and a signal output port coupled electrically to the dual-mode resonator respectively; wherein, the dual-mode resonator comprises a main stripline with a center-loaded short-circuited stub, the main stripline is reasonably folded in both vertical and horizontal directions and is reasonably folded into a first layer, a second layer, a third layer and a fourth layer; a symmetrical plane is provided between the second layer and the third layer, while the first layer and the fourth layer are symmetrical to each other relative to the symmetrical plane, the second layer and the third layer are symmetrical to each other relative to the symmetrical plane as well; the center-loaded short-circuited stub is located on the symmetrical plane, and the symmetrical plane can be treated as a virtual ground at odd-mode resonant frequency.

Abstract: A level shifter, or method, producing a final output from a driver supplied by a high-side source driver providing VDD or common, and a low-side source driver providing common or VSS. A delay is introduced to prevent a source driver output at common from beginning to transition toward a supply rail until a delaying source driver at a rail begins transitioning toward common. The level shifter may be single-ended or differential, and the delaying source driver may be coupled to the same final output driver as is the delayed source driver, or may be coupled to a different final output driver. The level shifter may have a second level shifter front end stage, which may have high-side and low-side intermediate source driver outputs coupled by a capacitor, and/or may couple one of the supplies to all intermediate source drivers via a common impedance or current limit Zs.

Abstract: A clock network includes a first plurality of shield wires associated with a first plurality of clock lines and a second plurality of shield wires associated with a second plurality of clock lines. The clock network also includes a first plurality of clock activity program circuits associated with the first plurality of clock lines and a second plurality of clock activity program circuits associated with the second plurality of clock lines, wherein the first and second plurality of shield wires and the first and second plurality clock activity program circuits are configured to reduce power spikes.

Abstract: The present invention relates to a signal directing means for dividing or combining signals. It comprises a bottom row first port, a first row first and second port, and a bottom row signal connector. The signal directing means further comprises a first row first and second amplifier, each first row amplifier having a corresponding first and second terminal, said first terminals being connected along the bottom row signal connector. The signal directing means also comprises a first row signal connector, where said second terminals are connected along the first row signal connector. The second terminal of the first row first amplifier is connected to the first row first port and the second terminal of the first row second amplifier is connected to the first row second port. A plurality of second connector ports are also provided, with connecting impedances connecting between the respective ports.

Abstract: The embodiments described herein can provide improved signal feeding between hybrid couplers and associated transistors. As such, these embodiments can improve the performance of amplifiers and other such RF devices that utilize these components. In one embodiment a device includes a distribution network and a compensation resonator. The distribution network is configured to output a signal through a relatively wide output feedline. This relatively wide output feedline provides distributed signal feeding that can improve signal distribution and performance. The output feedline is coupled to the compensation resonator. In general, the compensation resonator is configured to resonate with the distribution network at the frequency band of the signal. Thus, the distribution network and compensation resonator together can provide improved signal distribution while maintaining performance at the frequencies of interest.

Abstract: An equalizer circuit includes an input terminal, a pull-up driving unit suitable for pull-up driving an output terminal based on a signal of the input terminal, a pull-down driving unit suitable for pull-down driving the output terminal, and a capacitor connected between the input terminal and the output terminal.

Abstract: A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

Abstract: A transconductance adjustment circuit includes a reference signal generation circuit that outputs a first signal and a second signal that is different by 90 degrees in phase from the first signal, a replica circuit to which the first signal and the second signal are input and which generates a first output signal and a second output signal, and an adjustment signal generation circuit that outputs a transconductance adjustment signal with respect to the adjustment-targeted circuit and the replica circuit. The reference signal generation circuit generates the first signal and the second signal that change in voltage at between a first voltage level and a second voltage level, based on a clock signal, and outputs the generated first and second signals with respect to the replica circuit.

Abstract: Signals generated by an array of photodiodes are applied to the inputs of corresponding edge detection circuits. Each edge detection circuit generates an output that changes state in response to a detected edge of the photodiode generated signal. The edge detection circuits may be formed by toggle flip-flop circuits. The outputs of the edge detection circuits are logically combined using exclusive OR logic to generate an output. The exclusive OR logic may be formed by a cascaded tree of exclusive OR circuits.