Patents Examined by Dinh T. Le
  • Patent number: 11488763
    Abstract: An integrated transformer and an electronic device are disclosed. The integrated transformer includes at least one first base plate and at least one second base plate. Each of the first and second base plate defines multiple annular accommodating grooves. The annular accommodating grooves divide each of the first and second base plate into multiple central parts and a peripheral part Each central part defines multiple inner via holes there through. The peripheral part defines multiple outer via holes there through. The integrated transformer further includes multiple magnetic cores disposed in the respective annular accommodating groove and transmission wires disposed on both sides of the first and second base plates. Transformers and the filters are arranged on two base plates respectively, and the thickness of the transmission wire layers of the filters is less than that of the transformers. Thus, the structure of the electromagnetic device may be more compact.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: November 1, 2022
    Assignees: SHENNAN CIRCUITS CO., LTD., RADIAL ELECTRONICS
    Inventors: Weijing Guo, James Quilici, Yuhua Zeng, Hua Miao
  • Patent number: 11482373
    Abstract: A multilayer coil component includes a multilayer body formed by stacking a plurality of insulating layers in a length direction and that has a built-in coil, and a first outer electrode and a second outer electrode that are electrically connected to the coil. The coil is formed by a plurality of coil conductors stacked in the length direction being electrically connected to each other. The first and second outer electrodes respectively cover parts of first and second end surfaces and parts of a first main surface. Two coil conductors are stacked in order to form one turn of the coil. Adjacent land portions of coil conductors in the stacking direction are connected to each other through via conductors. In a plan view from a width direction, the land portions are disposed in an upper half of the multilayer body on the opposite side from the first main surface.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: October 25, 2022
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Atsuo Hirukawa
  • Patent number: 11482656
    Abstract: Methods, systems and apparatus for implementing a tunable qubit coupler. In one aspect, a device includes: a first data qubit, a second data qubit, and a third qubit that is a tunable qubit coupler arranged to couple to the first data qubit and to couple to the second data qubit such that, during operation of the device, the tunable qubit coupler allows tunable coupling between the first data qubit and the second data qubit.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: October 25, 2022
    Assignee: Google LLC
    Inventors: Charles Neill, Anthony Edward Megrant
  • Patent number: 11469759
    Abstract: An arrangement, an apparatus, a quantum computing system, and a method are disclosed for reducing qubit leakage errors. In an example, an apparatus includes a qubit having a ground state and a plurality of excited states. The plurality of excited states include a lowest excited state. An energy difference between the ground state and the lowest excited state corresponds to a first frequency, and an energy difference between the lowest excited state and another excited state in the plurality of excited states corresponds to a second frequency. The apparatus also includes an energy dissipation structure to dissipate transferred energy, and a filter having a stopband and a passband. The filter is coupled to the qubit and to the energy dissipation structure. The stopband includes the first frequency and the passband includes the second frequency for reducing qubit leakage errors.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: October 11, 2022
    Assignee: IQM Finland Oy
    Inventors: Olli Ahonen, Johannes Heinsoo, Tianyi Li, Pasi Lähteenmäki, Mikko Möttönen, Jami Rönkkö, Jaakko Salo, Jorge Santos, Jani Tuorila
  • Patent number: 11469033
    Abstract: A multilayer coil component includes a multilayer body formed by stacking a plurality of insulating layers in a length direction and that has a built-in coil, and a first outer electrode and a second outer electrode that are electrically connected to the coil. The coil is formed by a plurality of coil conductors stacked in the length direction being electrically connected to each other. The first and second outer electrodes respectively cover at least parts of first and second end surfaces. A stacking direction and a coil axis direction are parallel to the first main surface. A length of a region in which the coil conductors are arranged in the stacking direction is from 85% to 95% of a length of the multilayer body. A distance between coil conductors adjacent to each other in the stacking direction lies in a range from 12 ?m to 40 ?m.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: October 11, 2022
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Atsuo Hirukawa
  • Patent number: 11469485
    Abstract: Techniques regarding an embedded microstrip transmission line implemented in one more superconducting microwave electronic devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can include a superconducting material layer positioned on a raised portion of a dielectric substrate. The raised portion can extend from a surface of the dielectric substrate. The apparatus can also comprise a dielectric film that covers at least a portion of the superconducting material layer and the raised portion of the dielectric substrate.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: October 11, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Isaac Lauer, William Francis Landers, Srikanth Srinivasan, Neereja Sundaresan
  • Patent number: 11469709
    Abstract: A biasing scheme for a frequency multiplication circuit, and transceiver using LO signals provided by the frequency multiplication circuit are described. A frequency doubler is cascaded with a mixer to provide a mm-wave oscillator signal. The combination provides a frequency triple that of the LO frequency supplied to the frequency doubler from a PLL. A small-sized replica of the frequency doubler is used to determine biasing of transconductance devices of the frequency doubler. A voltage output of the replica is amplified and the difference between the output and a reference voltage is supplied as feedback to the control terminal of the transconductance devices to bias the transconductance devices to near threshold. The biasing is replicated at the frequency doubler to compensate for PVT variations. A PTAT current source tied to the output of the replica regulates an average output current of the frequency multiplication circuit.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: October 11, 2022
    Assignee: Intel Corporation
    Inventors: Abhishek Agrawal, Stefano Pellerano, Christopher Hull
  • Patent number: 11463062
    Abstract: A multilayer filter may include a signal path having an input, an output, and a conductive layer overlying at least one of a plurality of dielectric layers. The conductive layer may be elongated in the first direction and may have a first edge aligned with the first direction and a second edge parallel with the first edge. The conductive layer may include a protrusion extending in the second direction and having an end edge that is parallel with the first edge and offset from the first edge in the second direction by a protrusion length that is greater than about 50 microns. The multilayer filter may include an inductor that is electrically connected at a first location with the signal path and electrically connected at a second location with at least one of the signal path or a ground.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: October 4, 2022
    Assignee: KYOCERA AVX Components Corporation
    Inventors: Kwang Choi, Marianne Berolini
  • Patent number: 11462937
    Abstract: A method and apparatus for no-break power transfer in a power distribution system, including providing, from a first power source, a first power supply to a power bus, disabling the first power supply from the power bus, and providing, from a second power source, a second power supply to the power bus, the second power supply having the second set of electrical characteristics.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: October 4, 2022
    Assignee: GE Aviation Systems Limited
    Inventor: Colin John Halsey
  • Patent number: 11456722
    Abstract: The invention relates to an arrangement (10) for a vehicle (1) for detecting an activation action for activating a function on the vehicle (1), comprising: at least one sensor element (21) for sensing a change in a vicinity of the sensor element (21), a controlling arrangement (80) for an electric control of the sensor element (21) in order to provide a sensing signal (S), the frequencies of which comprise at least one predefined sensing frequency, an evaluation arrangement (90), which is interconnected to the sensor element (21) via a signal path (SP) in order to use the sensing signal (S) to repeatedly determine at least one parameter of the sensor element (21) specific to the sensing for detecting the activation action, a filter arrangement (40) in the signal path (SP) comprising at least one high-pass (41, 43) in order to at least reduce the frequencies of the sensing signal (S) lower than the at least one sensing frequency.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: September 27, 2022
    Assignee: Huf Hülsbeck & Fürst GmbH & Co. KG
    Inventor: Berthold Sieg
  • Patent number: 11456515
    Abstract: A method includes receiving a radio frequency (RF) input signal using at least one non-reciprocal circulator. The method also includes generating an RF output signal using at least one of multiple reflective filter elements. Each reflective filter element is configured to receive an RF signal from the at least one non-reciprocal circulator and to provide a filtered RF signal to the at least one non-reciprocal circulator. The reflective filter elements include amplitude change reflectors configured to modify amplitudes of the RF signal at different frequencies. The RF output signal represents the RF input signal as modified by the at least one of the reflective filter elements.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: September 27, 2022
    Assignee: Raytheon Company
    Inventors: Zhaoyang C. Wang, Ajay Subramanian, Jason C. Soric, Matthew A. Morton
  • Patent number: 11437983
    Abstract: A circuit for suppressing electromagnetic interference signal on power lines. The circuit includes a first sensing circuit, a first amplifier, and a first controlled signal source. The first sensing circuit is arranged to sense a first electromagnetic interference signal. The first amplifier is arranged to be powered by a power source. The first amplifier provides a first amplification factor and being operably connected with the first sensing circuit to amplify a signal sensed by the first sensing circuit. The first controlled signal source provides a second amplification factor and is operably connected with the first amplifier to regulate or further amplify the amplified signal to provide a first suppression signal that reduces the first electromagnetic interference signal. Multiple such circuits can be cascaded to form a mufti-stage electromagnetic interference suppression circuit.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: September 6, 2022
    Assignee: AnApp Technologies Limited
    Inventors: Peter On Bon Chan, Siu Hong Wong
  • Patent number: 11430831
    Abstract: A quantum system includes a qubit array comprising a plurality of qubits. A bus resonator is coupled between at least one pair of qubits in the qubit array. A switch is coupled between the at least one qubit pair of qubits.
    Type: Grant
    Filed: June 20, 2020
    Date of Patent: August 30, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Patryk Gumann, Andrew W. Cross, Sean Hart, Jay Michael Gambetta
  • Patent number: 11430594
    Abstract: A multilayer coil component that includes a multilayer body formed by stacking a plurality of insulating layers on top of one another and that has a coil built into the inside thereof; and a first outer electrode and a second outer electrode that are electrically connected to the coil. The coil is formed by electrically connecting a plurality of coil conductors, which are stacked together with insulating layers, to one another. A first main surface of the multilayer body is a mounting surface. A stacking direction of the multilayer body and an axial direction of the coil are parallel to the mounting surface. At least one of the coil conductors is provided with an expanded region that has a line width that is larger than a coil line width in a plan view from the stacking direction.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: August 30, 2022
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Atsuo Hirukawa
  • Patent number: 11430593
    Abstract: A multilayer coil component includes a multilayer body that is formed by stacking a plurality of insulating layers on top of one another and that has a coil built into the inside thereof; and a first outer electrode and a second outer electrode that are electrically connected to the coil. The coil is formed by electrically connecting a plurality of coil conductors, which are stacked together with insulating layers, to one another. When a coil axis is assumed that is parallel to the length direction and penetrates from the first end surface to the second end surface of the multilayer body, all the coil conductors are arranged so that circles centered on center points of the coil conductors and having diameters that are less than or equal to around 20% of a coil diameter overlap a circumference of a virtual circle centered on the coil axis.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: August 30, 2022
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Atsuo Hirukawa
  • Patent number: 11424733
    Abstract: A calibration device includes a signal generator and a processor. The signal generator is configured to provide an input signal to a filter circuit, wherein the filter circuit has a real time constant and is configured to receive the input signal to output an output signal. The processor is configured to calculate a real gain according to the output signal and the input signal, compare the real gain with a target gain to obtain a comparison result and determine whether to adjust the real time constant of the filter circuit according to the comparison result. The present disclosure also provides a calibration method.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: August 23, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chih-Chan Tu, Chih-Lung Chen, Ka-Un Chan
  • Patent number: 11424527
    Abstract: An electronic device including: a battery; a signal converting circuit connected to the battery including first, second, third, and fourth switches of a bridge structure; a processor connected to the signal converting circuit; and an antenna connected to the signal converting circuit. The signal converting circuit is configured to: receive from the processor an input which selects a first communication scheme based on the received input while converting and providing to the antenna a direct current signal output from the battery to an alternate current signal; control the first and fourth switches to alternate in a high state and a low state; control the second and third switches in a different state which is different from the state of the first and fourth switches; and control two of the first, second, third, and fourth switches in the high state to alternate in an on state and an off state.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: August 23, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yusu Kim, Juhyang Lee
  • Patent number: 11424521
    Abstract: A superconducting circuit may include a transmission line having at least one transmission line inductance, a superconducting resonator, and a coupling capacitance that communicatively couples the superconducting resonator to the transmission line. The transmission line inductance may have a value selected to at least partially compensate for a variation in a characteristic impedance of the transmission line, the variation caused at least in part by the coupling capacitance. The coupling capacitance may be distributed along the length of the transmission line. A superconducting circuit may include a transmission line having at least one transmission line capacitance, a superconducting resonator, and a coupling inductance that communicatively couples the superconducting resonator to the transmission line. The transmission line capacitance may be selected to at least partially compensate for a variation in coupling strength between the superconducting resonator and the transmission line.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: August 23, 2022
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Jed D. Whittaker, Loren J. Swenson, Mark H. Volkmann
  • Patent number: 11411501
    Abstract: In a power converter, a regulator that receives a first voltage couples to a switched-capacitor converter that provides a second voltage. Slew-control circuitry controls slew rate within the switched-capacitor converter during operation thereof. A controller controls the operation of both the regulator and the switched-capacitor converter.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: August 9, 2022
    Assignee: PSEMI CORPORATION
    Inventors: David Giuliano, David Kunst
  • Patent number: 11405023
    Abstract: A semiconductor integrated circuit device includes a flipflop circuit using vertical nanowire (VNW) FETs. A latch unit of the flipflop circuit includes: a feedback node; first p-type and n-type transistors each of which receives an input signal at one node and is connected to the feedback node at the other node; and second p-type and n-type transistors each connected to the feedback node at one node. In a standard cell, the tops of the first and second p-type and n-type transistors are connected to the feedback node.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: August 2, 2022
    Assignee: SOCIONEXT INC.
    Inventor: Koshiro Date