Patents Examined by Dinh T. Le
  • Patent number: 11336263
    Abstract: The invention relates to a tunable, silicon-based negative-resistance circuit (10, 30) and to an active filter (50) for E-band frequencies (60 to 90 GHz). A base of a transistor (11) is connected to an on-chip inductive transmission line (13) which has a length of approximately a quarter-wavelength at a frequency of 83.5 GHz. The transmission line connects a DC voltage source (14) to the base terminal of the transistor (11) in order to bias the base. Another DC voltage source (15) is connected to the collector of the transistor (11) to bias the transistor. A capacitor (16) operatively bypasses or decouples the voltage source (15) in order to shunt high frequencies or alternating current (AC) signals to ground. The emitter terminal of the transistor (11) is connected to ground through a resistor (18) to limit the collector current (le). The circuit gives rise to improved quality factor of resonators.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: May 17, 2022
    Assignee: University of Pretoria
    Inventors: Tinus Stander, Nishant Singh
  • Patent number: 11336330
    Abstract: A radio frequency circuit includes a first acoustic wave filter that is connected to a common terminal and includes a first acoustic wave resonator, a first LC filter that is connected to the common terminal via the first acoustic wave filter and includes at least one of an inductor or a capacitor, a second acoustic wave filter that is connected to the common terminal and includes a second acoustic wave resonator, and a second LC filter that is connected to the common terminal via the second acoustic wave filter and includes at least one of an inductor or a capacitor.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: May 17, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Morio Takeuchi, Syunsuke Kido
  • Patent number: 11328908
    Abstract: An adjustment method for filter units in a plasma processing apparatus includes a first measurement process of measuring a frequency characteristic of a reference filter unit selected among the filter units, and an adjustment process of adjusting a frequency characteristic of each of remaining filter units selected among the filter units excluding the reference filter unit. Further, the adjustment process includes an attachment process of attaching a capacitive member for adjusting a capacitance between wirings in each of the remaining filter units, a second measurement process of measuring a frequency characteristic of each of the remaining filter units to which the capacitive member is attached, and an individual adjustment process of adjusting a capacitance of the capacitive member such that the frequency characteristic of each of the remaining filter unit to which the capacitive member is attached becomes close to the frequency characteristic of the reference filter unit.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: May 10, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Nozomu Nagashima, Ryuichi Yui
  • Patent number: 11329627
    Abstract: A filter includes a transmission filter circuit and an additional circuit that is electrically connected in parallel with at least a portion of the transmission filter circuit. The additional circuit includes a resonator group including a plurality of interdigital transducer electrodes provided adjacent to or in a vicinity of each other in an acoustic wave propagation direction, a first capacitive element electrically connected between the resonator group and one end of the additional circuit, and a second capacitive element connected between a ground and a signal path electrically connecting the resonator group and the first capacitive element. A capacitance of the second capacitive element is greater than about 0 pF and less than or substantially equal to about 2.0 pF.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: May 10, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Shinichi Nakamura
  • Patent number: 11316514
    Abstract: A voltage detection circuit includes a first transistor and a first resistor connected in series between a power supply voltage node and a reference voltage node, a second transistor and a second resistor connected in series between the power supply voltage node and the reference voltage node, a third transistor and a third resistor connected in series between the power supply voltage node and the reference voltage node, and a signal generator that outputs a signal corresponding to a voltage of a connection node between the third transistor and the third resistor. The second transistor is first turned on among the first to third transistors and a voltage level of the power supply voltage node increases, turning off the third transistor, and then a current flows through the first transistor and the first resistor. When the third transistor is turned on, the signal generator changes a logic of the signal.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: April 26, 2022
    Assignee: Kioxia Corporation
    Inventor: Hiroyuki Ideno
  • Patent number: 11316349
    Abstract: The present disclosure relates to a recloser control that provides autosynchronization of a microgrid to an area electric power system (EPS). For example, a recloser control may include an output connector that is communicatively coupled to a recloser at a point of common coupling (PCC) between the area EPS and the microgrid. The recloser control may include a processor that acquires a first set of measurements indicating electrical characteristics of the area EPS and acquires a second set of measurements indicating electrical characteristics of the microgrid. The recloser control may send synchronization signals to one or more distributed energy resource (DER) controllers to synchronize one or more DERs to the area EPS based on the first set of measurements and the second set of measurements.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: April 26, 2022
    Assignee: Schweitzer Engineering Laboratories, Inc.
    Inventors: Craig Thompson, Scott M Manson
  • Patent number: 11309708
    Abstract: An exemplary power system includes a DC power bus and a photovoltaic system connected to the DC power bus. An energy storage system is connected to the DC power bus and stores energy injected to the DC power bus by the photovoltaic system. A power inverter is connected to the DC power bus and converts power between the DC power bus and an AC connected load. The power system also includes a control system that receives power system data from one or more sub-systems and devices connected to the DC power bus, and controls, in real-time, one or more of the power inverter and the energy storage system to act as a load on the DC power bus based on the received power system data.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: April 19, 2022
    Assignee: Fluence Energy, LLC
    Inventors: Samuel Ley, Felipe Cantero
  • Patent number: 11303127
    Abstract: The current disclosure provides methods and systems for intelligent load management in off-grid AC systems and provides methods and systems to control and prioritize loads, so that supply and demand can be balanced via an extremely robust and reliable system.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: April 12, 2022
    Assignee: University of South Carolina
    Inventors: Enrico Santi, Andrew Wunderlich
  • Patent number: 11303265
    Abstract: A negative capacitance circuit is connected between a drain and a source of the mixer transistor. With this configuration, the negative capacitance circuit is connected in parallel to a parasitic capacitance generated between the drain and the source of the mixer transistor, and the parasitic capacitance can be canceled out in a wide band by the negative capacitance circuit connected in parallel.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: April 12, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Teruo Jo, Hiroshi Hamada, Hideyuki Nosaka
  • Patent number: 11300929
    Abstract: A timepiece with a mechanical movement which includes an indicator mechanism of at least one time data item, a mechanical resonator forming a mechanical oscillator which paces the running of the indicator mechanism, and a regulation device to prevent a potential time drift in the running of the indicator mechanism. The regulation device is formed by a master oscillator and a mechanical braking device of the mechanical resonator, this mechanical braking device being arranged to be able to apply periodically to the mechanical resonator braking pulses at a braking frequency determined by the master oscillator. The system, formed of the mechanical resonator and the mechanical braking device, is configured so as to enable the mechanical braking device to be able to start the braking pulses at any position of the mechanical resonator. The braking pulses have a duration less than one quarter of a set-point period.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: April 12, 2022
    Assignee: The Swatch Group Research and Development Ltd
    Inventor: Lionel Tombez
  • Patent number: 11296678
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for processing signals using a current-mode biquad filter, which may have a tunable bias current and/or tunable capacitance. One example apparatus is a current-mode biquad filter circuit that includes a first input current node, a first capacitive element coupled to the first input current node, a first output current node, a first active filter circuit coupled between the first input current node and the first output current node, and a second active filter circuit coupled between the first input current node and the first output current node. The second active filter circuit is complementary to the first active filter circuit.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: April 5, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Timothy Donald Gathman, Lai Kan Leung
  • Patent number: 11293223
    Abstract: A load control system for a building having a lighting load, a window, and a heating and cooling system comprises a lighting control device, a daylight control device, and a temperature control device operable to be controlled so as to decrease a total power consumption of the load control system in an energy-savings mode. The energy-savings mode can be manually overridden in response to actuation of the actuator of an input control device, such that the load control system enters a manual mode for manually adjusting the loads controlled by the lighting control device, the daylight control device, and the temperature control device. The load control system is operable to automatically return to the energy-savings mode at a time after the load control system entered the manual mode.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: April 5, 2022
    Assignee: Lutron Technology Company LLC
    Inventors: Gregory S. Altonen, William B. Fricke, Elliot G. Jacoby, Michael W. Pessina, Walter S. Zaharchuk, Joel S. Spira
  • Patent number: 11294335
    Abstract: Embodiments of the present disclosure provide a data buffering method, electronic device and computer-readable medium. The method includes receiving, at a first node of a network, time window information from a second node of the network, the time window information defining a time window when data is transmitted from the first node to the second node. The method further includes enabling a first clock circuit of the first node at least partly based on the time window information to provide a first clock signal for data transmission from the first node to the second node. Therefore, the power consumption at the first node can be effectively reduced.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: April 5, 2022
    Assignee: Nokia Solutions and Networks Oy
    Inventor: Chunlin Wang
  • Patent number: 11296669
    Abstract: A multilayer filter may include a plurality of dielectric layers stacked in a Z-direction. A first conductive layer may overlie one of the dielectric layers, and a second conductive layer may overlie another of the dielectric layers and be spaced apart from the first conductive layer in the Z-direction. A first via may be connected with the second conductive layer at a first location. A second via may be connected with the second conductive layer at a second location that is spaced apart in a first direction from the first location. The first conductive layer may overlap the second conductive layer at an overlapping area to form a capacitor. At least a portion of the overlapping area may be located between the first location and the second location in the first direction. The second conductive layer may be free of via connections that intersect the overlapping area.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: April 5, 2022
    Assignee: KYOCERA AVX Components Corporation
    Inventors: Kwang Choi, Marianne Berolini
  • Patent number: 11296504
    Abstract: Power distribution modules are configured to distribute power to a power-consuming component(s), such as a remote antenna unit(s) (RAU(s)). By “hot” connection and/or disconnection, the power distribution modules can be connected and/or disconnected from a power unit and/or a power-consuming component(s) while power is being provided to the power distribution modules. Power is not required to be disabled in the power unit before connection and/or disconnection of power distribution modules. The power distribution modules may be configured to protect against or reduce electrical arcing or electrical contact erosion that may otherwise result from “hot” connection and/or connection of the power distribution modules.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: April 5, 2022
    Assignee: Corning Optical Communications LLC
    Inventors: Chois Alven Blackwell, Jr., Boyd Grant Brower, Terry Dean Cox
  • Patent number: 11296679
    Abstract: The present disclosure relates to a phase shifter including an input port configured to receive a radio frequency (RF) signal; a first output port, a second output port, a third output port, and a fourth output port each configured to output a respective phase-shifted sub-component of the RF signal; a first conductive trace that extends in a first direction, the first conductive trace coupled to the first output port and the second output port; a second conductive trace that extends in the first direction, the second conductive trace coupled to the third output port and the fourth output port; and a first wiper configured to couple the input port to the first conductive trace and the second conductive trace, wherein the first wiper is configured to be slidable in the first direction with respect to the first conductive trace and the second conductive trace.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: April 5, 2022
    Assignee: CommScope Technologies LLC
    Inventors: Pengfei Guo, Fangwen Wan, Jinchun He
  • Patent number: 11289825
    Abstract: A radio frequency module includes a first electronic component embedded in an insulating layer, a wiring line connected to the first electronic component, and a via conductor extending in a direction perpendicular or substantially perpendicular to a main surface of the insulating layer and including a first portion and a second portion. The first portion of the via conductor is connected to the wiring line. A sectional area of the first portion of the via conductor in a direction parallel or substantially parallel to the main surface of the insulating layer differs from a sectional area of the second portion of the via conductor in the direction parallel or substantially parallel to the main surface of the insulating layer.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: March 29, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takashi Iwamoto
  • Patent number: 11277158
    Abstract: According to one embodiment, a semiconductor device includes: a selector configured to select one of multiple input terminals and to connect the selected input terminal to a connection terminal connected to one end of an inductor; a low noise amplifier in which an input terminal is connected to a connection terminal connected to the other end of the inductor; and at least one matching circuit. The matching circuit is connected between the two connection terminals and includes a first switch, a second switch, and a capacitor, one end of the capacitor is connected to one of the two connection terminals via the first switch, and the other end of the capacitor is connected to the other of the two connection terminals via the second switch.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: March 15, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Nam Binh Tran
  • Patent number: 11277122
    Abstract: A D-type flip-flop circuit 1 has a structure in which a pMOS transistor p8 and an nMOS transistor n8 are added to a general D-type flip-flop circuit comprising pMOS transistors p1 to p7, p11 to p15 and nMOS transistors n1 to n7, n11 to n15.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: March 15, 2022
    Assignees: National University Corporation Kyoto Institute of Technology, Dolphin Design
    Inventors: Kazutoshi Kobayashi, Jun Furuta, Kodai Yamada
  • Patent number: 11277116
    Abstract: A multiplexer includes a transmit filter circuit, a receive filter circuit, and an additional circuit connected in parallel with a portion of the transmit filter circuit. The transmit filter circuit includes series resonators on a signal path connecting a common terminal and a first terminal, and parallel resonators on the signal path between a node and ground. The series resonator closest to the first terminal includes split resonators. The additional circuit includes a capacitor and a resonator group. The resonator group includes IDT electrodes side by side in the direction of acoustic wave propagation. A first end of the resonator group is connected to the common terminal with the capacitor interposed therebetween. A second end of the resonator group is connected to the signal path between two of the split resonators such that no capacitor is interposed between the second end and the signal path.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: March 15, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Keiji Okada