Patents Examined by Emily Y Chan
  • Patent number: 7449909
    Abstract: A testing system or method compares read data from one or more dies in a semiconductor wafer with the original data written onto the one or more dies. The testing system includes one or more write registers connected to one or more dies on the semiconductor wafer. One or more comparators are connected to the dies and the write registers. The comparator generates a result in response to the original data and the read data.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: November 11, 2008
    Assignee: Infineon Technologies AG
    Inventors: David SuitWai Ma, Tao Wang, James J. Dietz, Bing Ren
  • Patent number: 7443182
    Abstract: There is disclosed a coordinate transformation device for electrical signal connection used for a probe card applicable to narrow pitch pads, which particularly simplifies wiring from the terminal onto the inspection apparatus board and prevents electrical contact failure. In the coordinate transformation device for electrical signal connection, an input terminal of a first wiring group corresponding to one of probe output terminals is provided with at least two terminals independently movable in a yz plane. When the probe output terminal and the input terminal of the first wiring group are contacted and conducted with each other, a wall surface of a first terminal of the input terminal of the first wiring group comes into contact with a side wall of the probe output terminal, and a wall surface of a second terminal thereof comes into contact with a side surface on the opposite side of the probe output terminal.
    Type: Grant
    Filed: November 6, 2007
    Date of Patent: October 28, 2008
    Inventor: Gunsei Kimoto
  • Patent number: 7439753
    Abstract: The present invention discloses an inverter test device and a method thereof, which provides a single-load environment or a multi-load test environment to test electrical performance of an inverter or inverters, including: unbalanced current comparison, phase comparison, current/voltage deviation, and fusion heat (I2T), and record the test results, wherein the test method of the present invention is implemented with the procedures, which can be executed in a computer or a similar device to undertake control and data processing, and the electrical signals acquired by the inverter test device are processed, compared and calculated in order to realize the abovementioned tests of unbalanced current comparison, phase comparison, current/voltage deviation, and fusion heat (I2T).
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: October 21, 2008
    Assignee: Zippy Technology Corp.
    Inventors: Chin-Wen Chou, Ying-Nan Cheng, Kuang-Ming Wu, Chin-Biau Chung
  • Patent number: 7429867
    Abstract: Various embodiments of the present invention describe circuits for and methods of detecting a defect in a component formed in a substrate of an integrated circuit. According to one embodiment, a circuit comprises a plurality of components formed in a substrate and coupled in series by a plurality of signal paths extending from a first end to a second end. An input signal coupled to the first end of the first signal path is detected a signal detector coupled to a second end of the first signal path to determine whether there is a defect in a component formed in the substrate. Switching networks at the inputs and the outputs of the plurality signal paths enable determining a particular signal path that had a defect. Alternate embodiments describe circuits for determining the location of a defective component in a signal path. Various methods of detecting defective components are also described.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: September 30, 2008
    Assignee: Xilinx, Inc.
    Inventor: Jan L. de Jong
  • Patent number: 7423445
    Abstract: Trim codes are determined for semiconductor devices under test (DUTs), wherein the trim codes correspond to voltage or current reference value adjustments that cause the DUTs to generate desired voltage or current reference values. The technique involves supplying respective trim codes simultaneously to the DUTs to cause them to generate trimmed analog voltage or current references, simultaneously feeding a test analog voltage or current reference having a preselected reference value to the DUTs, and for each DUT, comparing the value of the test analog reference to the values of the trimmed analog references to ascertain the crossing of the value of the test analog reference by the values of the trimmed references, whereby for each DUT the trim code corresponding to the value of the trimmed analog voltage or current reference immediately above or below the crossing is established as the preferred trim code to be used for that DUT.
    Type: Grant
    Filed: July 17, 2006
    Date of Patent: September 9, 2008
    Assignee: Qimonda North America Corp.
    Inventors: Richard Lewison, Vincent Acierno, Klaus Hummler
  • Patent number: 7420381
    Abstract: A test configuration for double sided probing of a device under test includes a holder to secure the device under test in a first orientation, a calibration substrate secured in a second orientation and a probe capable of calibration using the calibration substrate and probing the device under test.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: September 2, 2008
    Assignee: Cascade Microtech, Inc.
    Inventors: Terry Burcham, Peter McCann, Rod Jones
  • Patent number: 7414425
    Abstract: While a PWM-controlled, FET-switched three-phase motor is operating in a mechanical damping mode, a single current sensor is used to measure current in the motor. When mechanical feedback into the motor exceeds a predetermined threshold, a bank of the FET switches can be closed to provide damping of the mechanical feedback. This causes currents to circulate within the motor, which an external single current sensor cannot measure to determine current load or when the mechanical feedback is no longer a problem. The present invention periodically switches selected switches necessary to sample the current in at least one phase of the motor to determine when the mechanical feedback into the motor is no longer a problem, while preferably also maintaining an average zero voltage vector.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: August 19, 2008
    Assignee: Temic Automotive of North America, Inc.
    Inventors: Patrick A. O'Gorman, Scott W. Repplinger
  • Patent number: 7400156
    Abstract: A vertical probe device includes two guide members arranged in a stack manner and defining therebetween an accommodation chamber, a probe holder plate disposed between the guide members, and a plurality of probes inserted through the guide plates and the probe holder plate in such a manner that the probes are flexible within the accommodation chamber. One of the guide plates has at least one through hole. The probe holder plate is slightly moveable in horizontal and vertical directions but fixable to one of the guide plats under a force applied through the at least one through hole to the probe holder plate while the other of the guide plates is removed, thereby preventing damage of the probes or movement of the probes during a maintenance work.
    Type: Grant
    Filed: September 6, 2006
    Date of Patent: July 15, 2008
    Assignee: MJC Probe Incorporation
    Inventors: Shih-Chang Wu, Hendra Sudin, Hsin-Hung Lin, Ming-Chi Chen
  • Patent number: 7385412
    Abstract: Systems and methods for testing microelectronic imagers and microfeature devices are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece including a substrate having a front side, a backside, and a plurality of microelectronic dies. The individual dies include an integrated circuit and a plurality of contact pads at the backside of the substrate operatively coupled to the integrated circuit. The method includes contacting individual contact pads with corresponding pins of a probe card. The method further includes testing the dies. In another embodiment, the individual dies can further comprise an image sensor at the front side of the substrate and operatively coupled to the integrated circuit. The image sensors are illuminated while the dies are tested.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: June 10, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, William M. Hiatt, Alan G. Wood, Charles M. Watkins, Kyle K. Kirby
  • Patent number: 7375540
    Abstract: A method and system for monitoring and compensating the performance of an operational circuit is provided. The system includes one or more integrated circuit chips and a controller. Each integrated circuit chip includes one or more operational circuits, each operational circuit having at least one controllable circuit parameter. Each integrated circuit chip also includes a process monitor module at least partially constructed thereon. The controller is coupled to each process monitor module and to each operational circuit. The controller includes logic for evaluating the performance of an operational circuit based on data obtained from process monitor module and operational circuit related data stored in a memory. Based on the evaluation, the controller determines whether any deviations from desired or optimal performance of the circuit exist. If deviations exist, the controller generates a control signal to initiate adjustments to the operational circuit to compensate for the deviations.
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: May 20, 2008
    Assignee: Broadcom Corporation
    Inventors: Lawrence M. Burns, Leonard Dauphinee, Ramon A. Gomez, James Y. C. Chang
  • Patent number: 7374293
    Abstract: An electronic element testing apparatus for use with a number of probes. Each probe has a lower pole and an upper pole. The apparatus includes: a first plate having a first side and a second side, the first side having an array of lower pole regions disposed thereabout, each lower pole region configured to receive a lower pole of a probe; and a plurality of signal conductor regions disposed proximate the array of lower pole regions, each signal conductor region arranged to provide a non-cable electrical path between a lower pole region and a switching circuit. The switching circuits are operable to sequentially connect each electronic element to a testing circuit via the upper and lower poles.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: May 20, 2008
    Assignee: Vishay General Semiconductor Inc.
    Inventors: Kuang-Jung Li, Chin-Chen Hsu, Yi-Li Lin, Shyan-I Wu
  • Patent number: 7372283
    Abstract: A probe navigation method, a navigation device, and a defect inspection device wherein in a charged particle beam system provided with probes for electrical characteristics evaluation, probing can be easily carried out regardless of the equipment user's level of skill are provided. To attain this object, probes and a test piece stage on which a test piece is placed are driven by independent driving means. Further, a large stage driving means which integrally drives the probes and the test piece stage is provided. In addition, CAD navigation is adopted. This enhances the equipment users' convenience during probing.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: May 13, 2008
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Takashi Furukawa, Takayuki Mizuno, Eiichi Hazaki, Hirofumi Sato
  • Patent number: 7372250
    Abstract: A sensing system includes a plurality of probes arranged in a spaced relation around a stage that is adapted to support a substrate. Each probe includes a detection portion adapted to move from a known starting position toward an edge of the substrate that is supported by the stage; detect the edge of the substrate while the substrate is supported by the stage; generate a detection signal following said detection; and stop moving toward the edge of the substrate following said detection. A controller may determine an edge position of the substrate relative to the stage based on the known starting position of each detection portion and based on the detection signal generated by each detection portion. Numerous other aspects are provided.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: May 13, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Shinichi Kurita, Emanuel Beer, Edgar Kehrberg, Matthias Brunner
  • Patent number: 7368928
    Abstract: A vertical-type probe card includes a circuit board, which has signal circuits and grounding circuits arranged in such a manner that each signal circuit is disposed in parallel and adjacent to one grounding circuit and kept a predetermined distance from the grounding circuit, and a probe assembly, which is arranged at the bottom side of the circuit board and has an upper guide plate, a lower guide plate, a conducting layer provided on the lower guide plate, a plurality of signal probes respectively electrically connected to the signal circuits and adjacent to a plurality of compensation probes, and at least one grounding probe electrically connected to the grounding circuits in a manner that the signal, compensation and grounding probes are vertically inserted through the upper and lower guide plates, and the conducting layer is conducted with the compensation probe and the grounding probe while electrically insulated to the signal probe.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: May 6, 2008
    Assignee: MJC Probe Incorporation
    Inventors: Hsin-Hung Lin, Shih-Cheng Wu, Wei-Cheng Ku, Chien-Liang Chen, Ming-Chi Chen, Hendra Sudin
  • Patent number: 7368933
    Abstract: A system and method for testing standby current of a semiconductor package is provided. The method includes testing semiconductor chips formed on a wafer having a predetermined wafer run number, collecting measured values of standby current of the semiconductor chips, and storing the measured values of standby current in a database, by using a wafer tester; recognizing a wafer run number of each of semiconductor packages to be tested; downloading measured values of standby current of semiconductor chips corresponding to the recognized wafer run number from the database to a semiconductor package tester; extracting a boundary value defining predetermined upper values of the downloaded measured values of standby current, by using the semiconductor package tester; setting the boundary value as a standby current limit of a program for testing the semiconductor packages by use of the semiconductor package tester; and testing the semiconductor packages based on the standby current limit.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: May 6, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-Bo Sim, Joo-Seok Kwak, Seong-Su Kim, Yun-Bo Yang, Sun-Ki Kim
  • Patent number: 7365555
    Abstract: A semiconductor device has a boosting circuit configured to generate a boosting potential to an output line. An internal circuit is supplied with the boosting potential from the boosting circuit via the output line. A test line is connected to the output line. A control circuit is arranged between the output line and the test line and configured to shut off a current flowing into the test line from the output line during a boosting operation of the boosting circuit.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: April 29, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Junichiro Noda
  • Patent number: 7362112
    Abstract: A signal acquisition probe has a double cushioned spring loaded probing tip assembly disposed in a housing. A first compressive element produces a first pre-loaded compressive force and an increasing compressive force on the probing tip assembly and a second compressive element produces a second pre-loaded compressive force and an increasing compressive force on the probing tip assembly subsequent to the first increasing compressive force. First and second double cushioned spring loaded probing tip assemblies may be disposed in a housing to produce a differential signal acquisition probe.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: April 22, 2008
    Assignee: Tektronix, Inc.
    Inventors: Kei-Wean C. Yang, Mark W. Nightingale
  • Patent number: 7362123
    Abstract: An inspection apparatus for a TFT substrate formed with a plurality of pixels, includes a reference substrate being opposite to and spaced from the TFT substrate and formed with a plurality of reference patterns corresponding to the pixels, a power supply to supply power to both a predetermined number of the pixels and the corresponding reference pattern to form an electric field in a space between the TFT substrate and the reference substrate, an electron beam emitter to emit an electron beam to travel from a first side to a second side of the space, an electron beam detector to detect the electron beam emitted from the electron beam emitter and passed through the space, and a controller to determine whether the TFT substrate includes a defective pixel based on a location of the electron beam detected by the electron beam detector. Thus, the inspection apparatus can correctly and quickly inspect the TFT substrate for defects in a low vacuum state regardless a size of the TFT substrate.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: April 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-seok Choi, Sergey Antonov, Hyeong-min Ahn, Jeong-su Ha, Lemjachine Vassili, Mi-jeong Song
  • Patent number: 7358756
    Abstract: A method and apparatus for testing a liquid crystal display device are provided to detect a defect location precisely and rapidly without requiring a jig. The method includes providing an inspection apparatus as a removable portion of the liquid crystal display device; inspecting the display part of the liquid crystal display device using the inspection apparatus; removing the inspection apparatus from the liquid crystal display device after the inspection is completed; and attaching driving circuits to the liquid crystal display device having the inspection apparatus removed therefrom.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: April 15, 2008
    Assignee: LG. Philips LCD Co., Ltd.
    Inventors: Jong Dam Kim, Hyun Kyu Lee, Yong Jin Cho, See Hwa Jeong
  • Patent number: 7358750
    Abstract: An inspection apparatus comprises a fixed unit including a control device and a measurement device, and a moving unit including contact terminals, which are brought into contact with contacts formed on a printed board having electrode patterns subjected to electrical inspection (e.g., electrical conduction inspection). The contact terminals are connected to a connection switching device via a plurality of first wires, wherein the connection switching device is arranged in the moving unit for selectively switching over the first wires. A plurality of third wires are arranged for establishing connections between the fixed unit and the selectively-switched first wires, wherein the number of the third wires is smaller than that of the first wires.
    Type: Grant
    Filed: January 15, 2004
    Date of Patent: April 15, 2008
    Assignee: Yamaha Fine Technologies Co., Ltd.
    Inventors: Yasunori Mizoguchi, Toru Ishii, Kengo Tsuchida