Patents Examined by Ernest F. Karlsen
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Patent number: 5939890Abstract: A tweezer probe comprises a pair of arms (10) each made of a multi-layer printed circuit board. The outer conductive layers (20, 32) on each arm are etched to form a shield region (36) and a tip contact (34). The tip contacts (34) are connected to inner conductive layers (24, 28) by through-hole plating, the inner layers being etched to form connector wires (40) extending along the length of the arms to a connector region where leads (8) are attached. The arms (10) are substantially rigidly mounted together, with an adjustment mechanism (14, 72, 74, 76) being provided to alter the angle between the arms, the tips being moveable towards each other against the bias provided by the inherent resilience of the arms.Type: GrantFiled: September 25, 1997Date of Patent: August 17, 1999Assignee: Fluke CorporationInventors: Claus Kohen, Rolf Heuchert, Gunther Ruch, Steffen Zierau
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Patent number: 5929650Abstract: A method of detecting defective CMOS devices by quiescent current (IDDQ) behavior using a monitor circuit resident in the expendable areas of a die and/or wafer. One embodiment of the present invention incorporates a monitor unit (10) into the scribe grid of a wafer, where pads (2, 3, 4) are built in the corners of the die (5) and connected to the monitor unit (10) via metal connects in the wafer. The monitor unit (10) determines defective die based on IDDQ as expressed by decay of voltage (Vdd) in time, where Vdd is supplied to a die by way of a switch (20) in the monitor unit (10). Alternate embodiments incorporate various configurations and incorporate functional and other tests into a wafer level test system. Other embodiments provide the monitor unit on the die, allowing for later testing and user confirmation.Type: GrantFiled: February 4, 1997Date of Patent: July 27, 1999Assignee: Motorola, Inc.Inventors: Bernard J. Pappert, Clark Shepard, Alfred Larry Crouch, Robert Ash
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Patent number: 5929626Abstract: A contact making and breaking device improves the dielectric absorption property of capacitance between one signal wire brought out from a reed switch and an conductive casing. A low current measurement system using the contact making breaking device greatly shortens the measurement waiting time when low current is measured. The contact making and breaking device includes a reed switch with first and second signal wires brought out from either end, a conductive casing, and an insulating material formed between at least the first signal wire and the conductive casing. A tubular conductor is emplaced in the region in which the insulating material is formed and at least partially encloses the reed switch. The tubular conductor is connected to the first signal wire.Type: GrantFiled: November 3, 1997Date of Patent: July 27, 1999Assignee: Hewlett-Packard CompanyInventors: Yuko Iwasaki, Susumu Takagi, Hideyuki Norimatsu
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Patent number: 5929651Abstract: An apparatus and a method for simultaneously testing or burning in all the integrated circuit chips on a product wafer. The apparatus comprises a glass ceramic carrier having test chips and means for connection to pads of a large number of chips on a product wafer. Voltage regulators on the test chips provide an interface between a power supply and power pads on the product chips, at least one voltage regulator for each product chip. The voltage regulators provide a specified Vdd voltage to the product chips, whereby the Vdd voltage is substantially independent of current drawn by the product chips. The voltage regulators or other electronic means limit current to any product chip if it has a short. The voltage regulator circuit may be gated and variable and it may have sensor lines extending to the product chip. The test chips can also provide test functions such as test patterns and registers for storing test results.Type: GrantFiled: November 18, 1996Date of Patent: July 27, 1999Assignee: International Business Machines CorporationInventors: James Marc Leas, Robert William Koss, Jody John Van Horn, George Frederick Walker, Charles Hampton Perry, David Lewis Gardell, Steve Leo Dingle, Ronald Prilik
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Patent number: 5929644Abstract: A non-destructive and non-invasive method for monitoring a selected characteristic of a fabricated semiconductor sample while inside a fabrication chamber and during the fabrication process, where selected materials are deposited on a planar surface of a wafer substrate in a fabrication chamber, employs one or more viewports in the walls of the fabrication chamber. A focused electromagnetic wave is generated external to the fabrication chamber, and directed through a viewport to impinge upon a selected portion of the planar surface of the wafer substrate at an oblique incident angle relative to the planar surface of the wafer substrate. In turn, a reflected electromagnetic wave emanating from the planar surface of the wafer substrate is detected. A signal processor then determines a reflection coefficient as a function of a selected characteristic of the focused electromagnetic wave and the reflected electromagnetic wave.Type: GrantFiled: January 30, 1997Date of Patent: July 27, 1999Assignee: TLC Precision Wafer Technology, Inc.Inventor: Vladimir Sokolov
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Patent number: 5929652Abstract: An apparatus for determining the minority carrier lifetime of a semiconductor sample includes a positioner for moving the sample relative to a coil. The coil is connected to a bridge circuit such that the impedance of one arm of the bridge circuit is varied as sample is positioned relative to the coil. The sample is positioned relative to the coil such that any change in the photoconductance of the sample created by illumination of the sample creates a linearly related change in the input impedance of the bridge circuit. In addition, the apparatus is calibrated to work at a fixed frequency so that the apparatus maintains a consistently high sensitivity and high linearly for samples of different sizes, shapes, and material properties. When a light source illuminates the sample, the impedance of the bridge circuit is altered as excess carriers are generated in the sample, thereby producing a measurable signal indicative of the minority carrier lifetimes or recombination rates of the sample.Type: GrantFiled: September 2, 1997Date of Patent: July 27, 1999Assignee: Midwest Research InstituteInventor: Richard K. Ahrenkiel
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Patent number: 5923179Abstract: A test socket used to test an integrated circuit that is mounted to a package or circuit board. The test socket includes a base that supports the integrated circuit and the circuit board. Pivotally connected to the socket's base are a pair of heat sinks that can be moved between a first position and a second position. When in the first position the heat sinks are pressed into either the package or integrated circuit to provide a direct conductive path between the integrated circuit die and the heat sinks. A plurality of test contacts are placed into contact with a plurality of surface pads located on the package to test the integrated circuit. The direct conductive path between the heat sinks and the die lowers the overall thermal impedance of the socket assembly and the junction temperatures of the integrated circuit during an electrical test routine of the circuit.Type: GrantFiled: March 29, 1996Date of Patent: July 13, 1999Assignee: Intel CorporationInventor: Scott A. Taylor
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Patent number: 5923176Abstract: A high speed test fixture for testing printed circuit board (PCB)-mounted high speed pin grid array (PGA) chips attaches to the solder side (underside) of the PCB to eliminate the need for lead-lengthening adapter sockets. As a result, the testing can be conducted at the actual chip operating speed with reduced noise, rather than at slower speeds required by "noisy" prior art approaches.Type: GrantFiled: August 19, 1991Date of Patent: July 13, 1999Assignee: NCR CorporationInventors: Warren W. Porter, Ikuo J. Sanwo
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Patent number: 5917319Abstract: An apparatus for sensing current in a switching device having resistive voltage-current characteristics includes a first and second power terminal (typically common or ground) for the application therebetween of an operating potential (or alternatively, power), an impedance connected between the first power terminal and a node, a switching device having its main conduction path connected between the node and the second power terminal for controlling the flow of current through the impedance, at least one sense device coupled to the node, operative to sense or divide the potential at the node to thereby provide a sensing potential, where at least one of the sense devices is switched only during at least a portion of the period when the switching device is turned on, and a voltage reference generating circuit operative to generate a reference voltage for comparison with the sensed potential.Type: GrantFiled: April 8, 1997Date of Patent: June 29, 1999Assignee: National Semiconductor CorporationInventors: Richard Frank, Bruce Lee Inn, Tamas Szepesi
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Patent number: 5917331Abstract: A power supply for testing an integrated circuit includes a source voltage input terminal for receiving an input voltage. A plurality of switches are coupled in parallel to the input terminal, where each of the switches is coupled to an associated resistor. Each resistor, in turn, is coupled to an output terminal that is connected to the device under test (DUT). A soft switch is connected to both the input terminal and output terminal, where the soft switch is configured to condition the output terminal voltage when one of the switches is opened or closed. The soft switch quickly stabilizes the output voltage and reduces transients in the VDUT output signal.Type: GrantFiled: October 23, 1995Date of Patent: June 29, 1999Assignee: Megatest CorporationInventor: Thomas Walkley Persons
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Patent number: 5914592Abstract: A signal from an original oscillation circuit is inputted into a phase-locked loop circuit capable of continuously varying a frequency of this signal derived from the original oscillation circuit. The phase-locked loop circuit changes the frequency of the signal derived from the original oscillation circuit into another frequency corresponding to sweep rate variable information derived from a sampling control unit, and then outputs the signal having the changed frequency. This signal outputted from the phase-locked loop circuit is supplied to a variable frequency dividing circuit. This variable frequency dividing circuit frequency-divides the frequency of the signal outputted from the phase-locked loop circuit at an arbitrary frequency dividing ratio corresponding to the sweep rate range information given from the sampling control unit, and thereafter outputs the signal with the frequency-divided frequency as a sampling signal.Type: GrantFiled: February 8, 1996Date of Patent: June 22, 1999Assignee: Hitachi Denshi Kabushiki KaishaInventor: Masanori Saito
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Patent number: 5914612Abstract: A tweezer probe comprises a pair of arms (10) each made of a multi-layer printed circuit board. The outer conductive layers (20,32) on each arm are etched to form a shield region (36) and a tip contact (34). The tip contacts (34) are connected to inner conductive layers (24,28) by through-hole plating, the inner layers being etched to form connector wires (40) extending along the length of the arms to a connector region where leads (8) are attached. The arms (10) are substantially rigidly mounted together, with an adjustment mechanism (14,72,74,76) being provided to alter the angle between the arms, the tips being moveable towards each other against the bias provided by the inherent resilience of the arms.Type: GrantFiled: July 2, 1996Date of Patent: June 22, 1999Assignee: Fluke CorporationInventors: Claus Koken, Rolf Heuchert, Gunther Ruch, Steffen Zierau
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Patent number: 5914614Abstract: Probes for electronic devices are described. The probe is formed by ball bonding a plurality of wires to contact locations on a fan out substrate surface. The wires are cut off leaving stubs. A patterned polymer sheet having electrical conductor patterns therein is disposed over the stubs which extend through holes in the sheet. The ends of the wires are flattened to remit the polymer sheet in place. The wire is connected to an electrical conductor on the polymer sheet which is converted to a contact pad on the polymer sheet. A second wire is ball bonded to the pad on the polymer sheet and cut to leave a second stub. The polymer sheet is laser cut so that each second stub is free to move independently of the other second studs. The ends of the second stubs are disposed against contact locations of an electronic device, such as an FC chip, to test the electronic device.Type: GrantFiled: October 7, 1997Date of Patent: June 22, 1999Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih
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Patent number: 5914613Abstract: A membrane probing assembly includes a support element having an incompressible forward support tiltably coupled to a rearward base and a membrane assembly, formed of polyimide layers, with its central region interconnected to the support by an elastomeric layer. Flexible traces form data/signal lines to contacts on the central region. Each contact comprises a rigid beam and a bump located in off-centered location on the beam, which bump includes a contacting portion. After initial touchdown of these contacting portions, further overtravel of the pads causes each beam to independently tilt locally so that different portions of each beam move different distances relative to the support thus driving each contact into lateral scrubbing movement across the pad thereby clearing away oxide buildup. The elastomeric member backed by the incompressible support ensures sufficient scrub pressure and reliable tilt recovery of each contact without mechanical straining of the beam.Type: GrantFiled: August 8, 1996Date of Patent: June 22, 1999Assignee: Cascade Microtech, Inc.Inventors: K. Reed Gleason, Kenneth R. Smith, Mike Bayne
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Patent number: 5912555Abstract: A probe apparatus comprising an apparatus body fitted with a probing card having a probe connected electrically with an electrode of an object of inspection, a test head operatively mounted on the apparatus body and electrically continuous with the probe of the probing card, rotating mechanism for rotating the test head, and vertical moving mechanism for vertically raising or lowering the test head.Type: GrantFiled: April 5, 1996Date of Patent: June 15, 1999Assignee: Tokyo Electron LimitedInventors: Yutaka Akaike, Chiaki Mochizuki, Isao Kono, Haruhiko Yoshioka
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Patent number: 5909114Abstract: The present invention provides a rapid coulometric analysis for the quantitative determination of a sample substance with high reproducibility without any application of voltage etc. from the outside, as well as a galvanic cell and a device for use in said coulometric analysis. According to the present invention, a wide variety of components can be analyzed by selection of electroactive substance introduced into the galvanic cell. The present invention enables a simple and easy analysis for food components such as glutamic acid, ascorbic acid, etc., water quality such as COD, etc.Type: GrantFiled: October 23, 1997Date of Patent: June 1, 1999Assignee: Nakano Vinegar Co., Ltd.Inventors: Shunichi Uchiyama, Takeshi Sato, Hirofumi Akano, Yoshiya Kawamura
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Patent number: 5909124Abstract: Apparatus for testing an electrical circuit having: a base for receiving a printed circuit board carrying the electrical circuit, wherein the base section includes a plurality of test pins for contacting a corresponding plurality of solder pads formed on a surface of the circuit board; a cover section comprising a test head facing an opposite surface of the printed circuit for shorting together a plurality of contacts of a component of the electrical circuit connected to the plurality of solder pads and mounted on the opposite surface of the circuit board; means for applying a stimulus signals to at least one test pin; and means for detecting a signal at a second test pin.Type: GrantFiled: April 19, 1996Date of Patent: June 1, 1999Assignee: International Business Machines CorporationInventors: Anthony Madine, Alexander Nicol
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Patent number: 5907246Abstract: A method and apparatus for testing of semiconductor chips. The method and apparatus having a fixture which includes electrical contacts and thermal contacts. The electrical contacts are configured to drive each of the chips in an operating or stressed condition. The thermal contacts are configured to maintain the chip at a desired temperature during testing.Type: GrantFiled: November 29, 1995Date of Patent: May 25, 1999Assignee: Lucent Technologies, Inc.Inventors: Bruce C. Abraham, Patrick J. Drummond
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Patent number: 5905381Abstract: Disclosed is a failure analysis tool including a production tester electrically coupled to a test IC in such a manner that it can test the IC in a conventional manner (e.g. by providing a series of dynamic vectors), and also provide an OBIC signal to an OBIC detection system. This is accomplished by providing power to the IC through a voltage source having a non-zero internal resistance while the OBIC signal is generated, thus preventing the OBIC signal from shorting to ground when it is received at the power supply. Failure analysis is conducted by first performing functional testing with a production tester until a failing state is identified. While this functional testing is being performed, the internal resistance of the voltage source is set to zero. Then, when the failing state is identified, the internal resistance of the voltage source is set to a non-zero value and the IC is scanned by an optical beam to generate OBIC signals indicating the locus of the failure.Type: GrantFiled: August 22, 1996Date of Patent: May 18, 1999Assignee: LSI Logic CorporationInventor: Mingde Nevil Wu
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Patent number: 5905382Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a die cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical test, it is possible to establish interconnection between the single die separate and package the dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.Type: GrantFiled: May 6, 1996Date of Patent: May 18, 1999Assignee: Micron Technology, Inc.Inventors: Alan G. Wood, Tim J. Corbett