Patents Examined by Ernest F. Karlsen
-
Patent number: 6291985Abstract: An electronic wattmeter is full-floating relative to a source of alternating current (a.c) voltage power that it serves to monitor. It is so full-floating by virtue of a direct current, d.c., power supply that is full floating relative to a.c. ground, and that produces a d.c. voltage that is impressed upon the a.c. voltage, meaning that the d.c. ground is equal to the a.c. voltage. A sense resistor is located in series between the source of a.c. electrical power and an a.c. load. Three resistive voltage dividers respectively between (i) the a.c. voltage at the source side of the sense resistor and a.c. ground, (ii) the a.c. voltage at the source side of the sense resistor and d.c. ground, and (iii) the a.c. voltage at the load side of the sense resistor and d.c. ground, respectively develop at their center taps logic-level, low, (i) first, (ii) second, and (iii) third voltages. The first voltage is indicative of the instantaneous a.c.Type: GrantFiled: October 15, 1996Date of Patent: September 18, 2001Inventor: E. William Bush
-
Patent number: 6255837Abstract: A test-mode latching circuit residing on an integrated circuit with test circuitry and operational circuitry has an enable state and a disable state. In the enable state, a test key is able to be latched so as to trigger a test mode. In the disable state, test key inputs are not latched and, thus, test modes are not entered. Initially, the circuit is readily enabled so that the IC can be tested upon fabrication. The circuit is locked in a disable state before external sale. A re-enable circuit is present to preclude inadvertent switching of the latching circuit back into the enable state during customer operation. Safeguards are implemented to avoid inadvertently re-enabling the latching circuit. To re-enable the latching circuit, an out-of-spec voltage is applied to an anti-fuse capacitor or programmable logic circuit while an out-of-spec voltage of the sane or another signal is detected at a field device. In one embodiment, the state switches to the enable state in response to the out-of-spec voltage.Type: GrantFiled: May 9, 2000Date of Patent: July 3, 2001Assignee: Micron Technology, Inc.Inventors: Daryl L. Habersetzer, Casey R. Kurth, Patrick J. Mullarkey, Jason E. Graalum
-
Patent number: 6107813Abstract: A prober tester interface system and a method for loading a probe card into a prober. The interface system includes a stiffener for holding a probe card, the stiffener having an upper surface, a perimeter, an underside, a plurality of recesses in the underside around the perimeter, and first and second alignment holes. A theta ring for holds the stiffener in the prober, the theta ring having first alignment pins for engaging the first alignment holes, a plurality of lock cylinders for engaging the recesses, and a machined lip against which the upper surface of the stiffener is forced by the lock cylinders. A loader is coupled to the prober for loading the stiffener in and unloading the stiffener from the theta ring, the loader having second alignment pins for engaging the second alignment holes. A theta drive assembly is coupled to the theta ring for rotating the theta ring to align the probe card with the test head.Type: GrantFiled: February 26, 1996Date of Patent: August 22, 2000Assignee: Xandex, Inc.Inventors: Roger Sinsheimer, Tom Richards
-
Patent number: 6104202Abstract: An interface between a test head portion of automatic test equipment and handling device such as a prober. The interface employs preloaded kinematic couplings between the test head and handling device and between the probe card and the test head. These couplings allow the probe card to be repeatedly positioned relative to the component in the handling device. They also reduce forces on the probe card to prevent distortion of the probe card. The interface provide seperate mechanical and electrical loops such that mechanical position is not dependant on the electrical structure.Type: GrantFiled: September 29, 1997Date of Patent: August 15, 2000Assignee: AESOP, Inc.Inventors: Alexander H. Slocum, Michael A. Chiu
-
Patent number: 6097182Abstract: An electronic energy meter for use with a 3-wire delta service having a resistive voltage divider for sensing and scaling the line voltages is disclosed. The resistive voltage divider includes three resistive dividers, one being associated with each phase of the electrical energy being metered. Each resistive divider includes a current limiter for reducing the current into the meter to a safe level when the meter electronics are operating at an elevated level, and a resistor for scaling the line voltage to a predetermined maximum peak-to-peak value. The scaled voltage that is generated has minimal phase shift, and therefore, does not require phase shift compensation prior to processing by a processing system of the electronic meter.Type: GrantFiled: June 7, 1995Date of Patent: August 1, 2000Assignee: ABB Power T&D Company Inc.Inventors: Rodney C. Hemminger, Mark L. Munday, Fred F. Schleifer
-
Patent number: 6037789Abstract: Throughput and accuracy of testing of a semiconductor device is improved by forming the contacts to allow the leads of a packaged semiconductor device to pass through the contacts. Both AC and DC testing may be done because the contact length is substantially shortened.Type: GrantFiled: October 30, 1992Date of Patent: March 14, 2000Assignee: Motorola, Inc.Inventors: Milo W. Frisbie, Mavin C. Swapp
-
Patent number: 6037782Abstract: Equipment under test is adjusted during set-up for electromagnetic compatibility testing. The equipment under test is placed on a base, such as a table, other structure or the ground. Positioners are connected to cables and/or subparts of the equipment under test. For example, the positioners are non-metallic pneumatic cylinders. The positioners are anchored to the base, to the device under test, or to some other structure. For various positions of an antenna relative to the equipment under test, positions of the positioners are found for which there is a maximum signal response. This is done by measuring signal response for current positions of the positioners. The current positions of the positioners are then varied using a remote control unit which controls positions of the positioners. This is repeated for as many different positions as desired. The positions which resulted in the maximum signal response is utilized for the electromagnetic compatibility testing.Type: GrantFiled: February 20, 1998Date of Patent: March 14, 2000Assignee: Hewlett-Packard CompanyInventors: David Pommerenke, Kenneth E. Hall, Debra L. Ledsinger
-
Patent number: 6016062Abstract: One embodiment of the instant invention is a test structure (FIGS. 1, 7 and 8) for determining the effect of various process steps on a plurality of devices with regards to charge-induced damage, the test structure comprising: the plurality of devices (device 10 of FIG. 1 and devices of FIGS. 7 and 8), each of the devices includes a plurality of device levels and device structures; a plurality of antennas (antenna 11 of FIG. 1, antennas of FIGS. 7 and 8) for receiving charged particles emitted during a process step, each of the antennas connected to a corresponding portion of the plurality of devices and wherein the antenna and the corresponding portion of the plurality of devices has a perimeter ratio and an antenna ratio; and wherein the perimeter ratios and the antenna ratios are different for different portions of the plurality of antennas and their corresponding portion of the plurality of devices so that the effect of the various process steps with regards to charge-induced damage can be determined.Type: GrantFiled: October 11, 1996Date of Patent: January 18, 2000Assignee: Texas Instruments IncorporatedInventors: Paul Nicollian, Srikanth Krishnan
-
Patent number: 6014034Abstract: A method for testing thin gate oxide integrity of a semiconductor device includes the steps of performing a current or voltage ramp test on the thin gate oxide semiconductor device. The resultant current and voltage data points indicating an increasing magnitude of current flowing through the thin gate oxide and corresponding increasing magnitude of voltage across the thin gate oxide are measured and recorded (14, 16). A slope is then computed between each successive pair of data points and stored (20). Each successive pair of computed slopes are then compared against a predetermined setpoint (22), where a possible kink point is detected if a pair of successive computed slopes has a difference greater than the predetermined setpoint (24).Type: GrantFiled: October 24, 1996Date of Patent: January 11, 2000Assignee: Texas Instruments IncorporatedInventors: Parkash S. Arora, Paul K. Aum
-
Patent number: 6008660Abstract: Accuracy of capacitance measurements taken with flying probes--probes that are movable relative to each other and surfaces of an object containing circuits being tested (e.g. a printed circuit board)--is improved by dynamically applying corrections for stray capacitance as individual probes are selected for measurements. Measuring circuitry to which the probes are linked includes multiplexor circuitry. The latter stray capacitance encompassing the stray capacitance between the one movable probe and the other movable probes as well as the cabling between the latter probes and the multiplexor circuitry. For these measurements, the reference point is contacted either by a fixed conductor or another one of the movable probes (other than the probe aligned with the test point) that is currently usable for that purpose.Type: GrantFiled: August 22, 1996Date of Patent: December 28, 1999Assignee: International Business Machines CorporationInventor: James Christopher Mahlbacher
-
Patent number: 6005384Abstract: Methods and apparatus for metering electrical energy are disclosed in an electronic meter which includes a first oscillator for generating a first clock signal to within a first accuracy and a second oscillator for generating a second clock signal within a second accuracy. A processor, operable in relation to a clock signal, measures time and periodically compensates for the accuracy of the first oscillator. The first clock signal is used for measuring time when power is applied to the meter and the second clock signal is used by the processor for measuring time when power has been removed from the meter. The accuracy of the first oscillator is compensated periodically in relation to a compensation factor stored in memory. In one embodiment, the processor includes a counter for counting from a first value to a second value in response to the first clock signal. In such an arrangement, the processor substitutes the first compensation factor for the first value.Type: GrantFiled: October 22, 1996Date of Patent: December 21, 1999Assignee: ABB Power T&D Company Inc.Inventors: Rodney C. Hemminger, Peter Richard Rogers
-
Patent number: 5966021Abstract: An apparatus for testing an integrated circuit in an oven during burn-in. A burn-in board in the oven is electrically connected to a plurality of integrated circuit ("IC") components. A driver/interface board outside the oven is electrically connected to the burn-in board through a plurality of contacts and sends and receives a plurality of signals between the IC components and a test controller. A switch module on the burn-in board comprises a plurality of high-temperature switches for transferring signals between the plurality of IC components and the driver/interface board during burn-in. A plurality of signals entering the switch module from the driver/interface board does not exceed in number the plurality of contacts, and is fewer in number than a plurality of signals exiting the switch module to the plurality of IC components.Type: GrantFiled: April 3, 1996Date of Patent: October 12, 1999Assignee: Pycon, Inc.Inventors: Victor M. Eliashberg, Kombupalayam M. Prakash
-
Patent number: 5959449Abstract: A method for determining electrical measurement variables (e.g. DC or AC voltages or currents, powers or resistances) without physically contacting a conductor (1) includes at least two coil systems (6) arranged at a distance from one another. The coil systems (6) are positioned in the electromagnetic field of the conductor (1). The coils (6) and/or an electrically conductive component (3) in the vicinity of the coils (6) are set into periodic mechanical oscillation for the determination of DC voltages and/or direct currents. Consequently, determination of electrical measurement variables is achieved without physically contacting an electrical conductor which cannot be completely surrounded.Type: GrantFiled: November 21, 1997Date of Patent: September 28, 1999Inventor: Franz Winkler
-
Patent number: 5959448Abstract: A linear optocoupler is employed to provide a signal which is a galvanically isolated reproduction of the magnitude of an A.C. line voltage and another galvanically isolated signal indicative of a change in the polarity of the line voltage for enabling safe monitoring of a change the A.C. voltage. Actuation of an automatic transfer switch to substitute an emergency source of power for a normal source that has failed may be achieved with the emergency power waveform used to replicate the normal power waveform.Type: GrantFiled: September 6, 1996Date of Patent: September 28, 1999Assignee: Automatic Switch CompanyInventors: Zbigniew Baranski, John Hayes
-
Patent number: 5952838Abstract: A reconfigurable array of test structures for testing portions of a semiconductor device, comprising a plurality of probe pads, comprising a first probe pad and a remainder of probe pads, at least one of which remainder of probe pads is a common lead; to each of said plurality of probe pads, except for said common lead, are attached two conductors; in each of which said two conductors is connected a test structure, a first end of which semiconductor device is connected to said conductor and a second end of which test structure is connected to said common lead, except for said first probe pad, for which first probe pad only a test structure is connected in the first conductor of the two conductors and a fusible link in the second conductor of the two conductors connected to said common lead; wherein one of each of said two conductors contains a fusible link connected in series with said test structure; and a method for testing portions of a semiconductor device employing such a reconfigurable array of test strType: GrantFiled: March 21, 1996Date of Patent: September 14, 1999Assignees: Sony Corporation, Sony Electronics, Inc.Inventor: Victor Tikhonov
-
Patent number: 5942895Abstract: A magnetic field sensor has two flux concentrators which serve to strengthen a magnetic field to be measured and which are separated by an air gap. Two Hall elements are arranged outside the air gap in such a way that at least a part of the field lines which lead from the first to the second flux concentrator pass through the two Hall elements in approximately opposite directions. Such a magnetic field sensor is less sensitive to external interference fields. It is suitable for the measurement of very weak magnetic fields and also for use as a current and/or energy sensor.Type: GrantFiled: October 23, 1996Date of Patent: August 24, 1999Assignee: Sentron AGInventors: Radivoje Popovic, Robert Racz, Jan Hrejsa, Hubert Blanchard
-
Patent number: 5942905Abstract: A connecting device is described for use in a test clip whose multiple contacts engage multiple leads of an IC (integrated circuit) device, which can be constructed reliably and at low cost. The test clip includes a flat flexible cable (54, FIG. 7) mounted on a clip housing, the cable having parallel conductors (50) mounted on insulation 53. Lower end portions of the conductors serve as lead-engaging contacts. Each conductor lower end portion extends in a substantially 180.degree. loop (62), with one side (70) of each loop being positioned to engage a corresponding lead of the IC device.Type: GrantFiled: May 23, 1995Date of Patent: August 24, 1999Assignee: ITT CorporationInventor: Marik Balyasny
-
Patent number: 5939889Abstract: An apparatus is disclosed for testing concrete having an unknown water/cement ratio and an unknown compressive strength. The apparatus includes a transmitter assembly for transmitting microwave signals at one or more predetermined frequencies. A receiver assembly receives each microwave signal reflected from the concrete under test. The reflected microwave signals, together with the transmitted microwave signals, are used to determine a reflection coefficient magnitude for the particular microwave frequency. A processing unit uses the reflection coefficient magnitude to determine a value related to concrete strength. In one embodiment, the processing unit relies on a logarithmic function that correlates the reflection coefficient magnitude and a water/cement ratio. A value related to the compressive strength of the concrete can also be obtained using the value of the water/cement ratio or the value of the reflection coefficient magnitude.Type: GrantFiled: May 7, 1993Date of Patent: August 17, 1999Assignee: Colorado State University Research FoundationInventors: Reza Zoughi, Paul S. Nowak
-
Patent number: 5939894Abstract: A CMOS integrated circuit is tested by creating a database in which types of CMOS functional units of the integrated circuit are mapped to values of quiescent power supply currents which would flow through the functional units corresponding to all possible internal states of the integrated circuit. A test pattern is applied to a simulation model of the functional units of the integrated circuits and an output is detected therefrom. Corresponding to the output of the simulation model, values of the quiescent power supply currents are read from the database and a decision threshold is derived from a total sum of the read values. A power supply current of the integrated circuit is then measured while subjecting it to the test pattern and the measured current is compared with the decision threshold to produce a test result of the integrated circuit.Type: GrantFiled: October 24, 1996Date of Patent: August 17, 1999Assignee: NEC CorporationInventors: Hisashi Yamauchi, Fumihiko Tajima, Yoshiyuki Inomata
-
Patent number: RE37500Abstract: A system for providing testing capability of individual submodules on an integrated circuit module. A test bus having a plurality of conductors is connected to selected internal ports of said submodules through three-way analog switches. Each three-way analog switch provides the capability to observe and control an internal port through combination of the ON/OFF status of two transmission gates. Test patterns for controlling the transmission gates may be provided by onboard D flip-flops which are externally programmed to control or observe ports of an individual submodule.Type: GrantFiled: November 20, 1996Date of Patent: January 8, 2002Assignee: North American Philips CorporationInventor: Nai-Chi Lee