Abstract: A semiconductor device includes an internal circuit and a cell-type power decoupling capacitor. The cell-type power decoupling capacitor is formed on a semiconductor substrate using a stack cell capacitor process. The cell-type power decoupling capacitor stabilizes a supply voltage to provide the stabilized supply voltage to the internal circuit. Accordingly, the semiconductor device including the cell-type power decoupling capacitor may be insensitive to power noise and may occupy a small area on a chip.

Abstract: Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming assisting etch resistant fill topographical features that overlie a semiconductor substrate and that define an assisting etch resistant fill confinement well using a photomask. The photomask defines an assisting lithographically-printable mask feature. A block copolymer is deposited into the assisting etch resistant fill confinement well. The block copolymer is phase separated into an etchable phase and an etch resistant phase. The assisting etch resistant fill topographical features direct the etch resistant phase to form an etch resistant plug in the assisting etch resistant fill confinement well.

Abstract: An optoelectronic semiconductor body includes a semiconductor layer sequence having an active region that generates radiation, a first barrier region and a second barrier region, wherein the active region is arranged between the first barrier region and the second barrier region; and at least one charge carrier barrier layer is arranged in the first barrier region, said at least one charge carrier barrier layer being tensile-strained.

Abstract: A magnetoresistive element according to an embodiment includes: a first to third ferromagnetic layers, and a first nonmagnetic layer, the first and second ferromagnetic layers each having an axis of easy magnetization in a direction perpendicular to a film plane, the third ferromagnetic layer including a plurality of ferromagnetic oscillators generating rotating magnetic fields of different oscillation frequencies from one another. Spin-polarized electrons are injected into the first ferromagnetic layer and induce precession movements in the plurality of ferromagnetic oscillators of the third ferromagnetic layer by flowing a current between the first and third ferromagnetic layers, the rotating magnetic fields are generated by the precession movements and are applied to the first ferromagnetic layer, and at least one of the rotating magnetic fields assists a magnetization switching in the first ferromagnetic layer.

Abstract: A semiconductor device is bonded by an anisotropic conductive film composition. The anisotropic conductive film composition includes an ethylene-vinyl acetate copolymer, a polyurethane resin, and organic fine particles. The anisotropic conductive film composition has a melt viscosity of about 2,000 to about 8,000 Pa·s at 80° C.

Abstract: An organic light-emitting display apparatus in which damages or defects are decreased when forming an emission layer, and a method of manufacturing the organic light-emitting display apparatus includes: a pixel electrode; an emission layer disposed on the pixel electrode and is capable of emitting light; a pixel defining layer that covers at least a portion of an edge of the emission layer such that a center portion of the emission layer is exposed; and an opposite electrode continuously formed over and across the pixel defining layer and the emission layer.

Abstract: To enhance the performance of a semiconductor device. In a method for manufacturing a semiconductor device, a metal film is formed over a semiconductor substrate having an insulating film formed on a surface thereof, and then the metal film is removed in a memory cell region, whereas, in a part of a peripheral circuit region, the metal film is left. Next, a silicon film is formed over the semiconductor substrate, then the silicon film is patterned in the memory cell region, and, in the peripheral circuit region, the silicon film is left so that an outer peripheral portion of the remaining metal film is covered with the silicon film. Subsequently, in the peripheral circuit region, the silicon film, the metal film, and the insulating film are patterned for forming an insulating film portion formed of the insulating film, a metal film portion formed of the metal film, and a conductive film portion formed of the silicon film.

Abstract: A flat panel display device and a manufacturing method thereof are provided. The flat panel display device includes: a display unit on a substrate; and a sealing structure on the substrate covering the display unit to seal the display unit, the sealing structure including at least one first layer including an inorganic material and at least one second layer including an organic material. The sealing structure includes at least one micro gap, and the micro gap includes an identification material including a fluorescent substance or a dye.

Abstract: A manufacturing method of MIS (Metal Insulator Semiconductor)-type semiconductor device includes the steps of: forming a zirconium oxynitride (ZrON) layer; forming an electrode layer containing titanium nitride (TiN) on the zirconium oxynitride (ZrON) layer; and heating the electrode layer.

Abstract: Some embodiments include integrated devices, such as memory cells. The devices may include chalcogenide material, an electrically conductive material over the chalcogenide material, and a thermal sink between the electrically conductive material and the chalcogenide material. The thermal sink may be of a composition that includes an element in common with the electrically conductive material and includes an element in common with the chalcogenide material. Some embodiments include a method of forming a memory cell. Chalcogenide material may be formed over heater material. Electrically conductive material may be formed over the chalcogenide material. A thermal sink may be formed between the electrically conductive material and the chalcogenide material. The thermal sink may be of a composition that includes an element in common with the electrically conductive material and includes an element in common with the chalcogenide material.

Abstract: A method for producing a semiconductor is disclosed, the method having: providing a semiconductor body having a first side and a second side; forming an n-doped zone in the semiconductor body by a first implantation into the semiconductor body via the first side to a first depth location of the semiconductor body; and forming a p-doped zone in the semiconductor body by a second implantation into the semiconductor body via the second side to a second depth location of the semiconductor body, a pn-junction forming between said n-doped zone and said p-doped zone in the semiconductor body.

Abstract: A semiconductor device has a light emitting element, and a resin layer; the light emitting element includes a semiconductor laminated body in which a first semiconductor layer and a second semiconductor layer are laminated in sequence, a second electrode connected to the second semiconductor layer on an upper surface of the second semiconductor layer that forms an upper surface of the semiconductor laminated body, and a first electrode connected to the first semiconductor layer on an upper surface of the first semiconductor layer in which a portion of the second semiconductor layer on one surface of the semiconductor laminated body is removed and a portion of the first semiconductor layer is exposed; and the resin layer is configured to cover at least a side surface of the light emitting element, and an upper surface of the resin layer is lower than the upper surface of the semiconductor laminated body.

Abstract: A display device includes a lower substrate; an upper substrate facing the lower substrate; a display element layer in a display area of the lower substrate and including a thin film transistor; and a sealing body in a peripheral area surrounding the display area, having a closed curve shape, and between the lower substrate and the upper substrate, in which the sealing body includes a first portion and a second portion, the first portion and the second portion respectively extending along different directions from each other, and the first portion and the second portion respectively have different deposition structures from each other.

Abstract: A dielectric material layer is deposited on gate structures of first and second semiconductor material portions. The dielectric material layer is anisotropically etched to form a first gate spacer on a first semiconductor material portion, while being protected above the second semiconductor material portion. After formation of first raised active regions on the first semiconductor material portion, a dielectric stack of a dielectric oxide liner and a dielectric nitride liner is formed. The dielectric stack is removed over the second semiconductor material portion and a second gate spacer is formed on the second semiconductor material portion, while the dielectric stack protects the first raised active regions. A second gate spacer is formed by anisotropically etching the dielectric material layer over the second semiconductor material portion. The first and second gate spacers have the same composition and thickness. Second raised active regions can be formed on the second semiconductor material portion.

Abstract: An organic light emitting diode display may include a display substrate including an organic light emitting diode, a sealing member facing the display substrate to cover the organic light emitting diode, a sealant positioned between the display substrate and the sealing member and bonding the display substrate and the sealing member, and a reinforcing member positioned at an outer surface of the sealant and a space between the display substrate and the sealing member, in which shear stress and hardness of the reinforcing member are a function of a sum of thicknesses of the display substrate and the sealing member.

Abstract: A chip size package (CSP) includes an antenna for wireless communication, used in signal transmission and reception with external substrates, the antenna being formed as a wiring of a rewiring layer, the rewiring layer being disposed between a silicon layer and solder bumps.

Abstract: A method of manufacturing a semiconductor device may include: preparing a substrate formed of SiC; depositing crystalline or amorphous silicon (Si) on one surface of the substrate to form a first semiconductor layer; and performing a heat treatment under a nitrogen atmosphere to form a second semiconductor layer formed of SiCN between the substrate and the first semiconductor layer.

Abstract: A semiconductor device includes: a first semiconductor-chip including a first electrode; a second semiconductor-chip including a second electrode; and a switch including a core element configured to contract and expand by a temperature change, a heat generation unit configured to heat the core element, a first metal element configured to cover the core element and connected to the first electrode, and a second metal element configured to cover the core element and connected to the second electrode, wherein, when the core element contracts, the first metal element and the second metal element come in contact with each other so that the first semiconductor-chip and the second semiconductor-chip are electrically connected with each other, and when the core element expands, the first metal element and the second metal element become in non-contact with each other so that the first semiconductor-chip and the second semiconductor-chip are electrically separated from each other.

Abstract: A MEMS device and a method of making a MEMS device are disclosed. In one embodiment a semiconductor device comprises a substrate, a moveable electrode and a counter electrode, wherein the moveable electrode and the counter electrode are mechanically connected to the substrate. The movable electrode is configured to stiffen an inner region of the movable membrane.

Abstract: An integrated circuit including a Schottky diode, and a method of making the same. The diode includes an active region bordered by an isolation region in a semiconductor substrate of the integrated circuits, a first electrode having a metal contact provided on a surface of the active region, and a second electrode having a silicide contact also provided on the surface of the active region.